src/mesa/drivers/dri/i965/server/i830_common.h

   1 /**************************************************************************
   2
   3 Copyright 2001 VA Linux Systems Inc., Fremont, California.
   4 Copyright 2002 Tungsten Graphics Inc., Cedar Park, Texas.
   5
   6 All Rights Reserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining a
   9 copy of this software and associated documentation files (the "Software"),
  10 to deal in the Software without restriction, including without limitation
  11 on the rights to use, copy, modify, merge, publish, distribute, sub
  12 license, and/or sell copies of the Software, and to permit persons to whom
  13 the Software is furnished to do so, subject to the following conditions:
  14
  15 The above copyright notice and this permission notice (including the next
  16 paragraph) shall be included in all copies or substantial portions of the
  17 Software.
  18
  19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21 FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  22 ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  23 DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  24 OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  25 USE OR OTHER DEALINGS IN THE SOFTWARE.
  26
  27 **************************************************************************/
  28
  29 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_common.h,v 1.1 2002/09/11 00:29:32 dawes Exp $ */
  30
  31 #ifndef _I830_COMMON_H_
  32 #define _I830_COMMON_H_
  33
  34
  35 #define I830_NR_TEX_REGIONS 255 /* maximum due to use of chars for next/prev */
  36 #define I830_LOG_MIN_TEX_REGION_SIZE 14
  37
  38
  39 /* Driver specific DRM command indices
  40  * NOTE: these are not OS specific, but they are driver specific
  41  */
  42 #define DRM_I830_INIT                     0x00
  43 #define DRM_I830_FLUSH                    0x01
  44 #define DRM_I830_FLIP                     0x02
  45 #define DRM_I830_BATCHBUFFER              0x03
  46 #define DRM_I830_IRQ_EMIT                 0x04
  47 #define DRM_I830_IRQ_WAIT                 0x05
  48 #define DRM_I830_GETPARAM                 0x06
  49 #define DRM_I830_SETPARAM                 0x07
  50 #define DRM_I830_ALLOC                    0x08
  51 #define DRM_I830_FREE                     0x09
  52 #define DRM_I830_INIT_HEAP                0x0a
  53 #define DRM_I830_CMDBUFFER                0x0b
  54 #define DRM_I830_DESTROY_HEAP             0x0c
  55 #define DRM_I830_MMIO                     0x10
  56
  57 typedef struct {
  58    enum {
  59       I830_INIT_DMA = 0x01,
  60       I830_CLEANUP_DMA = 0x02,
  61       I830_RESUME_DMA = 0x03
  62    } func;
  63    unsigned int mmio_offset;
  64    int sarea_priv_offset;
  65    unsigned int ring_start;
  66    unsigned int ring_end;
  67    unsigned int ring_size;
  68    unsigned int front_offset;
  69    unsigned int back_offset;
  70    unsigned int depth_offset;
  71    unsigned int w;
  72    unsigned int h;
  73    unsigned int pitch;
  74    unsigned int pitch_bits;
  75    unsigned int back_pitch;
  76    unsigned int depth_pitch;
  77    unsigned int cpp;
  78    unsigned int chipset;
  79 } drmI830Init;
  80
  81 typedef struct {
  82         drmTextureRegion texList[I830_NR_TEX_REGIONS+1];
  83         int last_upload;        /* last time texture was uploaded */
  84         int last_enqueue;       /* last time a buffer was enqueued */
  85         volatile int last_dispatch;     /* age of the most recently dispatched buffer */
  86         int ctxOwner;           /* last context to upload state */
  87         int texAge;
  88         int pf_enabled;         /* is pageflipping allowed? */
  89         int pf_active;
  90         int pf_current_page;    /* which buffer is being displayed? */
  91         int perf_boxes;         /* performance boxes to be displayed */
  92         int width, height;      /* screen size in pixels */
  93
  94         drm_handle_t front_handle;
  95         int front_offset;
  96         int front_size;
  97
  98         drm_handle_t back_handle;
  99         int back_offset;
 100         int back_size;
 101
 102         drm_handle_t depth_handle;
 103         int depth_offset;
 104         int depth_size;
 105
 106         drm_handle_t tex_handle;
 107         int tex_offset;
 108         int tex_size;
 109         int log_tex_granularity;
 110         int pitch;
 111         int rotation;           /* 0, 90, 180 or 270 */
 112         int rotated_offset;
 113         int rotated_size;
 114         int rotated_pitch;
 115         int virtualX, virtualY;
 116
 117         unsigned int front_tiled;
 118         unsigned int back_tiled;
 119         unsigned int depth_tiled;
 120         unsigned int rotated_tiled;
 121         unsigned int rotated2_tiled;
 122 } drmI830Sarea;
 123
 124 /* Flags for perf_boxes
 125  */
 126 #define I830_BOX_RING_EMPTY    0x1 /* populated by kernel */
 127 #define I830_BOX_FLIP          0x2 /* populated by kernel */
 128 #define I830_BOX_WAIT          0x4 /* populated by kernel & client */
 129 #define I830_BOX_TEXTURE_LOAD  0x8 /* populated by kernel */
 130 #define I830_BOX_LOST_CONTEXT  0x10 /* populated by client */
 131
 132
 133 typedef struct {
 134         int start;              /* agp offset */
 135         int used;               /* nr bytes in use */
 136         int DR1;                /* hw flags for GFX_OP_DRAWRECT_INFO */
 137         int DR4;                /* window origin for GFX_OP_DRAWRECT_INFO*/
 138         int num_cliprects;      /* mulitpass with multiple cliprects? */
 139         drm_clip_rect_t *cliprects; /* pointer to userspace cliprects */
 140 } drmI830BatchBuffer;
 141
 142 typedef struct {
 143         char *buf;              /* agp offset */
 144         int sz;                 /* nr bytes in use */
 145         int DR1;                /* hw flags for GFX_OP_DRAWRECT_INFO */
 146         int DR4;                /* window origin for GFX_OP_DRAWRECT_INFO*/
 147         int num_cliprects;      /* mulitpass with multiple cliprects? */
 148         drm_clip_rect_t *cliprects; /* pointer to userspace cliprects */
 149 } drmI830CmdBuffer;
 150
 151 typedef struct {
 152         int *irq_seq;
 153 } drmI830IrqEmit;
 154
 155 typedef struct {
 156         int irq_seq;
 157 } drmI830IrqWait;
 158
 159 typedef struct {
 160         int param;
 161         int *value;
 162 } drmI830GetParam;
 163
 164 #define I830_PARAM_IRQ_ACTIVE     1
 165 #define I830_PARAM_ALLOW_BATCHBUFFER   2
 166
 167 typedef struct {
 168         int param;
 169         int value;
 170 } drmI830SetParam;
 171
 172 #define I830_SETPARAM_USE_MI_BATCHBUFFER_START  1
 173 #define I830_SETPARAM_TEX_LRU_LOG_GRANULARITY   2
 174 #define I830_SETPARAM_ALLOW_BATCHBUFFER         3
 175
 176
 177 /* A memory manager for regions of shared memory:
 178  */
 179 #define I830_MEM_REGION_AGP 1
 180
 181 typedef struct {
 182         int region;
 183         int alignment;
 184         int size;
 185         int *region_offset;     /* offset from start of fb or agp */
 186 } drmI830MemAlloc;
 187
 188 typedef struct {
 189         int region;
 190         int region_offset;
 191 } drmI830MemFree;
 192
 193 typedef struct {
 194         int region;
 195         int size;
 196         int start;
 197 } drmI830MemInitHeap;
 198
 199 typedef struct {
 200         int region;
 201 } drmI830MemDestroyHeap;
 202
 203 #define MMIO_READ  0
 204 #define MMIO_WRITE 1
 205
 206 #define MMIO_REGS_IA_PRIMATIVES_COUNT           0
 207 #define MMIO_REGS_IA_VERTICES_COUNT             1
 208 #define MMIO_REGS_VS_INVOCATION_COUNT           2
 209 #define MMIO_REGS_GS_PRIMITIVES_COUNT           3
 210 #define MMIO_REGS_GS_INVOCATION_COUNT           4
 211 #define MMIO_REGS_CL_PRIMITIVES_COUNT           5
 212 #define MMIO_REGS_CL_INVOCATION_COUNT           6
 213 #define MMIO_REGS_PS_INVOCATION_COUNT           7
 214 #define MMIO_REGS_PS_DEPTH_COUNT                8
 215
 216 typedef struct {
 217         unsigned int read_write:1;
 218         unsigned int reg:31;
 219         void __user *data;
 220 } drmI830MMIO;
 221
 222 #endif /* _I830_DRM_H_ */