src/mesa/drivers/dri/i965/test_fs_cmod_propagation.cpp

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <gtest/gtest.h>
  25 #include "brw_fs.h"
  26 #include "brw_cfg.h"
  27 #include "program/program.h"
  28
  29 using namespace brw;
  30
  31 class cmod_propagation_test : public ::testing::Test {
  32    virtual void SetUp();
  33
  34 public:
  35    struct brw_compiler *compiler;
  36    struct brw_device_info *devinfo;
  37    struct gl_context *ctx;
  38    struct brw_wm_prog_data *prog_data;
  39    struct gl_shader_program *shader_prog;
  40    struct brw_fragment_program *fp;
  41    fs_visitor *v;
  42 };
  43
  44 class cmod_propagation_fs_visitor : public fs_visitor
  45 {
  46 public:
  47    cmod_propagation_fs_visitor(struct brw_compiler *compiler,
  48                                struct brw_wm_prog_data *prog_data,
  49                                nir_shader *shader)
  50       : fs_visitor(compiler, NULL, NULL, NULL,
  51                    &prog_data->base, (struct gl_program *) NULL,
  52                    shader, 8, -1) {}
  53 };
  54
  55
  56 void cmod_propagation_test::SetUp()
  57 {
  58    ctx = (struct gl_context *)calloc(1, sizeof(*ctx));
  59    compiler = (struct brw_compiler *)calloc(1, sizeof(*compiler));
  60    devinfo = (struct brw_device_info *)calloc(1, sizeof(*devinfo));
  61    compiler->devinfo = devinfo;
  62
  63    fp = ralloc(NULL, struct brw_fragment_program);
  64    prog_data = ralloc(NULL, struct brw_wm_prog_data);
  65    nir_shader *shader = nir_shader_create(NULL, MESA_SHADER_FRAGMENT, NULL);
  66
  67    v = new cmod_propagation_fs_visitor(compiler, prog_data, shader);
  68
  69    _mesa_init_gl_program(&fp->program.Base, GL_FRAGMENT_SHADER, 0);
  70
  71    devinfo->gen = 4;
  72 }
  73
  74 static fs_inst *
  75 instruction(bblock_t *block, int num)
  76 {
  77    fs_inst *inst = (fs_inst *)block->start();
  78    for (int i = 0; i < num; i++) {
  79       inst = (fs_inst *)inst->next;
  80    }
  81    return inst;
  82 }
  83
  84 static bool
  85 cmod_propagation(fs_visitor *v)
  86 {
  87    const bool print = getenv("TEST_DEBUG");
  88
  89    if (print) {
  90       fprintf(stderr, "= Before =\n");
  91       v->cfg->dump(v);
  92    }
  93
  94    bool ret = v->opt_cmod_propagation();
  95
  96    if (print) {
  97       fprintf(stderr, "\n= After =\n");
  98       v->cfg->dump(v);
  99    }
 100
 101    return ret;
 102 }
 103
 104 TEST_F(cmod_propagation_test, basic)
 105 {
 106    const fs_builder &bld = v->bld;
 107    fs_reg dest = v->vgrf(glsl_type::float_type);
 108    fs_reg src0 = v->vgrf(glsl_type::float_type);
 109    fs_reg src1 = v->vgrf(glsl_type::float_type);
 110    fs_reg zero(brw_imm_f(0.0f));
 111    bld.ADD(dest, src0, src1);
 112    bld.CMP(bld.null_reg_f(), dest, zero, BRW_CONDITIONAL_GE);
 113
 114    /* = Before =
 115     *
 116     * 0: add(8)        dest  src0  src1
 117     * 1: cmp.ge.f0(8)  null  dest  0.0f
 118     *
 119     * = After =
 120     * 0: add.ge.f0(8)  dest  src0  src1
 121     */
 122
 123    v->calculate_cfg();
 124    bblock_t *block0 = v->cfg->blocks[0];
 125
 126    EXPECT_EQ(0, block0->start_ip);
 127    EXPECT_EQ(1, block0->end_ip);
 128
 129    EXPECT_TRUE(cmod_propagation(v));
 130    EXPECT_EQ(0, block0->start_ip);
 131    EXPECT_EQ(0, block0->end_ip);
 132    EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
 133    EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 0)->conditional_mod);
 134 }
 135
 136 TEST_F(cmod_propagation_test, cmp_nonzero)
 137 {
 138    const fs_builder &bld = v->bld;
 139    fs_reg dest = v->vgrf(glsl_type::float_type);
 140    fs_reg src0 = v->vgrf(glsl_type::float_type);
 141    fs_reg src1 = v->vgrf(glsl_type::float_type);
 142    fs_reg nonzero(brw_imm_f(1.0f));
 143    bld.ADD(dest, src0, src1);
 144    bld.CMP(bld.null_reg_f(), dest, nonzero, BRW_CONDITIONAL_GE);
 145
 146    /* = Before =
 147     *
 148     * 0: add(8)        dest  src0  src1
 149     * 1: cmp.ge.f0(8)  null  dest  1.0f
 150     *
 151     * = After =
 152     * (no changes)
 153     */
 154
 155    v->calculate_cfg();
 156    bblock_t *block0 = v->cfg->blocks[0];
 157
 158    EXPECT_EQ(0, block0->start_ip);
 159    EXPECT_EQ(1, block0->end_ip);
 160
 161    EXPECT_FALSE(cmod_propagation(v));
 162    EXPECT_EQ(0, block0->start_ip);
 163    EXPECT_EQ(1, block0->end_ip);
 164    EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
 165    EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 1)->opcode);
 166    EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod);
 167 }
 168
 169 TEST_F(cmod_propagation_test, non_cmod_instruction)
 170 {
 171    const fs_builder &bld = v->bld;
 172    fs_reg dest = v->vgrf(glsl_type::uint_type);
 173    fs_reg src0 = v->vgrf(glsl_type::uint_type);
 174    fs_reg zero(brw_imm_ud(0u));
 175    bld.FBL(dest, src0);
 176    bld.CMP(bld.null_reg_ud(), dest, zero, BRW_CONDITIONAL_GE);
 177
 178    /* = Before =
 179     *
 180     * 0: fbl(8)        dest  src0
 181     * 1: cmp.ge.f0(8)  null  dest  0u
 182     *
 183     * = After =
 184     * (no changes)
 185     */
 186
 187    v->calculate_cfg();
 188    bblock_t *block0 = v->cfg->blocks[0];
 189
 190    EXPECT_EQ(0, block0->start_ip);
 191    EXPECT_EQ(1, block0->end_ip);
 192
 193    EXPECT_FALSE(cmod_propagation(v));
 194    EXPECT_EQ(0, block0->start_ip);
 195    EXPECT_EQ(1, block0->end_ip);
 196    EXPECT_EQ(BRW_OPCODE_FBL, instruction(block0, 0)->opcode);
 197    EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 1)->opcode);
 198    EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod);
 199 }
 200
 201 TEST_F(cmod_propagation_test, intervening_flag_write)
 202 {
 203    const fs_builder &bld = v->bld;
 204    fs_reg dest = v->vgrf(glsl_type::float_type);
 205    fs_reg src0 = v->vgrf(glsl_type::float_type);
 206    fs_reg src1 = v->vgrf(glsl_type::float_type);
 207    fs_reg src2 = v->vgrf(glsl_type::float_type);
 208    fs_reg zero(brw_imm_f(0.0f));
 209    bld.ADD(dest, src0, src1);
 210    bld.CMP(bld.null_reg_f(), src2, zero, BRW_CONDITIONAL_GE);
 211    bld.CMP(bld.null_reg_f(), dest, zero, BRW_CONDITIONAL_GE);
 212
 213    /* = Before =
 214     *
 215     * 0: add(8)        dest  src0  src1
 216     * 1: cmp.ge.f0(8)  null  src2  0.0f
 217     * 2: cmp.ge.f0(8)  null  dest  0.0f
 218     *
 219     * = After =
 220     * (no changes)
 221     */
 222
 223    v->calculate_cfg();
 224    bblock_t *block0 = v->cfg->blocks[0];
 225
 226    EXPECT_EQ(0, block0->start_ip);
 227    EXPECT_EQ(2, block0->end_ip);
 228
 229    EXPECT_FALSE(cmod_propagation(v));
 230    EXPECT_EQ(0, block0->start_ip);
 231    EXPECT_EQ(2, block0->end_ip);
 232    EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
 233    EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 1)->opcode);
 234    EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod);
 235    EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 2)->opcode);
 236    EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 2)->conditional_mod);
 237 }
 238
 239 TEST_F(cmod_propagation_test, intervening_flag_read)
 240 {
 241    const fs_builder &bld = v->bld;
 242    fs_reg dest0 = v->vgrf(glsl_type::float_type);
 243    fs_reg dest1 = v->vgrf(glsl_type::float_type);
 244    fs_reg src0 = v->vgrf(glsl_type::float_type);
 245    fs_reg src1 = v->vgrf(glsl_type::float_type);
 246    fs_reg src2 = v->vgrf(glsl_type::float_type);
 247    fs_reg zero(brw_imm_f(0.0f));
 248    bld.ADD(dest0, src0, src1);
 249    set_predicate(BRW_PREDICATE_NORMAL, bld.SEL(dest1, src2, zero));
 250    bld.CMP(bld.null_reg_f(), dest0, zero, BRW_CONDITIONAL_GE);
 251
 252    /* = Before =
 253     *
 254     * 0: add(8)        dest0 src0  src1
 255     * 1: (+f0) sel(8)  dest1 src2  0.0f
 256     * 2: cmp.ge.f0(8)  null  dest0 0.0f
 257     *
 258     * = After =
 259     * (no changes)
 260     */
 261
 262    v->calculate_cfg();
 263    bblock_t *block0 = v->cfg->blocks[0];
 264
 265    EXPECT_EQ(0, block0->start_ip);
 266    EXPECT_EQ(2, block0->end_ip);
 267
 268    EXPECT_FALSE(cmod_propagation(v));
 269    EXPECT_EQ(0, block0->start_ip);
 270    EXPECT_EQ(2, block0->end_ip);
 271    EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
 272    EXPECT_EQ(BRW_OPCODE_SEL, instruction(block0, 1)->opcode);
 273    EXPECT_EQ(BRW_PREDICATE_NORMAL, instruction(block0, 1)->predicate);
 274    EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 2)->opcode);
 275    EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 2)->conditional_mod);
 276 }
 277
 278 TEST_F(cmod_propagation_test, intervening_dest_write)
 279 {
 280    const fs_builder &bld = v->bld;
 281    fs_reg dest = v->vgrf(glsl_type::vec4_type);
 282    fs_reg src0 = v->vgrf(glsl_type::float_type);
 283    fs_reg src1 = v->vgrf(glsl_type::float_type);
 284    fs_reg src2 = v->vgrf(glsl_type::vec2_type);
 285    fs_reg zero(brw_imm_f(0.0f));
 286    bld.ADD(offset(dest, bld, 2), src0, src1);
 287    bld.emit(SHADER_OPCODE_TEX, dest, src2)
 288       ->regs_written = 4;
 289    bld.CMP(bld.null_reg_f(), offset(dest, bld, 2), zero, BRW_CONDITIONAL_GE);
 290
 291    /* = Before =
 292     *
 293     * 0: add(8)        dest+2  src0    src1
 294     * 1: tex(8) rlen 4 dest+0  src2
 295     * 2: cmp.ge.f0(8)  null    dest+2  0.0f
 296     *
 297     * = After =
 298     * (no changes)
 299     */
 300
 301    v->calculate_cfg();
 302    bblock_t *block0 = v->cfg->blocks[0];
 303
 304    EXPECT_EQ(0, block0->start_ip);
 305    EXPECT_EQ(2, block0->end_ip);
 306
 307    EXPECT_FALSE(cmod_propagation(v));
 308    EXPECT_EQ(0, block0->start_ip);
 309    EXPECT_EQ(2, block0->end_ip);
 310    EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
 311    EXPECT_EQ(BRW_CONDITIONAL_NONE, instruction(block0, 0)->conditional_mod);
 312    EXPECT_EQ(SHADER_OPCODE_TEX, instruction(block0, 1)->opcode);
 313    EXPECT_EQ(BRW_CONDITIONAL_NONE, instruction(block0, 0)->conditional_mod);
 314    EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 2)->opcode);
 315    EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 2)->conditional_mod);
 316 }
 317
 318 TEST_F(cmod_propagation_test, intervening_flag_read_same_value)
 319 {
 320    const fs_builder &bld = v->bld;
 321    fs_reg dest0 = v->vgrf(glsl_type::float_type);
 322    fs_reg dest1 = v->vgrf(glsl_type::float_type);
 323    fs_reg src0 = v->vgrf(glsl_type::float_type);
 324    fs_reg src1 = v->vgrf(glsl_type::float_type);
 325    fs_reg src2 = v->vgrf(glsl_type::float_type);
 326    fs_reg zero(brw_imm_f(0.0f));
 327    set_condmod(BRW_CONDITIONAL_GE, bld.ADD(dest0, src0, src1));
 328    set_predicate(BRW_PREDICATE_NORMAL, bld.SEL(dest1, src2, zero));
 329    bld.CMP(bld.null_reg_f(), dest0, zero, BRW_CONDITIONAL_GE);
 330
 331    /* = Before =
 332     *
 333     * 0: add.ge.f0(8)  dest0 src0  src1
 334     * 1: (+f0) sel(8)  dest1 src2  0.0f
 335     * 2: cmp.ge.f0(8)  null  dest0 0.0f
 336     *
 337     * = After =
 338     * 0: add.ge.f0(8)  dest0 src0  src1
 339     * 1: (+f0) sel(8)  dest1 src2  0.0f
 340     */
 341
 342    v->calculate_cfg();
 343    bblock_t *block0 = v->cfg->blocks[0];
 344
 345    EXPECT_EQ(0, block0->start_ip);
 346    EXPECT_EQ(2, block0->end_ip);
 347
 348    EXPECT_TRUE(cmod_propagation(v));
 349    EXPECT_EQ(0, block0->start_ip);
 350    EXPECT_EQ(1, block0->end_ip);
 351    EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
 352    EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 0)->conditional_mod);
 353    EXPECT_EQ(BRW_OPCODE_SEL, instruction(block0, 1)->opcode);
 354    EXPECT_EQ(BRW_PREDICATE_NORMAL, instruction(block0, 1)->predicate);
 355 }
 356
 357 TEST_F(cmod_propagation_test, negate)
 358 {
 359    const fs_builder &bld = v->bld;
 360    fs_reg dest = v->vgrf(glsl_type::float_type);
 361    fs_reg src0 = v->vgrf(glsl_type::float_type);
 362    fs_reg src1 = v->vgrf(glsl_type::float_type);
 363    fs_reg zero(brw_imm_f(0.0f));
 364    bld.ADD(dest, src0, src1);
 365    dest.negate = true;
 366    bld.CMP(bld.null_reg_f(), dest, zero, BRW_CONDITIONAL_GE);
 367
 368    /* = Before =
 369     *
 370     * 0: add(8)        dest  src0  src1
 371     * 1: cmp.ge.f0(8)  null  -dest 0.0f
 372     *
 373     * = After =
 374     * 0: add.le.f0(8)  dest  src0  src1
 375     */
 376
 377    v->calculate_cfg();
 378    bblock_t *block0 = v->cfg->blocks[0];
 379
 380    EXPECT_EQ(0, block0->start_ip);
 381    EXPECT_EQ(1, block0->end_ip);
 382
 383    EXPECT_TRUE(cmod_propagation(v));
 384    EXPECT_EQ(0, block0->start_ip);
 385    EXPECT_EQ(0, block0->end_ip);
 386    EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
 387    EXPECT_EQ(BRW_CONDITIONAL_LE, instruction(block0, 0)->conditional_mod);
 388 }
 389
 390 TEST_F(cmod_propagation_test, movnz)
 391 {
 392    const fs_builder &bld = v->bld;
 393    fs_reg dest = v->vgrf(glsl_type::float_type);
 394    fs_reg src0 = v->vgrf(glsl_type::float_type);
 395    fs_reg src1 = v->vgrf(glsl_type::float_type);
 396    bld.CMP(dest, src0, src1, BRW_CONDITIONAL_GE);
 397    set_condmod(BRW_CONDITIONAL_NZ,
 398                bld.MOV(bld.null_reg_f(), dest));
 399
 400    /* = Before =
 401     *
 402     * 0: cmp.ge.f0(8)  dest  src0  src1
 403     * 1: mov.nz.f0(8)  null  dest
 404     *
 405     * = After =
 406     * 0: cmp.ge.f0(8)  dest  src0  src1
 407     */
 408
 409    v->calculate_cfg();
 410    bblock_t *block0 = v->cfg->blocks[0];
 411
 412    EXPECT_EQ(0, block0->start_ip);
 413    EXPECT_EQ(1, block0->end_ip);
 414
 415    EXPECT_TRUE(cmod_propagation(v));
 416    EXPECT_EQ(0, block0->start_ip);
 417    EXPECT_EQ(0, block0->end_ip);
 418    EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode);
 419    EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 0)->conditional_mod);
 420 }
 421
 422 TEST_F(cmod_propagation_test, different_types_cmod_with_zero)
 423 {
 424    const fs_builder &bld = v->bld;
 425    fs_reg dest = v->vgrf(glsl_type::int_type);
 426    fs_reg src0 = v->vgrf(glsl_type::int_type);
 427    fs_reg src1 = v->vgrf(glsl_type::int_type);
 428    fs_reg zero(brw_imm_f(0.0f));
 429    bld.ADD(dest, src0, src1);
 430    bld.CMP(bld.null_reg_f(), retype(dest, BRW_REGISTER_TYPE_F), zero,
 431            BRW_CONDITIONAL_GE);
 432
 433    /* = Before =
 434     *
 435     * 0: add(8)        dest:D  src0:D  src1:D
 436     * 1: cmp.ge.f0(8)  null:F  dest:F  0.0f
 437     *
 438     * = After =
 439     * (no changes)
 440     */
 441
 442    v->calculate_cfg();
 443    bblock_t *block0 = v->cfg->blocks[0];
 444
 445    EXPECT_EQ(0, block0->start_ip);
 446    EXPECT_EQ(1, block0->end_ip);
 447
 448    EXPECT_FALSE(cmod_propagation(v));
 449    EXPECT_EQ(0, block0->start_ip);
 450    EXPECT_EQ(1, block0->end_ip);
 451    EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
 452    EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 1)->opcode);
 453    EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod);
 454 }
 455
 456 TEST_F(cmod_propagation_test, andnz_one)
 457 {
 458    const fs_builder &bld = v->bld;
 459    fs_reg dest = v->vgrf(glsl_type::int_type);
 460    fs_reg src0 = v->vgrf(glsl_type::float_type);
 461    fs_reg zero(brw_imm_f(0.0f));
 462    fs_reg one(brw_imm_d(1));
 463
 464    bld.CMP(retype(dest, BRW_REGISTER_TYPE_F), src0, zero, BRW_CONDITIONAL_L);
 465    set_condmod(BRW_CONDITIONAL_NZ,
 466                bld.AND(bld.null_reg_d(), dest, one));
 467
 468    /* = Before =
 469     * 0: cmp.l.f0(8)     dest:F  src0:F  0F
 470     * 1: and.nz.f0(8)    null:D  dest:D  1D
 471     *
 472     * = After =
 473     * 0: cmp.l.f0(8)     dest:F  src0:F  0F
 474     */
 475
 476    v->calculate_cfg();
 477    bblock_t *block0 = v->cfg->blocks[0];
 478
 479    EXPECT_EQ(0, block0->start_ip);
 480    EXPECT_EQ(1, block0->end_ip);
 481
 482    EXPECT_TRUE(cmod_propagation(v));
 483    EXPECT_EQ(0, block0->start_ip);
 484    EXPECT_EQ(0, block0->end_ip);
 485    EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode);
 486    EXPECT_EQ(BRW_CONDITIONAL_L, instruction(block0, 0)->conditional_mod);
 487    EXPECT_TRUE(retype(dest, BRW_REGISTER_TYPE_F)
 488                .equals(instruction(block0, 0)->dst));
 489 }
 490
 491 TEST_F(cmod_propagation_test, andnz_non_one)
 492 {
 493    const fs_builder &bld = v->bld;
 494    fs_reg dest = v->vgrf(glsl_type::int_type);
 495    fs_reg src0 = v->vgrf(glsl_type::float_type);
 496    fs_reg zero(brw_imm_f(0.0f));
 497    fs_reg nonone(brw_imm_d(38));
 498
 499    bld.CMP(retype(dest, BRW_REGISTER_TYPE_F), src0, zero, BRW_CONDITIONAL_L);
 500    set_condmod(BRW_CONDITIONAL_NZ,
 501                bld.AND(bld.null_reg_d(), dest, nonone));
 502
 503    /* = Before =
 504     * 0: cmp.l.f0(8)     dest:F  src0:F  0F
 505     * 1: and.nz.f0(8)    null:D  dest:D  38D
 506     *
 507     * = After =
 508     * (no changes)
 509     */
 510
 511    v->calculate_cfg();
 512    bblock_t *block0 = v->cfg->blocks[0];
 513
 514    EXPECT_EQ(0, block0->start_ip);
 515    EXPECT_EQ(1, block0->end_ip);
 516
 517    EXPECT_FALSE(cmod_propagation(v));
 518    EXPECT_EQ(0, block0->start_ip);
 519    EXPECT_EQ(1, block0->end_ip);
 520    EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode);
 521    EXPECT_EQ(BRW_CONDITIONAL_L, instruction(block0, 0)->conditional_mod);
 522    EXPECT_EQ(BRW_OPCODE_AND, instruction(block0, 1)->opcode);
 523    EXPECT_EQ(BRW_CONDITIONAL_NZ, instruction(block0, 1)->conditional_mod);
 524 }
 525
 526 TEST_F(cmod_propagation_test, andz_one)
 527 {
 528    const fs_builder &bld = v->bld;
 529    fs_reg dest = v->vgrf(glsl_type::int_type);
 530    fs_reg src0 = v->vgrf(glsl_type::float_type);
 531    fs_reg zero(brw_imm_f(0.0f));
 532    fs_reg one(brw_imm_d(1));
 533
 534    bld.CMP(retype(dest, BRW_REGISTER_TYPE_F), src0, zero, BRW_CONDITIONAL_L);
 535    set_condmod(BRW_CONDITIONAL_Z,
 536                bld.AND(bld.null_reg_d(), dest, one));
 537
 538    /* = Before =
 539     * 0: cmp.l.f0(8)     dest:F  src0:F  0F
 540     * 1: and.z.f0(8)     null:D  dest:D  1D
 541     *
 542     * = After =
 543     * (no changes)
 544     */
 545
 546    v->calculate_cfg();
 547    bblock_t *block0 = v->cfg->blocks[0];
 548
 549    EXPECT_EQ(0, block0->start_ip);
 550    EXPECT_EQ(1, block0->end_ip);
 551
 552    EXPECT_FALSE(cmod_propagation(v));
 553    EXPECT_EQ(0, block0->start_ip);
 554    EXPECT_EQ(1, block0->end_ip);
 555    EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode);
 556    EXPECT_EQ(BRW_CONDITIONAL_L, instruction(block0, 0)->conditional_mod);
 557    EXPECT_EQ(BRW_OPCODE_AND, instruction(block0, 1)->opcode);
 558    EXPECT_EQ(BRW_CONDITIONAL_EQ, instruction(block0, 1)->conditional_mod);
 559 }