i965: Fix PBO cache coherency issue after _mesa_meta_pbo_GetTexSubImage().
[mesa.git] / src / mesa / drivers / dri / i965 / test_fs_cmod_propagation.cpp
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <gtest/gtest.h>
25 #include "brw_fs.h"
26 #include "brw_cfg.h"
27 #include "program/program.h"
28
29 class cmod_propagation_test : public ::testing::Test {
30 virtual void SetUp();
31
32 public:
33 struct brw_context *brw;
34 struct brw_device_info *devinfo;
35 struct gl_context *ctx;
36 struct brw_wm_prog_data *prog_data;
37 struct gl_shader_program *shader_prog;
38 struct brw_fragment_program *fp;
39 fs_visitor *v;
40 };
41
42 class cmod_propagation_fs_visitor : public fs_visitor
43 {
44 public:
45 cmod_propagation_fs_visitor(struct brw_context *brw,
46 struct brw_wm_prog_data *prog_data,
47 struct gl_shader_program *shader_prog)
48 : fs_visitor(brw, NULL, NULL, prog_data, shader_prog, NULL, 8) {}
49 };
50
51
52 void cmod_propagation_test::SetUp()
53 {
54 brw = (struct brw_context *)calloc(1, sizeof(*brw));
55 devinfo = (struct brw_device_info *)calloc(1, sizeof(*brw));
56 brw->intelScreen = (struct intel_screen *)calloc(1, sizeof(*brw->intelScreen));
57 brw->intelScreen->devinfo = devinfo;
58 ctx = &brw->ctx;
59
60 fp = ralloc(NULL, struct brw_fragment_program);
61 prog_data = ralloc(NULL, struct brw_wm_prog_data);
62 shader_prog = ralloc(NULL, struct gl_shader_program);
63
64 v = new cmod_propagation_fs_visitor(brw, prog_data, shader_prog);
65
66 _mesa_init_fragment_program(ctx, &fp->program, GL_FRAGMENT_SHADER, 0);
67
68 brw->gen = devinfo->gen = 4;
69 }
70
71 static fs_inst *
72 instruction(bblock_t *block, int num)
73 {
74 fs_inst *inst = (fs_inst *)block->start();
75 for (int i = 0; i < num; i++) {
76 inst = (fs_inst *)inst->next;
77 }
78 return inst;
79 }
80
81 static bool
82 cmod_propagation(fs_visitor *v)
83 {
84 const bool print = false;
85
86 if (print) {
87 fprintf(stderr, "= Before =\n");
88 v->cfg->dump(v);
89 }
90
91 bool ret = v->opt_cmod_propagation();
92
93 if (print) {
94 fprintf(stderr, "\n= After =\n");
95 v->cfg->dump(v);
96 }
97
98 return ret;
99 }
100
101 TEST_F(cmod_propagation_test, basic)
102 {
103 fs_reg dest = v->vgrf(glsl_type::float_type);
104 fs_reg src0 = v->vgrf(glsl_type::float_type);
105 fs_reg src1 = v->vgrf(glsl_type::float_type);
106 fs_reg zero(0.0f);
107 v->emit(BRW_OPCODE_ADD, dest, src0, src1);
108 v->emit(BRW_OPCODE_CMP, v->reg_null_f, dest, zero)
109 ->conditional_mod = BRW_CONDITIONAL_GE;
110
111 /* = Before =
112 *
113 * 0: add(8) dest src0 src1
114 * 1: cmp.ge.f0(8) null dest 0.0f
115 *
116 * = After =
117 * 0: add.ge.f0(8) dest src0 src1
118 */
119
120 v->calculate_cfg();
121 bblock_t *block0 = v->cfg->blocks[0];
122
123 EXPECT_EQ(0, block0->start_ip);
124 EXPECT_EQ(1, block0->end_ip);
125
126 EXPECT_TRUE(cmod_propagation(v));
127 EXPECT_EQ(0, block0->start_ip);
128 EXPECT_EQ(0, block0->end_ip);
129 EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
130 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 0)->conditional_mod);
131 }
132
133 TEST_F(cmod_propagation_test, cmp_nonzero)
134 {
135 fs_reg dest = v->vgrf(glsl_type::float_type);
136 fs_reg src0 = v->vgrf(glsl_type::float_type);
137 fs_reg src1 = v->vgrf(glsl_type::float_type);
138 fs_reg nonzero(1.0f);
139 v->emit(BRW_OPCODE_ADD, dest, src0, src1);
140 v->emit(BRW_OPCODE_CMP, v->reg_null_f, dest, nonzero)
141 ->conditional_mod = BRW_CONDITIONAL_GE;
142
143 /* = Before =
144 *
145 * 0: add(8) dest src0 src1
146 * 1: cmp.ge.f0(8) null dest 1.0f
147 *
148 * = After =
149 * (no changes)
150 */
151
152 v->calculate_cfg();
153 bblock_t *block0 = v->cfg->blocks[0];
154
155 EXPECT_EQ(0, block0->start_ip);
156 EXPECT_EQ(1, block0->end_ip);
157
158 EXPECT_FALSE(cmod_propagation(v));
159 EXPECT_EQ(0, block0->start_ip);
160 EXPECT_EQ(1, block0->end_ip);
161 EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
162 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 1)->opcode);
163 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod);
164 }
165
166 TEST_F(cmod_propagation_test, non_cmod_instruction)
167 {
168 fs_reg dest = v->vgrf(glsl_type::uint_type);
169 fs_reg src0 = v->vgrf(glsl_type::uint_type);
170 fs_reg zero(0u);
171 v->emit(BRW_OPCODE_FBL, dest, src0);
172 v->emit(BRW_OPCODE_CMP, v->reg_null_ud, dest, zero)
173 ->conditional_mod = BRW_CONDITIONAL_GE;
174
175 /* = Before =
176 *
177 * 0: fbl(8) dest src0
178 * 1: cmp.ge.f0(8) null dest 0u
179 *
180 * = After =
181 * (no changes)
182 */
183
184 v->calculate_cfg();
185 bblock_t *block0 = v->cfg->blocks[0];
186
187 EXPECT_EQ(0, block0->start_ip);
188 EXPECT_EQ(1, block0->end_ip);
189
190 EXPECT_FALSE(cmod_propagation(v));
191 EXPECT_EQ(0, block0->start_ip);
192 EXPECT_EQ(1, block0->end_ip);
193 EXPECT_EQ(BRW_OPCODE_FBL, instruction(block0, 0)->opcode);
194 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 1)->opcode);
195 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod);
196 }
197
198 TEST_F(cmod_propagation_test, intervening_flag_write)
199 {
200 fs_reg dest = v->vgrf(glsl_type::float_type);
201 fs_reg src0 = v->vgrf(glsl_type::float_type);
202 fs_reg src1 = v->vgrf(glsl_type::float_type);
203 fs_reg src2 = v->vgrf(glsl_type::float_type);
204 fs_reg zero(0.0f);
205 v->emit(BRW_OPCODE_ADD, dest, src0, src1);
206 v->emit(BRW_OPCODE_CMP, v->reg_null_f, src2, zero)
207 ->conditional_mod = BRW_CONDITIONAL_GE;
208 v->emit(BRW_OPCODE_CMP, v->reg_null_f, dest, zero)
209 ->conditional_mod = BRW_CONDITIONAL_GE;
210
211 /* = Before =
212 *
213 * 0: add(8) dest src0 src1
214 * 1: cmp.ge.f0(8) null src2 0.0f
215 * 2: cmp.ge.f0(8) null dest 0.0f
216 *
217 * = After =
218 * (no changes)
219 */
220
221 v->calculate_cfg();
222 bblock_t *block0 = v->cfg->blocks[0];
223
224 EXPECT_EQ(0, block0->start_ip);
225 EXPECT_EQ(2, block0->end_ip);
226
227 EXPECT_FALSE(cmod_propagation(v));
228 EXPECT_EQ(0, block0->start_ip);
229 EXPECT_EQ(2, block0->end_ip);
230 EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
231 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 1)->opcode);
232 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod);
233 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 2)->opcode);
234 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 2)->conditional_mod);
235 }
236
237 TEST_F(cmod_propagation_test, intervening_flag_read)
238 {
239 fs_reg dest0 = v->vgrf(glsl_type::float_type);
240 fs_reg dest1 = v->vgrf(glsl_type::float_type);
241 fs_reg src0 = v->vgrf(glsl_type::float_type);
242 fs_reg src1 = v->vgrf(glsl_type::float_type);
243 fs_reg src2 = v->vgrf(glsl_type::float_type);
244 fs_reg zero(0.0f);
245 v->emit(BRW_OPCODE_ADD, dest0, src0, src1);
246 v->emit(BRW_OPCODE_SEL, dest1, src2, zero)
247 ->predicate = BRW_PREDICATE_NORMAL;
248 v->emit(BRW_OPCODE_CMP, v->reg_null_f, dest0, zero)
249 ->conditional_mod = BRW_CONDITIONAL_GE;
250
251 /* = Before =
252 *
253 * 0: add(8) dest0 src0 src1
254 * 1: (+f0) sel(8) dest1 src2 0.0f
255 * 2: cmp.ge.f0(8) null dest0 0.0f
256 *
257 * = After =
258 * (no changes)
259 */
260
261 v->calculate_cfg();
262 bblock_t *block0 = v->cfg->blocks[0];
263
264 EXPECT_EQ(0, block0->start_ip);
265 EXPECT_EQ(2, block0->end_ip);
266
267 EXPECT_FALSE(cmod_propagation(v));
268 EXPECT_EQ(0, block0->start_ip);
269 EXPECT_EQ(2, block0->end_ip);
270 EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
271 EXPECT_EQ(BRW_OPCODE_SEL, instruction(block0, 1)->opcode);
272 EXPECT_EQ(BRW_PREDICATE_NORMAL, instruction(block0, 1)->predicate);
273 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 2)->opcode);
274 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 2)->conditional_mod);
275 }
276
277 TEST_F(cmod_propagation_test, intervening_dest_write)
278 {
279 fs_reg dest = v->vgrf(glsl_type::vec4_type);
280 fs_reg src0 = v->vgrf(glsl_type::float_type);
281 fs_reg src1 = v->vgrf(glsl_type::float_type);
282 fs_reg src2 = v->vgrf(glsl_type::vec2_type);
283 fs_reg zero(0.0f);
284 v->emit(BRW_OPCODE_ADD, offset(dest, 2), src0, src1);
285 v->emit(SHADER_OPCODE_TEX, dest, src2)
286 ->regs_written = 4;
287 v->emit(BRW_OPCODE_CMP, v->reg_null_f, offset(dest, 2), zero)
288 ->conditional_mod = BRW_CONDITIONAL_GE;
289
290 /* = Before =
291 *
292 * 0: add(8) dest+2 src0 src1
293 * 1: tex(8) rlen 4 dest+0 src2
294 * 2: cmp.ge.f0(8) null dest+2 0.0f
295 *
296 * = After =
297 * (no changes)
298 */
299
300 v->calculate_cfg();
301 bblock_t *block0 = v->cfg->blocks[0];
302
303 EXPECT_EQ(0, block0->start_ip);
304 EXPECT_EQ(2, block0->end_ip);
305
306 EXPECT_FALSE(cmod_propagation(v));
307 EXPECT_EQ(0, block0->start_ip);
308 EXPECT_EQ(2, block0->end_ip);
309 EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
310 EXPECT_EQ(BRW_CONDITIONAL_NONE, instruction(block0, 0)->conditional_mod);
311 EXPECT_EQ(SHADER_OPCODE_TEX, instruction(block0, 1)->opcode);
312 EXPECT_EQ(BRW_CONDITIONAL_NONE, instruction(block0, 0)->conditional_mod);
313 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 2)->opcode);
314 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 2)->conditional_mod);
315 }
316
317 TEST_F(cmod_propagation_test, intervening_flag_read_same_value)
318 {
319 fs_reg dest0 = v->vgrf(glsl_type::float_type);
320 fs_reg dest1 = v->vgrf(glsl_type::float_type);
321 fs_reg src0 = v->vgrf(glsl_type::float_type);
322 fs_reg src1 = v->vgrf(glsl_type::float_type);
323 fs_reg src2 = v->vgrf(glsl_type::float_type);
324 fs_reg zero(0.0f);
325 v->emit(BRW_OPCODE_ADD, dest0, src0, src1)
326 ->conditional_mod = BRW_CONDITIONAL_GE;
327 v->emit(BRW_OPCODE_SEL, dest1, src2, zero)
328 ->predicate = BRW_PREDICATE_NORMAL;
329 v->emit(BRW_OPCODE_CMP, v->reg_null_f, dest0, zero)
330 ->conditional_mod = BRW_CONDITIONAL_GE;
331
332 /* = Before =
333 *
334 * 0: add.ge.f0(8) dest0 src0 src1
335 * 1: (+f0) sel(8) dest1 src2 0.0f
336 * 2: cmp.ge.f0(8) null dest0 0.0f
337 *
338 * = After =
339 * 0: add.ge.f0(8) dest0 src0 src1
340 * 1: (+f0) sel(8) dest1 src2 0.0f
341 */
342
343 v->calculate_cfg();
344 bblock_t *block0 = v->cfg->blocks[0];
345
346 EXPECT_EQ(0, block0->start_ip);
347 EXPECT_EQ(2, block0->end_ip);
348
349 EXPECT_TRUE(cmod_propagation(v));
350 EXPECT_EQ(0, block0->start_ip);
351 EXPECT_EQ(1, block0->end_ip);
352 EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
353 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 0)->conditional_mod);
354 EXPECT_EQ(BRW_OPCODE_SEL, instruction(block0, 1)->opcode);
355 EXPECT_EQ(BRW_PREDICATE_NORMAL, instruction(block0, 1)->predicate);
356 }
357
358 TEST_F(cmod_propagation_test, negate)
359 {
360 fs_reg dest = v->vgrf(glsl_type::float_type);
361 fs_reg src0 = v->vgrf(glsl_type::float_type);
362 fs_reg src1 = v->vgrf(glsl_type::float_type);
363 fs_reg zero(0.0f);
364 v->emit(BRW_OPCODE_ADD, dest, src0, src1);
365 dest.negate = true;
366 v->emit(BRW_OPCODE_CMP, v->reg_null_f, dest, zero)
367 ->conditional_mod = BRW_CONDITIONAL_GE;
368
369 /* = Before =
370 *
371 * 0: add(8) dest src0 src1
372 * 1: cmp.ge.f0(8) null -dest 0.0f
373 *
374 * = After =
375 * 0: add.le.f0(8) dest src0 src1
376 */
377
378 v->calculate_cfg();
379 bblock_t *block0 = v->cfg->blocks[0];
380
381 EXPECT_EQ(0, block0->start_ip);
382 EXPECT_EQ(1, block0->end_ip);
383
384 EXPECT_TRUE(cmod_propagation(v));
385 EXPECT_EQ(0, block0->start_ip);
386 EXPECT_EQ(0, block0->end_ip);
387 EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
388 EXPECT_EQ(BRW_CONDITIONAL_LE, instruction(block0, 0)->conditional_mod);
389 }
390
391 TEST_F(cmod_propagation_test, movnz)
392 {
393 fs_reg dest = v->vgrf(glsl_type::float_type);
394 fs_reg src0 = v->vgrf(glsl_type::float_type);
395 fs_reg src1 = v->vgrf(glsl_type::float_type);
396 v->emit(BRW_OPCODE_CMP, dest, src0, src1)
397 ->conditional_mod = BRW_CONDITIONAL_GE;
398 v->emit(BRW_OPCODE_MOV, v->reg_null_f, dest)
399 ->conditional_mod = BRW_CONDITIONAL_NZ;
400
401 /* = Before =
402 *
403 * 0: cmp.ge.f0(8) dest src0 src1
404 * 1: mov.nz.f0(8) null dest
405 *
406 * = After =
407 * 0: cmp.ge.f0(8) dest src0 src1
408 */
409
410 v->calculate_cfg();
411 bblock_t *block0 = v->cfg->blocks[0];
412
413 EXPECT_EQ(0, block0->start_ip);
414 EXPECT_EQ(1, block0->end_ip);
415
416 EXPECT_TRUE(cmod_propagation(v));
417 EXPECT_EQ(0, block0->start_ip);
418 EXPECT_EQ(0, block0->end_ip);
419 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode);
420 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 0)->conditional_mod);
421 }
422
423 TEST_F(cmod_propagation_test, different_types_cmod_with_zero)
424 {
425 fs_reg dest = v->vgrf(glsl_type::int_type);
426 fs_reg src0 = v->vgrf(glsl_type::int_type);
427 fs_reg src1 = v->vgrf(glsl_type::int_type);
428 fs_reg zero(0.0f);
429 v->emit(BRW_OPCODE_ADD, dest, src0, src1);
430 v->emit(BRW_OPCODE_CMP, v->reg_null_f, retype(dest, BRW_REGISTER_TYPE_F),
431 zero)
432 ->conditional_mod = BRW_CONDITIONAL_GE;
433
434 /* = Before =
435 *
436 * 0: add(8) dest:D src0:D src1:D
437 * 1: cmp.ge.f0(8) null:F dest:F 0.0f
438 *
439 * = After =
440 * (no changes)
441 */
442
443 v->calculate_cfg();
444 bblock_t *block0 = v->cfg->blocks[0];
445
446 EXPECT_EQ(0, block0->start_ip);
447 EXPECT_EQ(1, block0->end_ip);
448
449 EXPECT_FALSE(cmod_propagation(v));
450 EXPECT_EQ(0, block0->start_ip);
451 EXPECT_EQ(1, block0->end_ip);
452 EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
453 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 1)->opcode);
454 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod);
455 }
456
457 TEST_F(cmod_propagation_test, andnz_one)
458 {
459 fs_reg dest = v->vgrf(glsl_type::int_type);
460 fs_reg src0 = v->vgrf(glsl_type::float_type);
461 fs_reg zero(0.0f);
462 fs_reg one(1);
463
464 v->emit(BRW_OPCODE_CMP, retype(dest, BRW_REGISTER_TYPE_F), src0, zero)
465 ->conditional_mod = BRW_CONDITIONAL_L;
466 v->emit(BRW_OPCODE_AND, v->reg_null_d, dest, one)
467 ->conditional_mod = BRW_CONDITIONAL_NZ;
468
469 /* = Before =
470 * 0: cmp.l.f0(8) dest:F src0:F 0F
471 * 1: and.nz.f0(8) null:D dest:D 1D
472 *
473 * = After =
474 * 0: cmp.l.f0(8) dest:F src0:F 0F
475 */
476
477 v->calculate_cfg();
478 bblock_t *block0 = v->cfg->blocks[0];
479
480 EXPECT_EQ(0, block0->start_ip);
481 EXPECT_EQ(1, block0->end_ip);
482
483 EXPECT_TRUE(cmod_propagation(v));
484 EXPECT_EQ(0, block0->start_ip);
485 EXPECT_EQ(0, block0->end_ip);
486 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode);
487 EXPECT_EQ(BRW_CONDITIONAL_L, instruction(block0, 0)->conditional_mod);
488 EXPECT_TRUE(retype(dest, BRW_REGISTER_TYPE_F)
489 .equals(instruction(block0, 0)->dst));
490 }
491
492 TEST_F(cmod_propagation_test, andnz_non_one)
493 {
494 fs_reg dest = v->vgrf(glsl_type::int_type);
495 fs_reg src0 = v->vgrf(glsl_type::float_type);
496 fs_reg zero(0.0f);
497 fs_reg nonone(38);
498
499 v->emit(BRW_OPCODE_CMP, retype(dest, BRW_REGISTER_TYPE_F), src0, zero)
500 ->conditional_mod = BRW_CONDITIONAL_L;
501 v->emit(BRW_OPCODE_AND, v->reg_null_d, dest, nonone)
502 ->conditional_mod = BRW_CONDITIONAL_NZ;
503
504 /* = Before =
505 * 0: cmp.l.f0(8) dest:F src0:F 0F
506 * 1: and.nz.f0(8) null:D dest:D 38D
507 *
508 * = After =
509 * (no changes)
510 */
511
512 v->calculate_cfg();
513 bblock_t *block0 = v->cfg->blocks[0];
514
515 EXPECT_EQ(0, block0->start_ip);
516 EXPECT_EQ(1, block0->end_ip);
517
518 EXPECT_FALSE(cmod_propagation(v));
519 EXPECT_EQ(0, block0->start_ip);
520 EXPECT_EQ(1, block0->end_ip);
521 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode);
522 EXPECT_EQ(BRW_CONDITIONAL_L, instruction(block0, 0)->conditional_mod);
523 EXPECT_EQ(BRW_OPCODE_AND, instruction(block0, 1)->opcode);
524 EXPECT_EQ(BRW_CONDITIONAL_NZ, instruction(block0, 1)->conditional_mod);
525 }
526
527 TEST_F(cmod_propagation_test, andz_one)
528 {
529 fs_reg dest = v->vgrf(glsl_type::int_type);
530 fs_reg src0 = v->vgrf(glsl_type::float_type);
531 fs_reg zero(0.0f);
532 fs_reg one(1);
533
534 v->emit(BRW_OPCODE_CMP, retype(dest, BRW_REGISTER_TYPE_F), src0, zero)
535 ->conditional_mod = BRW_CONDITIONAL_L;
536 v->emit(BRW_OPCODE_AND, v->reg_null_d, dest, one)
537 ->conditional_mod = BRW_CONDITIONAL_Z;
538
539 /* = Before =
540 * 0: cmp.l.f0(8) dest:F src0:F 0F
541 * 1: and.z.f0(8) null:D dest:D 1D
542 *
543 * = After =
544 * (no changes)
545 */
546
547 v->calculate_cfg();
548 bblock_t *block0 = v->cfg->blocks[0];
549
550 EXPECT_EQ(0, block0->start_ip);
551 EXPECT_EQ(1, block0->end_ip);
552
553 EXPECT_FALSE(cmod_propagation(v));
554 EXPECT_EQ(0, block0->start_ip);
555 EXPECT_EQ(1, block0->end_ip);
556 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode);
557 EXPECT_EQ(BRW_CONDITIONAL_L, instruction(block0, 0)->conditional_mod);
558 EXPECT_EQ(BRW_OPCODE_AND, instruction(block0, 1)->opcode);
559 EXPECT_EQ(BRW_CONDITIONAL_EQ, instruction(block0, 1)->conditional_mod);
560 }