projects / mesa.git / blob
? search:


7cd72453b3f5ee33aeefa2f383c69c4fcb4390ae
[mesa.git] / src / mesa / drivers / dri / i965 / test_fs_cmod_propagation.cpp
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <gtest/gtest.h>
25 #include "brw_fs.h"
26 #include "brw_cfg.h"
27 #include "program/program.h"
28
29 using namespace brw;
30
31 class cmod_propagation_test : public ::testing::Test {
32 virtual void SetUp();
33
34 public:
35 struct brw_compiler *compiler;
36 struct brw_device_info *devinfo;
37 struct gl_context *ctx;
38 struct brw_wm_prog_data *prog_data;
39 struct gl_shader_program *shader_prog;
40 fs_visitor *v;
41 };
42
43 class cmod_propagation_fs_visitor : public fs_visitor
44 {
45 public:
46 cmod_propagation_fs_visitor(struct brw_compiler *compiler,
47 struct brw_wm_prog_data *prog_data,
48 nir_shader *shader)
49 : fs_visitor(compiler, NULL, NULL, NULL,
50 &prog_data->base, (struct gl_program *) NULL,
51 shader, 8, -1) {}
52 };
53
54
55 void cmod_propagation_test::SetUp()
56 {
57 ctx = (struct gl_context *)calloc(1, sizeof(*ctx));
58 compiler = (struct brw_compiler *)calloc(1, sizeof(*compiler));
59 devinfo = (struct brw_device_info *)calloc(1, sizeof(*devinfo));
60 compiler->devinfo = devinfo;
61
62 prog_data = ralloc(NULL, struct brw_wm_prog_data);
63 nir_shader *shader = nir_shader_create(NULL, MESA_SHADER_FRAGMENT, NULL);
64
65 v = new cmod_propagation_fs_visitor(compiler, prog_data, shader);
66
67 devinfo->gen = 4;
68 }
69
70 static fs_inst *
71 instruction(bblock_t *block, int num)
72 {
73 fs_inst *inst = (fs_inst *)block->start();
74 for (int i = 0; i < num; i++) {
75 inst = (fs_inst *)inst->next;
76 }
77 return inst;
78 }
79
80 static bool
81 cmod_propagation(fs_visitor *v)
82 {
83 const bool print = getenv("TEST_DEBUG");
84
85 if (print) {
86 fprintf(stderr, "= Before =\n");
87 v->cfg->dump(v);
88 }
89
90 bool ret = v->opt_cmod_propagation();
91
92 if (print) {
93 fprintf(stderr, "\n= After =\n");
94 v->cfg->dump(v);
95 }
96
97 return ret;
98 }
99
100 TEST_F(cmod_propagation_test, basic)
101 {
102 const fs_builder &bld = v->bld;
103 fs_reg dest = v->vgrf(glsl_type::float_type);
104 fs_reg src0 = v->vgrf(glsl_type::float_type);
105 fs_reg src1 = v->vgrf(glsl_type::float_type);
106 fs_reg zero(brw_imm_f(0.0f));
107 bld.ADD(dest, src0, src1);
108 bld.CMP(bld.null_reg_f(), dest, zero, BRW_CONDITIONAL_GE);
109
110 /* = Before =
111 *
112 * 0: add(8) dest src0 src1
113 * 1: cmp.ge.f0(8) null dest 0.0f
114 *
115 * = After =
116 * 0: add.ge.f0(8) dest src0 src1
117 */
118
119 v->calculate_cfg();
120 bblock_t *block0 = v->cfg->blocks[0];
121
122 EXPECT_EQ(0, block0->start_ip);
123 EXPECT_EQ(1, block0->end_ip);
124
125 EXPECT_TRUE(cmod_propagation(v));
126 EXPECT_EQ(0, block0->start_ip);
127 EXPECT_EQ(0, block0->end_ip);
128 EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
129 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 0)->conditional_mod);
130 }
131
132 TEST_F(cmod_propagation_test, cmp_nonzero)
133 {
134 const fs_builder &bld = v->bld;
135 fs_reg dest = v->vgrf(glsl_type::float_type);
136 fs_reg src0 = v->vgrf(glsl_type::float_type);
137 fs_reg src1 = v->vgrf(glsl_type::float_type);
138 fs_reg nonzero(brw_imm_f(1.0f));
139 bld.ADD(dest, src0, src1);
140 bld.CMP(bld.null_reg_f(), dest, nonzero, BRW_CONDITIONAL_GE);
141
142 /* = Before =
143 *
144 * 0: add(8) dest src0 src1
145 * 1: cmp.ge.f0(8) null dest 1.0f
146 *
147 * = After =
148 * (no changes)
149 */
150
151 v->calculate_cfg();
152 bblock_t *block0 = v->cfg->blocks[0];
153
154 EXPECT_EQ(0, block0->start_ip);
155 EXPECT_EQ(1, block0->end_ip);
156
157 EXPECT_FALSE(cmod_propagation(v));
158 EXPECT_EQ(0, block0->start_ip);
159 EXPECT_EQ(1, block0->end_ip);
160 EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
161 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 1)->opcode);
162 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod);
163 }
164
165 TEST_F(cmod_propagation_test, non_cmod_instruction)
166 {
167 const fs_builder &bld = v->bld;
168 fs_reg dest = v->vgrf(glsl_type::uint_type);
169 fs_reg src0 = v->vgrf(glsl_type::uint_type);
170 fs_reg zero(brw_imm_ud(0u));
171 bld.FBL(dest, src0);
172 bld.CMP(bld.null_reg_ud(), dest, zero, BRW_CONDITIONAL_GE);
173
174 /* = Before =
175 *
176 * 0: fbl(8) dest src0
177 * 1: cmp.ge.f0(8) null dest 0u
178 *
179 * = After =
180 * (no changes)
181 */
182
183 v->calculate_cfg();
184 bblock_t *block0 = v->cfg->blocks[0];
185
186 EXPECT_EQ(0, block0->start_ip);
187 EXPECT_EQ(1, block0->end_ip);
188
189 EXPECT_FALSE(cmod_propagation(v));
190 EXPECT_EQ(0, block0->start_ip);
191 EXPECT_EQ(1, block0->end_ip);
192 EXPECT_EQ(BRW_OPCODE_FBL, instruction(block0, 0)->opcode);
193 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 1)->opcode);
194 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod);
195 }
196
197 TEST_F(cmod_propagation_test, intervening_flag_write)
198 {
199 const fs_builder &bld = v->bld;
200 fs_reg dest = v->vgrf(glsl_type::float_type);
201 fs_reg src0 = v->vgrf(glsl_type::float_type);
202 fs_reg src1 = v->vgrf(glsl_type::float_type);
203 fs_reg src2 = v->vgrf(glsl_type::float_type);
204 fs_reg zero(brw_imm_f(0.0f));
205 bld.ADD(dest, src0, src1);
206 bld.CMP(bld.null_reg_f(), src2, zero, BRW_CONDITIONAL_GE);
207 bld.CMP(bld.null_reg_f(), dest, zero, BRW_CONDITIONAL_GE);
208
209 /* = Before =
210 *
211 * 0: add(8) dest src0 src1
212 * 1: cmp.ge.f0(8) null src2 0.0f
213 * 2: cmp.ge.f0(8) null dest 0.0f
214 *
215 * = After =
216 * (no changes)
217 */
218
219 v->calculate_cfg();
220 bblock_t *block0 = v->cfg->blocks[0];
221
222 EXPECT_EQ(0, block0->start_ip);
223 EXPECT_EQ(2, block0->end_ip);
224
225 EXPECT_FALSE(cmod_propagation(v));
226 EXPECT_EQ(0, block0->start_ip);
227 EXPECT_EQ(2, block0->end_ip);
228 EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
229 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 1)->opcode);
230 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod);
231 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 2)->opcode);
232 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 2)->conditional_mod);
233 }
234
235 TEST_F(cmod_propagation_test, intervening_flag_read)
236 {
237 const fs_builder &bld = v->bld;
238 fs_reg dest0 = v->vgrf(glsl_type::float_type);
239 fs_reg dest1 = v->vgrf(glsl_type::float_type);
240 fs_reg src0 = v->vgrf(glsl_type::float_type);
241 fs_reg src1 = v->vgrf(glsl_type::float_type);
242 fs_reg src2 = v->vgrf(glsl_type::float_type);
243 fs_reg zero(brw_imm_f(0.0f));
244 bld.ADD(dest0, src0, src1);
245 set_predicate(BRW_PREDICATE_NORMAL, bld.SEL(dest1, src2, zero));
246 bld.CMP(bld.null_reg_f(), dest0, zero, BRW_CONDITIONAL_GE);
247
248 /* = Before =
249 *
250 * 0: add(8) dest0 src0 src1
251 * 1: (+f0) sel(8) dest1 src2 0.0f
252 * 2: cmp.ge.f0(8) null dest0 0.0f
253 *
254 * = After =
255 * (no changes)
256 */
257
258 v->calculate_cfg();
259 bblock_t *block0 = v->cfg->blocks[0];
260
261 EXPECT_EQ(0, block0->start_ip);
262 EXPECT_EQ(2, block0->end_ip);
263
264 EXPECT_FALSE(cmod_propagation(v));
265 EXPECT_EQ(0, block0->start_ip);
266 EXPECT_EQ(2, block0->end_ip);
267 EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
268 EXPECT_EQ(BRW_OPCODE_SEL, instruction(block0, 1)->opcode);
269 EXPECT_EQ(BRW_PREDICATE_NORMAL, instruction(block0, 1)->predicate);
270 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 2)->opcode);
271 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 2)->conditional_mod);
272 }
273
274 TEST_F(cmod_propagation_test, intervening_dest_write)
275 {
276 const fs_builder &bld = v->bld;
277 fs_reg dest = v->vgrf(glsl_type::vec4_type);
278 fs_reg src0 = v->vgrf(glsl_type::float_type);
279 fs_reg src1 = v->vgrf(glsl_type::float_type);
280 fs_reg src2 = v->vgrf(glsl_type::vec2_type);
281 fs_reg zero(brw_imm_f(0.0f));
282 bld.ADD(offset(dest, bld, 2), src0, src1);
283 bld.emit(SHADER_OPCODE_TEX, dest, src2)
284 ->regs_written = 4;
285 bld.CMP(bld.null_reg_f(), offset(dest, bld, 2), zero, BRW_CONDITIONAL_GE);
286
287 /* = Before =
288 *
289 * 0: add(8) dest+2 src0 src1
290 * 1: tex(8) rlen 4 dest+0 src2
291 * 2: cmp.ge.f0(8) null dest+2 0.0f
292 *
293 * = After =
294 * (no changes)
295 */
296
297 v->calculate_cfg();
298 bblock_t *block0 = v->cfg->blocks[0];
299
300 EXPECT_EQ(0, block0->start_ip);
301 EXPECT_EQ(2, block0->end_ip);
302
303 EXPECT_FALSE(cmod_propagation(v));
304 EXPECT_EQ(0, block0->start_ip);
305 EXPECT_EQ(2, block0->end_ip);
306 EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
307 EXPECT_EQ(BRW_CONDITIONAL_NONE, instruction(block0, 0)->conditional_mod);
308 EXPECT_EQ(SHADER_OPCODE_TEX, instruction(block0, 1)->opcode);
309 EXPECT_EQ(BRW_CONDITIONAL_NONE, instruction(block0, 0)->conditional_mod);
310 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 2)->opcode);
311 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 2)->conditional_mod);
312 }
313
314 TEST_F(cmod_propagation_test, intervening_flag_read_same_value)
315 {
316 const fs_builder &bld = v->bld;
317 fs_reg dest0 = v->vgrf(glsl_type::float_type);
318 fs_reg dest1 = v->vgrf(glsl_type::float_type);
319 fs_reg src0 = v->vgrf(glsl_type::float_type);
320 fs_reg src1 = v->vgrf(glsl_type::float_type);
321 fs_reg src2 = v->vgrf(glsl_type::float_type);
322 fs_reg zero(brw_imm_f(0.0f));
323 set_condmod(BRW_CONDITIONAL_GE, bld.ADD(dest0, src0, src1));
324 set_predicate(BRW_PREDICATE_NORMAL, bld.SEL(dest1, src2, zero));
325 bld.CMP(bld.null_reg_f(), dest0, zero, BRW_CONDITIONAL_GE);
326
327 /* = Before =
328 *
329 * 0: add.ge.f0(8) dest0 src0 src1
330 * 1: (+f0) sel(8) dest1 src2 0.0f
331 * 2: cmp.ge.f0(8) null dest0 0.0f
332 *
333 * = After =
334 * 0: add.ge.f0(8) dest0 src0 src1
335 * 1: (+f0) sel(8) dest1 src2 0.0f
336 */
337
338 v->calculate_cfg();
339 bblock_t *block0 = v->cfg->blocks[0];
340
341 EXPECT_EQ(0, block0->start_ip);
342 EXPECT_EQ(2, block0->end_ip);
343
344 EXPECT_TRUE(cmod_propagation(v));
345 EXPECT_EQ(0, block0->start_ip);
346 EXPECT_EQ(1, block0->end_ip);
347 EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
348 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 0)->conditional_mod);
349 EXPECT_EQ(BRW_OPCODE_SEL, instruction(block0, 1)->opcode);
350 EXPECT_EQ(BRW_PREDICATE_NORMAL, instruction(block0, 1)->predicate);
351 }
352
353 TEST_F(cmod_propagation_test, negate)
354 {
355 const fs_builder &bld = v->bld;
356 fs_reg dest = v->vgrf(glsl_type::float_type);
357 fs_reg src0 = v->vgrf(glsl_type::float_type);
358 fs_reg src1 = v->vgrf(glsl_type::float_type);
359 fs_reg zero(brw_imm_f(0.0f));
360 bld.ADD(dest, src0, src1);
361 dest.negate = true;
362 bld.CMP(bld.null_reg_f(), dest, zero, BRW_CONDITIONAL_GE);
363
364 /* = Before =
365 *
366 * 0: add(8) dest src0 src1
367 * 1: cmp.ge.f0(8) null -dest 0.0f
368 *
369 * = After =
370 * 0: add.le.f0(8) dest src0 src1
371 */
372
373 v->calculate_cfg();
374 bblock_t *block0 = v->cfg->blocks[0];
375
376 EXPECT_EQ(0, block0->start_ip);
377 EXPECT_EQ(1, block0->end_ip);
378
379 EXPECT_TRUE(cmod_propagation(v));
380 EXPECT_EQ(0, block0->start_ip);
381 EXPECT_EQ(0, block0->end_ip);
382 EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
383 EXPECT_EQ(BRW_CONDITIONAL_LE, instruction(block0, 0)->conditional_mod);
384 }
385
386 TEST_F(cmod_propagation_test, movnz)
387 {
388 const fs_builder &bld = v->bld;
389 fs_reg dest = v->vgrf(glsl_type::float_type);
390 fs_reg src0 = v->vgrf(glsl_type::float_type);
391 fs_reg src1 = v->vgrf(glsl_type::float_type);
392 bld.CMP(dest, src0, src1, BRW_CONDITIONAL_GE);
393 set_condmod(BRW_CONDITIONAL_NZ,
394 bld.MOV(bld.null_reg_f(), dest));
395
396 /* = Before =
397 *
398 * 0: cmp.ge.f0(8) dest src0 src1
399 * 1: mov.nz.f0(8) null dest
400 *
401 * = After =
402 * 0: cmp.ge.f0(8) dest src0 src1
403 */
404
405 v->calculate_cfg();
406 bblock_t *block0 = v->cfg->blocks[0];
407
408 EXPECT_EQ(0, block0->start_ip);
409 EXPECT_EQ(1, block0->end_ip);
410
411 EXPECT_TRUE(cmod_propagation(v));
412 EXPECT_EQ(0, block0->start_ip);
413 EXPECT_EQ(0, block0->end_ip);
414 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode);
415 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 0)->conditional_mod);
416 }
417
418 TEST_F(cmod_propagation_test, different_types_cmod_with_zero)
419 {
420 const fs_builder &bld = v->bld;
421 fs_reg dest = v->vgrf(glsl_type::int_type);
422 fs_reg src0 = v->vgrf(glsl_type::int_type);
423 fs_reg src1 = v->vgrf(glsl_type::int_type);
424 fs_reg zero(brw_imm_f(0.0f));
425 bld.ADD(dest, src0, src1);
426 bld.CMP(bld.null_reg_f(), retype(dest, BRW_REGISTER_TYPE_F), zero,
427 BRW_CONDITIONAL_GE);
428
429 /* = Before =
430 *
431 * 0: add(8) dest:D src0:D src1:D
432 * 1: cmp.ge.f0(8) null:F dest:F 0.0f
433 *
434 * = After =
435 * (no changes)
436 */
437
438 v->calculate_cfg();
439 bblock_t *block0 = v->cfg->blocks[0];
440
441 EXPECT_EQ(0, block0->start_ip);
442 EXPECT_EQ(1, block0->end_ip);
443
444 EXPECT_FALSE(cmod_propagation(v));
445 EXPECT_EQ(0, block0->start_ip);
446 EXPECT_EQ(1, block0->end_ip);
447 EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
448 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 1)->opcode);
449 EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod);
450 }
451
452 TEST_F(cmod_propagation_test, andnz_one)
453 {
454 const fs_builder &bld = v->bld;
455 fs_reg dest = v->vgrf(glsl_type::int_type);
456 fs_reg src0 = v->vgrf(glsl_type::float_type);
457 fs_reg zero(brw_imm_f(0.0f));
458 fs_reg one(brw_imm_d(1));
459
460 bld.CMP(retype(dest, BRW_REGISTER_TYPE_F), src0, zero, BRW_CONDITIONAL_L);
461 set_condmod(BRW_CONDITIONAL_NZ,
462 bld.AND(bld.null_reg_d(), dest, one));
463
464 /* = Before =
465 * 0: cmp.l.f0(8) dest:F src0:F 0F
466 * 1: and.nz.f0(8) null:D dest:D 1D
467 *
468 * = After =
469 * 0: cmp.l.f0(8) dest:F src0:F 0F
470 */
471
472 v->calculate_cfg();
473 bblock_t *block0 = v->cfg->blocks[0];
474
475 EXPECT_EQ(0, block0->start_ip);
476 EXPECT_EQ(1, block0->end_ip);
477
478 EXPECT_TRUE(cmod_propagation(v));
479 EXPECT_EQ(0, block0->start_ip);
480 EXPECT_EQ(0, block0->end_ip);
481 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode);
482 EXPECT_EQ(BRW_CONDITIONAL_L, instruction(block0, 0)->conditional_mod);
483 EXPECT_TRUE(retype(dest, BRW_REGISTER_TYPE_F)
484 .equals(instruction(block0, 0)->dst));
485 }
486
487 TEST_F(cmod_propagation_test, andnz_non_one)
488 {
489 const fs_builder &bld = v->bld;
490 fs_reg dest = v->vgrf(glsl_type::int_type);
491 fs_reg src0 = v->vgrf(glsl_type::float_type);
492 fs_reg zero(brw_imm_f(0.0f));
493 fs_reg nonone(brw_imm_d(38));
494
495 bld.CMP(retype(dest, BRW_REGISTER_TYPE_F), src0, zero, BRW_CONDITIONAL_L);
496 set_condmod(BRW_CONDITIONAL_NZ,
497 bld.AND(bld.null_reg_d(), dest, nonone));
498
499 /* = Before =
500 * 0: cmp.l.f0(8) dest:F src0:F 0F
501 * 1: and.nz.f0(8) null:D dest:D 38D
502 *
503 * = After =
504 * (no changes)
505 */
506
507 v->calculate_cfg();
508 bblock_t *block0 = v->cfg->blocks[0];
509
510 EXPECT_EQ(0, block0->start_ip);
511 EXPECT_EQ(1, block0->end_ip);
512
513 EXPECT_FALSE(cmod_propagation(v));
514 EXPECT_EQ(0, block0->start_ip);
515 EXPECT_EQ(1, block0->end_ip);
516 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode);
517 EXPECT_EQ(BRW_CONDITIONAL_L, instruction(block0, 0)->conditional_mod);
518 EXPECT_EQ(BRW_OPCODE_AND, instruction(block0, 1)->opcode);
519 EXPECT_EQ(BRW_CONDITIONAL_NZ, instruction(block0, 1)->conditional_mod);
520 }
521
522 TEST_F(cmod_propagation_test, andz_one)
523 {
524 const fs_builder &bld = v->bld;
525 fs_reg dest = v->vgrf(glsl_type::int_type);
526 fs_reg src0 = v->vgrf(glsl_type::float_type);
527 fs_reg zero(brw_imm_f(0.0f));
528 fs_reg one(brw_imm_d(1));
529
530 bld.CMP(retype(dest, BRW_REGISTER_TYPE_F), src0, zero, BRW_CONDITIONAL_L);
531 set_condmod(BRW_CONDITIONAL_Z,
532 bld.AND(bld.null_reg_d(), dest, one));
533
534 /* = Before =
535 * 0: cmp.l.f0(8) dest:F src0:F 0F
536 * 1: and.z.f0(8) null:D dest:D 1D
537 *
538 * = After =
539 * (no changes)
540 */
541
542 v->calculate_cfg();
543 bblock_t *block0 = v->cfg->blocks[0];
544
545 EXPECT_EQ(0, block0->start_ip);
546 EXPECT_EQ(1, block0->end_ip);
547
548 EXPECT_FALSE(cmod_propagation(v));
549 EXPECT_EQ(0, block0->start_ip);
550 EXPECT_EQ(1, block0->end_ip);
551 EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode);
552 EXPECT_EQ(BRW_CONDITIONAL_L, instruction(block0, 0)->conditional_mod);
553 EXPECT_EQ(BRW_OPCODE_AND, instruction(block0, 1)->opcode);
554 EXPECT_EQ(BRW_CONDITIONAL_EQ, instruction(block0, 1)->conditional_mod);
555 }