src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <gtest/gtest.h>
  25 #include "brw_vec4.h"
  26
  27 using namespace brw;
  28
  29 int ret = 0;
  30
  31 #define register_coalesce(v) _register_coalesce(v, __FUNCTION__)
  32
  33 class register_coalesce_test : public ::testing::Test {
  34    virtual void SetUp();
  35
  36 public:
  37    struct brw_context *brw;
  38    struct intel_context *intel;
  39    struct gl_context *ctx;
  40    struct gl_shader_program *shader_prog;
  41    struct brw_vertex_program *vp;
  42    vec4_visitor *v;
  43 };
  44
  45
  46 class register_coalesce_vec4_visitor : public vec4_visitor
  47 {
  48 public:
  49    register_coalesce_vec4_visitor(struct brw_context *brw,
  50                                   struct gl_shader_program *shader_prog)
  51       : vec4_visitor(brw, NULL, NULL, NULL, NULL, shader_prog, NULL, NULL,
  52                      false)
  53    {
  54    }
  55
  56 protected:
  57    virtual dst_reg *make_reg_for_system_value(ir_variable *ir)
  58    {
  59       assert(!"Not reached");
  60       return NULL;
  61    }
  62
  63    virtual int setup_attributes(int payload_reg)
  64    {
  65       assert(!"Not reached");
  66       return 0;
  67    }
  68
  69    virtual void emit_prolog()
  70    {
  71       assert(!"Not reached");
  72    }
  73
  74    virtual void emit_program_code()
  75    {
  76       assert(!"Not reached");
  77    }
  78
  79    virtual void emit_thread_end()
  80    {
  81       assert(!"Not reached");
  82    }
  83
  84    virtual void emit_urb_write_header(int mrf)
  85    {
  86       assert(!"Not reached");
  87    }
  88
  89    virtual vec4_instruction *emit_urb_write_opcode(bool complete)
  90    {
  91       assert(!"Not reached");
  92    }
  93 };
  94
  95
  96 void register_coalesce_test::SetUp()
  97 {
  98    brw = (struct brw_context *)calloc(1, sizeof(*brw));
  99    intel = &brw->intel;
 100    ctx = &intel->ctx;
 101
 102    vp = ralloc(NULL, struct brw_vertex_program);
 103
 104    shader_prog = ralloc(NULL, struct gl_shader_program);
 105
 106    v = new register_coalesce_vec4_visitor(brw, shader_prog);
 107
 108    _mesa_init_vertex_program(ctx, &vp->program, GL_VERTEX_SHADER, 0);
 109
 110    intel->gen = 4;
 111 }
 112
 113 static void
 114 _register_coalesce(vec4_visitor *v, const char *func)
 115 {
 116    bool print = false;
 117
 118    if (print) {
 119       printf("%s: instructions before:\n", func);
 120       v->dump_instructions();
 121    }
 122
 123    v->opt_register_coalesce();
 124
 125    if (print) {
 126       printf("%s: instructions after:\n", func);
 127       v->dump_instructions();
 128    }
 129 }
 130
 131 TEST_F(register_coalesce_test, test_compute_to_mrf)
 132 {
 133    src_reg something = src_reg(v, glsl_type::float_type);
 134    dst_reg temp = dst_reg(v, glsl_type::float_type);
 135    dst_reg init;
 136
 137    dst_reg m0 = dst_reg(MRF, 0);
 138    m0.writemask = WRITEMASK_X;
 139    m0.type = BRW_REGISTER_TYPE_F;
 140
 141    vec4_instruction *mul = v->emit(v->MUL(temp, something, src_reg(1.0f)));
 142    v->emit(v->MOV(m0, src_reg(temp)));
 143
 144    register_coalesce(v);
 145
 146    EXPECT_EQ(mul->dst.file, MRF);
 147 }
 148
 149
 150 TEST_F(register_coalesce_test, test_multiple_use)
 151 {
 152    src_reg something = src_reg(v, glsl_type::float_type);
 153    dst_reg temp = dst_reg(v, glsl_type::vec4_type);
 154    dst_reg init;
 155
 156    dst_reg m0 = dst_reg(MRF, 0);
 157    m0.writemask = WRITEMASK_X;
 158    m0.type = BRW_REGISTER_TYPE_F;
 159
 160    dst_reg m1 = dst_reg(MRF, 1);
 161    m1.writemask = WRITEMASK_XYZW;
 162    m1.type = BRW_REGISTER_TYPE_F;
 163
 164    src_reg src = src_reg(temp);
 165    vec4_instruction *mul = v->emit(v->MUL(temp, something, src_reg(1.0f)));
 166    src.swizzle = BRW_SWIZZLE_XXXX;
 167    v->emit(v->MOV(m0, src));
 168    src.swizzle = BRW_SWIZZLE_XYZW;
 169    v->emit(v->MOV(m1, src));
 170
 171    register_coalesce(v);
 172
 173    EXPECT_NE(mul->dst.file, MRF);
 174 }
 175
 176 TEST_F(register_coalesce_test, test_dp4_mrf)
 177 {
 178    src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
 179    src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
 180    dst_reg init;
 181
 182    dst_reg m0 = dst_reg(MRF, 0);
 183    m0.writemask = WRITEMASK_Y;
 184    m0.type = BRW_REGISTER_TYPE_F;
 185
 186    dst_reg temp = dst_reg(v, glsl_type::float_type);
 187
 188    vec4_instruction *dp4 = v->emit(v->DP4(temp, some_src_1, some_src_2));
 189    v->emit(v->MOV(m0, src_reg(temp)));
 190
 191    register_coalesce(v);
 192
 193    EXPECT_EQ(dp4->dst.file, MRF);
 194    EXPECT_EQ(dp4->dst.writemask, WRITEMASK_Y);
 195 }
 196
 197 TEST_F(register_coalesce_test, test_dp4_grf)
 198 {
 199    src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
 200    src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
 201    dst_reg init;
 202
 203    dst_reg to = dst_reg(v, glsl_type::vec4_type);
 204    dst_reg temp = dst_reg(v, glsl_type::float_type);
 205
 206    vec4_instruction *dp4 = v->emit(v->DP4(temp, some_src_1, some_src_2));
 207    to.writemask = WRITEMASK_Y;
 208    v->emit(v->MOV(to, src_reg(temp)));
 209
 210    /* if we don't do something with the result, the automatic dead code
 211     * elimination will remove all our instructions.
 212     */
 213    src_reg src = src_reg(to);
 214    src.negate = true;
 215    v->emit(v->MOV(dst_reg(MRF, 0), src));
 216
 217    register_coalesce(v);
 218
 219    EXPECT_EQ(dp4->dst.reg, to.reg);
 220    EXPECT_EQ(dp4->dst.writemask, WRITEMASK_Y);
 221 }
 222
 223 TEST_F(register_coalesce_test, test_channel_mul_grf)
 224 {
 225    src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
 226    src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
 227    dst_reg init;
 228
 229    dst_reg to = dst_reg(v, glsl_type::vec4_type);
 230    dst_reg temp = dst_reg(v, glsl_type::float_type);
 231
 232    vec4_instruction *mul = v->emit(v->MUL(temp, some_src_1, some_src_2));
 233    to.writemask = WRITEMASK_Y;
 234    v->emit(v->MOV(to, src_reg(temp)));
 235
 236    /* if we don't do something with the result, the automatic dead code
 237     * elimination will remove all our instructions.
 238     */
 239    src_reg src = src_reg(to);
 240    src.negate = true;
 241    v->emit(v->MOV(dst_reg(MRF, 0), src));
 242
 243    register_coalesce(v);
 244
 245    /* This path isn't supported yet in the reswizzling code, so we're checking
 246     * that we haven't done anything bad to scalar non-DP[234]s.
 247     */
 248    EXPECT_NE(mul->dst.reg, to.reg);
 249 }