src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <gtest/gtest.h>
  25 #include "brw_vec4.h"
  26 #include "brw_vs.h"
  27
  28 using namespace brw;
  29
  30 int ret = 0;
  31
  32 #define register_coalesce(v) _register_coalesce(v, __FUNCTION__)
  33
  34 class register_coalesce_test : public ::testing::Test {
  35    virtual void SetUp();
  36
  37 public:
  38    struct brw_context *brw;
  39    struct gl_context *ctx;
  40    struct gl_shader_program *shader_prog;
  41    struct brw_vertex_program *vp;
  42    vec4_visitor *v;
  43 };
  44
  45
  46 class register_coalesce_vec4_visitor : public vec4_visitor
  47 {
  48 public:
  49    register_coalesce_vec4_visitor(struct brw_context *brw,
  50                                   struct gl_shader_program *shader_prog)
  51       : vec4_visitor(brw, NULL, NULL, NULL, NULL, shader_prog,
  52                      MESA_SHADER_VERTEX, NULL,
  53                      false, false /* no_spills */,
  54                      ST_NONE, ST_NONE, ST_NONE)
  55    {
  56    }
  57
  58 protected:
  59    virtual dst_reg *make_reg_for_system_value(ir_variable *ir)
  60    {
  61       assert(!"Not reached");
  62       return NULL;
  63    }
  64
  65    virtual void setup_payload()
  66    {
  67       assert(!"Not reached");
  68    }
  69
  70    virtual void emit_prolog()
  71    {
  72       assert(!"Not reached");
  73    }
  74
  75    virtual void emit_program_code()
  76    {
  77       assert(!"Not reached");
  78    }
  79
  80    virtual void emit_thread_end()
  81    {
  82       assert(!"Not reached");
  83    }
  84
  85    virtual void emit_urb_write_header(int mrf)
  86    {
  87       assert(!"Not reached");
  88    }
  89
  90    virtual vec4_instruction *emit_urb_write_opcode(bool complete)
  91    {
  92       assert(!"Not reached");
  93       unreachable();
  94    }
  95 };
  96
  97
  98 void register_coalesce_test::SetUp()
  99 {
 100    brw = (struct brw_context *)calloc(1, sizeof(*brw));
 101    ctx = &brw->ctx;
 102
 103    vp = ralloc(NULL, struct brw_vertex_program);
 104
 105    shader_prog = ralloc(NULL, struct gl_shader_program);
 106
 107    v = new register_coalesce_vec4_visitor(brw, shader_prog);
 108
 109    _mesa_init_vertex_program(ctx, &vp->program, GL_VERTEX_SHADER, 0);
 110
 111    brw->gen = 4;
 112 }
 113
 114 static void
 115 _register_coalesce(vec4_visitor *v, const char *func)
 116 {
 117    bool print = false;
 118
 119    if (print) {
 120       printf("%s: instructions before:\n", func);
 121       v->dump_instructions();
 122    }
 123
 124    v->opt_register_coalesce();
 125
 126    if (print) {
 127       printf("%s: instructions after:\n", func);
 128       v->dump_instructions();
 129    }
 130 }
 131
 132 TEST_F(register_coalesce_test, test_compute_to_mrf)
 133 {
 134    src_reg something = src_reg(v, glsl_type::float_type);
 135    dst_reg temp = dst_reg(v, glsl_type::float_type);
 136    dst_reg init;
 137
 138    dst_reg m0 = dst_reg(MRF, 0);
 139    m0.writemask = WRITEMASK_X;
 140    m0.type = BRW_REGISTER_TYPE_F;
 141
 142    vec4_instruction *mul = v->emit(v->MUL(temp, something, src_reg(1.0f)));
 143    v->emit(v->MOV(m0, src_reg(temp)));
 144
 145    register_coalesce(v);
 146
 147    EXPECT_EQ(mul->dst.file, MRF);
 148 }
 149
 150
 151 TEST_F(register_coalesce_test, test_multiple_use)
 152 {
 153    src_reg something = src_reg(v, glsl_type::float_type);
 154    dst_reg temp = dst_reg(v, glsl_type::vec4_type);
 155    dst_reg init;
 156
 157    dst_reg m0 = dst_reg(MRF, 0);
 158    m0.writemask = WRITEMASK_X;
 159    m0.type = BRW_REGISTER_TYPE_F;
 160
 161    dst_reg m1 = dst_reg(MRF, 1);
 162    m1.writemask = WRITEMASK_XYZW;
 163    m1.type = BRW_REGISTER_TYPE_F;
 164
 165    src_reg src = src_reg(temp);
 166    vec4_instruction *mul = v->emit(v->MUL(temp, something, src_reg(1.0f)));
 167    src.swizzle = BRW_SWIZZLE_XXXX;
 168    v->emit(v->MOV(m0, src));
 169    src.swizzle = BRW_SWIZZLE_XYZW;
 170    v->emit(v->MOV(m1, src));
 171
 172    register_coalesce(v);
 173
 174    EXPECT_NE(mul->dst.file, MRF);
 175 }
 176
 177 TEST_F(register_coalesce_test, test_dp4_mrf)
 178 {
 179    src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
 180    src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
 181    dst_reg init;
 182
 183    dst_reg m0 = dst_reg(MRF, 0);
 184    m0.writemask = WRITEMASK_Y;
 185    m0.type = BRW_REGISTER_TYPE_F;
 186
 187    dst_reg temp = dst_reg(v, glsl_type::float_type);
 188
 189    vec4_instruction *dp4 = v->emit(v->DP4(temp, some_src_1, some_src_2));
 190    v->emit(v->MOV(m0, src_reg(temp)));
 191
 192    register_coalesce(v);
 193
 194    EXPECT_EQ(dp4->dst.file, MRF);
 195    EXPECT_EQ(dp4->dst.writemask, WRITEMASK_Y);
 196 }
 197
 198 TEST_F(register_coalesce_test, test_dp4_grf)
 199 {
 200    src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
 201    src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
 202    dst_reg init;
 203
 204    dst_reg to = dst_reg(v, glsl_type::vec4_type);
 205    dst_reg temp = dst_reg(v, glsl_type::float_type);
 206
 207    vec4_instruction *dp4 = v->emit(v->DP4(temp, some_src_1, some_src_2));
 208    to.writemask = WRITEMASK_Y;
 209    v->emit(v->MOV(to, src_reg(temp)));
 210
 211    /* if we don't do something with the result, the automatic dead code
 212     * elimination will remove all our instructions.
 213     */
 214    src_reg src = src_reg(to);
 215    src.negate = true;
 216    v->emit(v->MOV(dst_reg(MRF, 0), src));
 217
 218    register_coalesce(v);
 219
 220    EXPECT_EQ(dp4->dst.reg, to.reg);
 221    EXPECT_EQ(dp4->dst.writemask, WRITEMASK_Y);
 222 }
 223
 224 TEST_F(register_coalesce_test, test_channel_mul_grf)
 225 {
 226    src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
 227    src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
 228    dst_reg init;
 229
 230    dst_reg to = dst_reg(v, glsl_type::vec4_type);
 231    dst_reg temp = dst_reg(v, glsl_type::float_type);
 232
 233    vec4_instruction *mul = v->emit(v->MUL(temp, some_src_1, some_src_2));
 234    to.writemask = WRITEMASK_Y;
 235    v->emit(v->MOV(to, src_reg(temp)));
 236
 237    /* if we don't do something with the result, the automatic dead code
 238     * elimination will remove all our instructions.
 239     */
 240    src_reg src = src_reg(to);
 241    src.negate = true;
 242    v->emit(v->MOV(dst_reg(MRF, 0), src));
 243
 244    register_coalesce(v);
 245
 246    /* This path isn't supported yet in the reswizzling code, so we're checking
 247     * that we haven't done anything bad to scalar non-DP[234]s.
 248     */
 249    EXPECT_NE(mul->dst.reg, to.reg);
 250 }