src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <gtest/gtest.h>
  25 #include "brw_vec4.h"
  26 #include "brw_vs.h"
  27
  28 using namespace brw;
  29
  30 int ret = 0;
  31
  32 #define register_coalesce(v) _register_coalesce(v, __FUNCTION__)
  33
  34 class register_coalesce_test : public ::testing::Test {
  35    virtual void SetUp();
  36
  37 public:
  38    struct brw_context *brw;
  39    struct gl_context *ctx;
  40    struct gl_shader_program *shader_prog;
  41    struct brw_vertex_program *vp;
  42    vec4_visitor *v;
  43 };
  44
  45
  46 class register_coalesce_vec4_visitor : public vec4_visitor
  47 {
  48 public:
  49    register_coalesce_vec4_visitor(struct brw_context *brw,
  50                                   struct gl_shader_program *shader_prog)
  51       : vec4_visitor(brw, NULL, NULL, NULL, NULL, shader_prog, NULL, NULL,
  52                      false, false /* no_spills */)
  53    {
  54    }
  55
  56 protected:
  57    virtual dst_reg *make_reg_for_system_value(ir_variable *ir)
  58    {
  59       assert(!"Not reached");
  60       return NULL;
  61    }
  62
  63    virtual void setup_payload()
  64    {
  65       assert(!"Not reached");
  66    }
  67
  68    virtual void emit_prolog()
  69    {
  70       assert(!"Not reached");
  71    }
  72
  73    virtual void emit_program_code()
  74    {
  75       assert(!"Not reached");
  76    }
  77
  78    virtual void emit_thread_end()
  79    {
  80       assert(!"Not reached");
  81    }
  82
  83    virtual void emit_urb_write_header(int mrf)
  84    {
  85       assert(!"Not reached");
  86    }
  87
  88    virtual vec4_instruction *emit_urb_write_opcode(bool complete)
  89    {
  90       assert(!"Not reached");
  91       unreachable();
  92    }
  93 };
  94
  95
  96 void register_coalesce_test::SetUp()
  97 {
  98    brw = (struct brw_context *)calloc(1, sizeof(*brw));
  99    ctx = &brw->ctx;
 100
 101    vp = ralloc(NULL, struct brw_vertex_program);
 102
 103    shader_prog = ralloc(NULL, struct gl_shader_program);
 104
 105    v = new register_coalesce_vec4_visitor(brw, shader_prog);
 106
 107    _mesa_init_vertex_program(ctx, &vp->program, GL_VERTEX_SHADER, 0);
 108
 109    brw->gen = 4;
 110 }
 111
 112 static void
 113 _register_coalesce(vec4_visitor *v, const char *func)
 114 {
 115    bool print = false;
 116
 117    if (print) {
 118       printf("%s: instructions before:\n", func);
 119       v->dump_instructions();
 120    }
 121
 122    v->opt_register_coalesce();
 123
 124    if (print) {
 125       printf("%s: instructions after:\n", func);
 126       v->dump_instructions();
 127    }
 128 }
 129
 130 TEST_F(register_coalesce_test, test_compute_to_mrf)
 131 {
 132    src_reg something = src_reg(v, glsl_type::float_type);
 133    dst_reg temp = dst_reg(v, glsl_type::float_type);
 134    dst_reg init;
 135
 136    dst_reg m0 = dst_reg(MRF, 0);
 137    m0.writemask = WRITEMASK_X;
 138    m0.type = BRW_REGISTER_TYPE_F;
 139
 140    vec4_instruction *mul = v->emit(v->MUL(temp, something, src_reg(1.0f)));
 141    v->emit(v->MOV(m0, src_reg(temp)));
 142
 143    register_coalesce(v);
 144
 145    EXPECT_EQ(mul->dst.file, MRF);
 146 }
 147
 148
 149 TEST_F(register_coalesce_test, test_multiple_use)
 150 {
 151    src_reg something = src_reg(v, glsl_type::float_type);
 152    dst_reg temp = dst_reg(v, glsl_type::vec4_type);
 153    dst_reg init;
 154
 155    dst_reg m0 = dst_reg(MRF, 0);
 156    m0.writemask = WRITEMASK_X;
 157    m0.type = BRW_REGISTER_TYPE_F;
 158
 159    dst_reg m1 = dst_reg(MRF, 1);
 160    m1.writemask = WRITEMASK_XYZW;
 161    m1.type = BRW_REGISTER_TYPE_F;
 162
 163    src_reg src = src_reg(temp);
 164    vec4_instruction *mul = v->emit(v->MUL(temp, something, src_reg(1.0f)));
 165    src.swizzle = BRW_SWIZZLE_XXXX;
 166    v->emit(v->MOV(m0, src));
 167    src.swizzle = BRW_SWIZZLE_XYZW;
 168    v->emit(v->MOV(m1, src));
 169
 170    register_coalesce(v);
 171
 172    EXPECT_NE(mul->dst.file, MRF);
 173 }
 174
 175 TEST_F(register_coalesce_test, test_dp4_mrf)
 176 {
 177    src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
 178    src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
 179    dst_reg init;
 180
 181    dst_reg m0 = dst_reg(MRF, 0);
 182    m0.writemask = WRITEMASK_Y;
 183    m0.type = BRW_REGISTER_TYPE_F;
 184
 185    dst_reg temp = dst_reg(v, glsl_type::float_type);
 186
 187    vec4_instruction *dp4 = v->emit(v->DP4(temp, some_src_1, some_src_2));
 188    v->emit(v->MOV(m0, src_reg(temp)));
 189
 190    register_coalesce(v);
 191
 192    EXPECT_EQ(dp4->dst.file, MRF);
 193    EXPECT_EQ(dp4->dst.writemask, WRITEMASK_Y);
 194 }
 195
 196 TEST_F(register_coalesce_test, test_dp4_grf)
 197 {
 198    src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
 199    src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
 200    dst_reg init;
 201
 202    dst_reg to = dst_reg(v, glsl_type::vec4_type);
 203    dst_reg temp = dst_reg(v, glsl_type::float_type);
 204
 205    vec4_instruction *dp4 = v->emit(v->DP4(temp, some_src_1, some_src_2));
 206    to.writemask = WRITEMASK_Y;
 207    v->emit(v->MOV(to, src_reg(temp)));
 208
 209    /* if we don't do something with the result, the automatic dead code
 210     * elimination will remove all our instructions.
 211     */
 212    src_reg src = src_reg(to);
 213    src.negate = true;
 214    v->emit(v->MOV(dst_reg(MRF, 0), src));
 215
 216    register_coalesce(v);
 217
 218    EXPECT_EQ(dp4->dst.reg, to.reg);
 219    EXPECT_EQ(dp4->dst.writemask, WRITEMASK_Y);
 220 }
 221
 222 TEST_F(register_coalesce_test, test_channel_mul_grf)
 223 {
 224    src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
 225    src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
 226    dst_reg init;
 227
 228    dst_reg to = dst_reg(v, glsl_type::vec4_type);
 229    dst_reg temp = dst_reg(v, glsl_type::float_type);
 230
 231    vec4_instruction *mul = v->emit(v->MUL(temp, some_src_1, some_src_2));
 232    to.writemask = WRITEMASK_Y;
 233    v->emit(v->MOV(to, src_reg(temp)));
 234
 235    /* if we don't do something with the result, the automatic dead code
 236     * elimination will remove all our instructions.
 237     */
 238    src_reg src = src_reg(to);
 239    src.negate = true;
 240    v->emit(v->MOV(dst_reg(MRF, 0), src));
 241
 242    register_coalesce(v);
 243
 244    /* This path isn't supported yet in the reswizzling code, so we're checking
 245     * that we haven't done anything bad to scalar non-DP[234]s.
 246     */
 247    EXPECT_NE(mul->dst.reg, to.reg);
 248 }