src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <gtest/gtest.h>
  25 #include "brw_vec4.h"
  26 #include "brw_vs.h"
  27
  28 using namespace brw;
  29
  30 int ret = 0;
  31
  32 #define register_coalesce(v) _register_coalesce(v, __func__)
  33
  34 class register_coalesce_test : public ::testing::Test {
  35    virtual void SetUp();
  36
  37 public:
  38    struct brw_compiler *compiler;
  39    struct brw_device_info *devinfo;
  40    struct gl_context *ctx;
  41    struct gl_shader_program *shader_prog;
  42    struct brw_vertex_program *vp;
  43    vec4_visitor *v;
  44 };
  45
  46
  47 class register_coalesce_vec4_visitor : public vec4_visitor
  48 {
  49 public:
  50    register_coalesce_vec4_visitor(struct brw_compiler *compiler,
  51                                   struct gl_shader_program *shader_prog)
  52       : vec4_visitor(compiler, NULL, NULL, NULL, NULL, shader_prog,
  53                      MESA_SHADER_VERTEX, NULL,
  54                      false /* no_spills */, -1)
  55    {
  56    }
  57
  58 protected:
  59    virtual dst_reg *make_reg_for_system_value(int location,
  60                                               const glsl_type *type)
  61    {
  62       unreachable("Not reached");
  63    }
  64
  65    virtual void setup_payload()
  66    {
  67       unreachable("Not reached");
  68    }
  69
  70    virtual void emit_prolog()
  71    {
  72       unreachable("Not reached");
  73    }
  74
  75    virtual void emit_program_code()
  76    {
  77       unreachable("Not reached");
  78    }
  79
  80    virtual void emit_thread_end()
  81    {
  82       unreachable("Not reached");
  83    }
  84
  85    virtual void emit_urb_write_header(int mrf)
  86    {
  87       unreachable("Not reached");
  88    }
  89
  90    virtual vec4_instruction *emit_urb_write_opcode(bool complete)
  91    {
  92       unreachable("Not reached");
  93    }
  94 };
  95
  96
  97 void register_coalesce_test::SetUp()
  98 {
  99    ctx = (struct gl_context *)calloc(1, sizeof(*ctx));
 100    compiler = (struct brw_compiler *)calloc(1, sizeof(*compiler));
 101    devinfo = (struct brw_device_info *)calloc(1, sizeof(*devinfo));
 102    compiler->devinfo = devinfo;
 103
 104    vp = ralloc(NULL, struct brw_vertex_program);
 105
 106    shader_prog = ralloc(NULL, struct gl_shader_program);
 107
 108    v = new register_coalesce_vec4_visitor(compiler, shader_prog);
 109
 110    _mesa_init_vertex_program(ctx, &vp->program, GL_VERTEX_SHADER, 0);
 111
 112    devinfo->gen = 4;
 113 }
 114
 115 static void
 116 _register_coalesce(vec4_visitor *v, const char *func)
 117 {
 118    bool print = false;
 119
 120    if (print) {
 121       printf("%s: instructions before:\n", func);
 122       v->dump_instructions();
 123    }
 124
 125    v->calculate_cfg();
 126    v->opt_register_coalesce();
 127
 128    if (print) {
 129       printf("%s: instructions after:\n", func);
 130       v->dump_instructions();
 131    }
 132 }
 133
 134 TEST_F(register_coalesce_test, test_compute_to_mrf)
 135 {
 136    src_reg something = src_reg(v, glsl_type::float_type);
 137    dst_reg temp = dst_reg(v, glsl_type::float_type);
 138    dst_reg init;
 139
 140    dst_reg m0 = dst_reg(MRF, 0);
 141    m0.writemask = WRITEMASK_X;
 142    m0.type = BRW_REGISTER_TYPE_F;
 143
 144    vec4_instruction *mul = v->emit(v->MUL(temp, something, src_reg(1.0f)));
 145    v->emit(v->MOV(m0, src_reg(temp)));
 146
 147    register_coalesce(v);
 148
 149    EXPECT_EQ(mul->dst.file, MRF);
 150 }
 151
 152
 153 TEST_F(register_coalesce_test, test_multiple_use)
 154 {
 155    src_reg something = src_reg(v, glsl_type::float_type);
 156    dst_reg temp = dst_reg(v, glsl_type::vec4_type);
 157    dst_reg init;
 158
 159    dst_reg m0 = dst_reg(MRF, 0);
 160    m0.writemask = WRITEMASK_X;
 161    m0.type = BRW_REGISTER_TYPE_F;
 162
 163    dst_reg m1 = dst_reg(MRF, 1);
 164    m1.writemask = WRITEMASK_XYZW;
 165    m1.type = BRW_REGISTER_TYPE_F;
 166
 167    src_reg src = src_reg(temp);
 168    vec4_instruction *mul = v->emit(v->MUL(temp, something, src_reg(1.0f)));
 169    src.swizzle = BRW_SWIZZLE_XXXX;
 170    v->emit(v->MOV(m0, src));
 171    src.swizzle = BRW_SWIZZLE_XYZW;
 172    v->emit(v->MOV(m1, src));
 173
 174    register_coalesce(v);
 175
 176    EXPECT_NE(mul->dst.file, MRF);
 177 }
 178
 179 TEST_F(register_coalesce_test, test_dp4_mrf)
 180 {
 181    src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
 182    src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
 183    dst_reg init;
 184
 185    dst_reg m0 = dst_reg(MRF, 0);
 186    m0.writemask = WRITEMASK_Y;
 187    m0.type = BRW_REGISTER_TYPE_F;
 188
 189    dst_reg temp = dst_reg(v, glsl_type::float_type);
 190
 191    vec4_instruction *dp4 = v->emit(v->DP4(temp, some_src_1, some_src_2));
 192    v->emit(v->MOV(m0, src_reg(temp)));
 193
 194    register_coalesce(v);
 195
 196    EXPECT_EQ(dp4->dst.file, MRF);
 197    EXPECT_EQ(dp4->dst.writemask, WRITEMASK_Y);
 198 }
 199
 200 TEST_F(register_coalesce_test, test_dp4_grf)
 201 {
 202    src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
 203    src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
 204    dst_reg init;
 205
 206    dst_reg to = dst_reg(v, glsl_type::vec4_type);
 207    dst_reg temp = dst_reg(v, glsl_type::float_type);
 208
 209    vec4_instruction *dp4 = v->emit(v->DP4(temp, some_src_1, some_src_2));
 210    to.writemask = WRITEMASK_Y;
 211    v->emit(v->MOV(to, src_reg(temp)));
 212
 213    /* if we don't do something with the result, the automatic dead code
 214     * elimination will remove all our instructions.
 215     */
 216    src_reg src = src_reg(to);
 217    src.negate = true;
 218    v->emit(v->MOV(dst_reg(MRF, 0), src));
 219
 220    register_coalesce(v);
 221
 222    EXPECT_EQ(dp4->dst.reg, to.reg);
 223    EXPECT_EQ(dp4->dst.writemask, WRITEMASK_Y);
 224 }
 225
 226 TEST_F(register_coalesce_test, test_channel_mul_grf)
 227 {
 228    src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
 229    src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
 230    dst_reg init;
 231
 232    dst_reg to = dst_reg(v, glsl_type::vec4_type);
 233    dst_reg temp = dst_reg(v, glsl_type::float_type);
 234
 235    vec4_instruction *mul = v->emit(v->MUL(temp, some_src_1, some_src_2));
 236    to.writemask = WRITEMASK_Y;
 237    v->emit(v->MOV(to, src_reg(temp)));
 238
 239    /* if we don't do something with the result, the automatic dead code
 240     * elimination will remove all our instructions.
 241     */
 242    src_reg src = src_reg(to);
 243    src.negate = true;
 244    v->emit(v->MOV(dst_reg(MRF, 0), src));
 245
 246    register_coalesce(v);
 247
 248    EXPECT_EQ(mul->dst.reg, to.reg);
 249 }