2 * Copyright © 2012 Intel Corporation
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9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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24 #include <gtest/gtest.h>
31 #define register_coalesce(v) _register_coalesce(v, __FUNCTION__)
33 class register_coalesce_test
: public ::testing::Test
{
37 struct brw_context
*brw
;
38 struct intel_context
*intel
;
39 struct gl_context
*ctx
;
40 struct gl_shader_program
*shader_prog
;
41 struct brw_vs_compile
*c
;
45 void register_coalesce_test::SetUp()
47 brw
= (struct brw_context
*)calloc(1, sizeof(*brw
));
51 c
= ralloc(NULL
, struct brw_vs_compile
);
52 c
->vp
= ralloc(NULL
, struct brw_vertex_program
);
54 shader_prog
= ralloc(NULL
, struct gl_shader_program
);
56 v
= new vec4_visitor(brw
, c
, shader_prog
, NULL
, NULL
);
58 _mesa_init_vertex_program(ctx
, &c
->vp
->program
, GL_VERTEX_SHADER
, 0);
64 _register_coalesce(vec4_visitor
*v
, const char *func
)
69 printf("%s: instructions before:\n", func
);
70 v
->dump_instructions();
73 v
->opt_compute_to_mrf();
76 printf("%s: instructions after:\n", func
);
77 v
->dump_instructions();
81 TEST_F(register_coalesce_test
, test_easy_success
)
83 src_reg something
= src_reg(v
, glsl_type::float_type
);
84 dst_reg temp
= dst_reg(v
, glsl_type::float_type
);
87 dst_reg m0
= dst_reg(MRF
, 0);
88 m0
.writemask
= WRITEMASK_X
;
89 m0
.type
= BRW_REGISTER_TYPE_F
;
91 vec4_instruction
*mul
= v
->emit(v
->MUL(temp
, something
, src_reg(1.0f
)));
92 v
->emit(v
->MOV(m0
, src_reg(temp
)));
96 EXPECT_EQ(mul
->dst
.file
, MRF
);
100 TEST_F(register_coalesce_test
, test_multiple_use
)
102 src_reg something
= src_reg(v
, glsl_type::float_type
);
103 dst_reg temp
= dst_reg(v
, glsl_type::vec4_type
);
106 dst_reg m0
= dst_reg(MRF
, 0);
107 m0
.writemask
= WRITEMASK_X
;
108 m0
.type
= BRW_REGISTER_TYPE_F
;
110 dst_reg m1
= dst_reg(MRF
, 1);
111 m1
.writemask
= WRITEMASK_XYZW
;
112 m1
.type
= BRW_REGISTER_TYPE_F
;
114 src_reg src
= src_reg(temp
);
115 vec4_instruction
*mul
= v
->emit(v
->MUL(temp
, something
, src_reg(1.0f
)));
116 src
.swizzle
= BRW_SWIZZLE_XXXX
;
117 v
->emit(v
->MOV(m0
, src
));
118 src
.swizzle
= BRW_SWIZZLE_XYZW
;
119 v
->emit(v
->MOV(m1
, src
));
121 register_coalesce(v
);
123 EXPECT_NE(mul
->dst
.file
, MRF
);