src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <gtest/gtest.h>
  25 #include "brw_vec4.h"
  26 #include "brw_vs.h"
  27
  28 using namespace brw;
  29
  30 int ret = 0;
  31
  32 #define register_coalesce(v) _register_coalesce(v, __func__)
  33
  34 class register_coalesce_test : public ::testing::Test {
  35    virtual void SetUp();
  36
  37 public:
  38    struct brw_compiler *compiler;
  39    struct brw_device_info *devinfo;
  40    struct gl_context *ctx;
  41    struct gl_shader_program *shader_prog;
  42    struct brw_vertex_program *vp;
  43    vec4_visitor *v;
  44 };
  45
  46
  47 class register_coalesce_vec4_visitor : public vec4_visitor
  48 {
  49 public:
  50    register_coalesce_vec4_visitor(struct brw_compiler *compiler,
  51                                   struct gl_shader_program *shader_prog)
  52       : vec4_visitor(compiler, NULL, NULL, NULL, NULL, shader_prog,
  53                      MESA_SHADER_VERTEX, NULL,
  54                      false /* no_spills */, -1)
  55    {
  56    }
  57
  58 protected:
  59    virtual dst_reg *make_reg_for_system_value(ir_variable *ir)
  60    {
  61       unreachable("Not reached");
  62    }
  63
  64    virtual void setup_payload()
  65    {
  66       unreachable("Not reached");
  67    }
  68
  69    virtual void emit_prolog()
  70    {
  71       unreachable("Not reached");
  72    }
  73
  74    virtual void emit_program_code()
  75    {
  76       unreachable("Not reached");
  77    }
  78
  79    virtual void emit_thread_end()
  80    {
  81       unreachable("Not reached");
  82    }
  83
  84    virtual void emit_urb_write_header(int mrf)
  85    {
  86       unreachable("Not reached");
  87    }
  88
  89    virtual vec4_instruction *emit_urb_write_opcode(bool complete)
  90    {
  91       unreachable("Not reached");
  92    }
  93 };
  94
  95
  96 void register_coalesce_test::SetUp()
  97 {
  98    ctx = (struct gl_context *)calloc(1, sizeof(*ctx));
  99    compiler = (struct brw_compiler *)calloc(1, sizeof(*compiler));
 100    devinfo = (struct brw_device_info *)calloc(1, sizeof(*devinfo));
 101    compiler->devinfo = devinfo;
 102
 103    vp = ralloc(NULL, struct brw_vertex_program);
 104
 105    shader_prog = ralloc(NULL, struct gl_shader_program);
 106
 107    v = new register_coalesce_vec4_visitor(compiler, shader_prog);
 108
 109    _mesa_init_vertex_program(ctx, &vp->program, GL_VERTEX_SHADER, 0);
 110
 111    devinfo->gen = 4;
 112 }
 113
 114 static void
 115 _register_coalesce(vec4_visitor *v, const char *func)
 116 {
 117    bool print = false;
 118
 119    if (print) {
 120       printf("%s: instructions before:\n", func);
 121       v->dump_instructions();
 122    }
 123
 124    v->calculate_cfg();
 125    v->opt_register_coalesce();
 126
 127    if (print) {
 128       printf("%s: instructions after:\n", func);
 129       v->dump_instructions();
 130    }
 131 }
 132
 133 TEST_F(register_coalesce_test, test_compute_to_mrf)
 134 {
 135    src_reg something = src_reg(v, glsl_type::float_type);
 136    dst_reg temp = dst_reg(v, glsl_type::float_type);
 137    dst_reg init;
 138
 139    dst_reg m0 = dst_reg(MRF, 0);
 140    m0.writemask = WRITEMASK_X;
 141    m0.type = BRW_REGISTER_TYPE_F;
 142
 143    vec4_instruction *mul = v->emit(v->MUL(temp, something, src_reg(1.0f)));
 144    v->emit(v->MOV(m0, src_reg(temp)));
 145
 146    register_coalesce(v);
 147
 148    EXPECT_EQ(mul->dst.file, MRF);
 149 }
 150
 151
 152 TEST_F(register_coalesce_test, test_multiple_use)
 153 {
 154    src_reg something = src_reg(v, glsl_type::float_type);
 155    dst_reg temp = dst_reg(v, glsl_type::vec4_type);
 156    dst_reg init;
 157
 158    dst_reg m0 = dst_reg(MRF, 0);
 159    m0.writemask = WRITEMASK_X;
 160    m0.type = BRW_REGISTER_TYPE_F;
 161
 162    dst_reg m1 = dst_reg(MRF, 1);
 163    m1.writemask = WRITEMASK_XYZW;
 164    m1.type = BRW_REGISTER_TYPE_F;
 165
 166    src_reg src = src_reg(temp);
 167    vec4_instruction *mul = v->emit(v->MUL(temp, something, src_reg(1.0f)));
 168    src.swizzle = BRW_SWIZZLE_XXXX;
 169    v->emit(v->MOV(m0, src));
 170    src.swizzle = BRW_SWIZZLE_XYZW;
 171    v->emit(v->MOV(m1, src));
 172
 173    register_coalesce(v);
 174
 175    EXPECT_NE(mul->dst.file, MRF);
 176 }
 177
 178 TEST_F(register_coalesce_test, test_dp4_mrf)
 179 {
 180    src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
 181    src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
 182    dst_reg init;
 183
 184    dst_reg m0 = dst_reg(MRF, 0);
 185    m0.writemask = WRITEMASK_Y;
 186    m0.type = BRW_REGISTER_TYPE_F;
 187
 188    dst_reg temp = dst_reg(v, glsl_type::float_type);
 189
 190    vec4_instruction *dp4 = v->emit(v->DP4(temp, some_src_1, some_src_2));
 191    v->emit(v->MOV(m0, src_reg(temp)));
 192
 193    register_coalesce(v);
 194
 195    EXPECT_EQ(dp4->dst.file, MRF);
 196    EXPECT_EQ(dp4->dst.writemask, WRITEMASK_Y);
 197 }
 198
 199 TEST_F(register_coalesce_test, test_dp4_grf)
 200 {
 201    src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
 202    src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
 203    dst_reg init;
 204
 205    dst_reg to = dst_reg(v, glsl_type::vec4_type);
 206    dst_reg temp = dst_reg(v, glsl_type::float_type);
 207
 208    vec4_instruction *dp4 = v->emit(v->DP4(temp, some_src_1, some_src_2));
 209    to.writemask = WRITEMASK_Y;
 210    v->emit(v->MOV(to, src_reg(temp)));
 211
 212    /* if we don't do something with the result, the automatic dead code
 213     * elimination will remove all our instructions.
 214     */
 215    src_reg src = src_reg(to);
 216    src.negate = true;
 217    v->emit(v->MOV(dst_reg(MRF, 0), src));
 218
 219    register_coalesce(v);
 220
 221    EXPECT_EQ(dp4->dst.reg, to.reg);
 222    EXPECT_EQ(dp4->dst.writemask, WRITEMASK_Y);
 223 }
 224
 225 TEST_F(register_coalesce_test, test_channel_mul_grf)
 226 {
 227    src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
 228    src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
 229    dst_reg init;
 230
 231    dst_reg to = dst_reg(v, glsl_type::vec4_type);
 232    dst_reg temp = dst_reg(v, glsl_type::float_type);
 233
 234    vec4_instruction *mul = v->emit(v->MUL(temp, some_src_1, some_src_2));
 235    to.writemask = WRITEMASK_Y;
 236    v->emit(v->MOV(to, src_reg(temp)));
 237
 238    /* if we don't do something with the result, the automatic dead code
 239     * elimination will remove all our instructions.
 240     */
 241    src_reg src = src_reg(to);
 242    src.negate = true;
 243    v->emit(v->MOV(dst_reg(MRF, 0), src));
 244
 245    register_coalesce(v);
 246
 247    EXPECT_EQ(mul->dst.reg, to.reg);
 248 }