1 /**************************************************************************
3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #include "intel_context.h"
29 #include "intel_batchbuffer.h"
30 #include "intel_decode.h"
31 #include "intel_reg.h"
32 #include "intel_bufmgr.h"
33 #include "intel_buffers.h"
36 intel_batchbuffer_reset(struct intel_batchbuffer
*batch
)
38 struct intel_context
*intel
= batch
->intel
;
40 if (batch
->buf
!= NULL
) {
41 drm_intel_bo_unreference(batch
->buf
);
45 batch
->buf
= drm_intel_bo_alloc(intel
->bufmgr
, "batchbuffer",
46 intel
->maxBatchSize
, 4096);
47 batch
->map
= batch
->buffer
;
48 batch
->size
= intel
->maxBatchSize
;
49 batch
->ptr
= batch
->map
;
50 batch
->reserved_space
= BATCH_RESERVED
;
51 batch
->dirty_state
= ~0;
52 batch
->state_batch_offset
= batch
->size
;
55 struct intel_batchbuffer
*
56 intel_batchbuffer_alloc(struct intel_context
*intel
)
58 struct intel_batchbuffer
*batch
= calloc(sizeof(*batch
), 1);
61 batch
->buffer
= malloc(intel
->maxBatchSize
);
62 intel_batchbuffer_reset(batch
);
68 intel_batchbuffer_free(struct intel_batchbuffer
*batch
)
71 drm_intel_bo_unreference(batch
->buf
);
78 /* TODO: Push this whole function into bufmgr.
81 do_flush_locked(struct intel_batchbuffer
*batch
, GLuint used
)
83 struct intel_context
*intel
= batch
->intel
;
85 int x_off
= 0, y_off
= 0;
87 drm_intel_bo_subdata(batch
->buf
, 0, used
, batch
->buffer
);
88 if (batch
->state_batch_offset
!= batch
->size
) {
89 drm_intel_bo_subdata(batch
->buf
,
90 batch
->state_batch_offset
,
91 batch
->size
- batch
->state_batch_offset
,
92 batch
->buffer
+ batch
->state_batch_offset
);
98 drm_intel_bo_exec(batch
->buf
, used
, NULL
, 0,
99 (x_off
& 0xffff) | (y_off
<< 16));
102 if (INTEL_DEBUG
& DEBUG_BATCH
) {
103 drm_intel_bo_map(batch
->buf
, GL_FALSE
);
104 intel_decode(batch
->buf
->virtual, used
/ 4, batch
->buf
->offset
,
105 intel
->intelScreen
->deviceID
, GL_TRUE
);
106 drm_intel_bo_unmap(batch
->buf
);
108 if (intel
->vtbl
.debug_batch
!= NULL
)
109 intel
->vtbl
.debug_batch(intel
);
115 intel
->vtbl
.new_batch(intel
);
119 _intel_batchbuffer_flush(struct intel_batchbuffer
*batch
, const char *file
,
122 struct intel_context
*intel
= batch
->intel
;
123 GLuint used
= batch
->ptr
- batch
->map
;
125 if (intel
->first_post_swapbuffers_batch
== NULL
) {
126 intel
->first_post_swapbuffers_batch
= intel
->batch
->buf
;
127 drm_intel_bo_reference(intel
->first_post_swapbuffers_batch
);
133 if (INTEL_DEBUG
& DEBUG_BATCH
)
134 fprintf(stderr
, "%s:%d: Batchbuffer flush with %db used\n", file
, line
,
137 batch
->reserved_space
= 0;
139 if (intel
->always_flush_cache
) {
140 intel_batchbuffer_emit_mi_flush(batch
);
141 used
= batch
->ptr
- batch
->map
;
144 /* Round batchbuffer usage to 2 DWORDs. */
146 if ((used
& 4) == 0) {
147 *(GLuint
*) (batch
->ptr
) = 0; /* noop */
149 used
= batch
->ptr
- batch
->map
;
152 /* Mark the end of the buffer. */
153 *(GLuint
*) (batch
->ptr
) = MI_BATCH_BUFFER_END
;
155 used
= batch
->ptr
- batch
->map
;
156 assert (used
<= batch
->buf
->size
);
158 /* Workaround for recursive batchbuffer flushing: If the window is
159 * moved, we can get into a case where we try to flush during a
160 * flush. What happens is that when we try to grab the lock for
161 * the first flush, we detect that the window moved which then
162 * causes another flush (from the intel_draw_buffer() call in
163 * intelUpdatePageFlipping()). To work around this we reset the
164 * batchbuffer tail pointer before trying to get the lock. This
165 * prevent the nested buffer flush, but a better fix would be to
166 * avoid that in the first place. */
167 batch
->ptr
= batch
->map
;
169 if (intel
->vtbl
.finish_batch
)
170 intel
->vtbl
.finish_batch(intel
);
172 /* Check that we didn't just wrap our batchbuffer at a bad time. */
173 assert(!intel
->no_batch_wrap
);
175 do_flush_locked(batch
, used
);
177 if (INTEL_DEBUG
& DEBUG_SYNC
) {
178 fprintf(stderr
, "waiting for idle\n");
179 drm_intel_bo_map(batch
->buf
, GL_TRUE
);
180 drm_intel_bo_unmap(batch
->buf
);
185 intel_batchbuffer_reset(batch
);
189 /* This is the only way buffers get added to the validate list.
192 intel_batchbuffer_emit_reloc(struct intel_batchbuffer
*batch
,
193 drm_intel_bo
*buffer
,
194 uint32_t read_domains
, uint32_t write_domain
,
199 assert(delta
< buffer
->size
);
201 if (batch
->ptr
- batch
->map
> batch
->buf
->size
)
202 printf ("bad relocation ptr %p map %p offset %d size %lu\n",
203 batch
->ptr
, batch
->map
, batch
->ptr
- batch
->map
, batch
->buf
->size
);
204 ret
= drm_intel_bo_emit_reloc(batch
->buf
, batch
->ptr
- batch
->map
,
206 read_domains
, write_domain
);
209 * Using the old buffer offset, write in what the right data would be, in case
210 * the buffer doesn't move and we can short-circuit the relocation processing
213 intel_batchbuffer_emit_dword (batch
, buffer
->offset
+ delta
);
219 intel_batchbuffer_emit_reloc_fenced(struct intel_batchbuffer
*batch
,
220 drm_intel_bo
*buffer
,
221 uint32_t read_domains
, uint32_t write_domain
,
226 assert(delta
< buffer
->size
);
228 if (batch
->ptr
- batch
->map
> batch
->buf
->size
)
229 printf ("bad relocation ptr %p map %p offset %d size %lu\n",
230 batch
->ptr
, batch
->map
, batch
->ptr
- batch
->map
, batch
->buf
->size
);
231 ret
= drm_intel_bo_emit_reloc_fence(batch
->buf
, batch
->ptr
- batch
->map
,
233 read_domains
, write_domain
);
236 * Using the old buffer offset, write in what the right data would
237 * be, in case the buffer doesn't move and we can short-circuit the
238 * relocation processing in the kernel
240 intel_batchbuffer_emit_dword (batch
, buffer
->offset
+ delta
);
246 intel_batchbuffer_data(struct intel_batchbuffer
*batch
,
247 const void *data
, GLuint bytes
)
249 assert((bytes
& 3) == 0);
250 intel_batchbuffer_require_space(batch
, bytes
);
251 __memcpy(batch
->ptr
, data
, bytes
);
255 /* Emit a pipelined flush to either flush render and texture cache for
256 * reading from a FBO-drawn texture, or flush so that frontbuffer
257 * render appears on the screen in DRI1.
259 * This is also used for the always_flush_cache driconf debug option.
262 intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer
*batch
)
264 struct intel_context
*intel
= batch
->intel
;
266 if (intel
->gen
>= 6) {
269 /* XXX workaround: issue any post sync != 0 before write cache flush = 1 */
270 OUT_BATCH(_3DSTATE_PIPE_CONTROL
);
271 OUT_BATCH(PIPE_CONTROL_WRITE_IMMEDIATE
);
272 OUT_BATCH(0); /* write address */
273 OUT_BATCH(0); /* write data */
275 OUT_BATCH(_3DSTATE_PIPE_CONTROL
);
276 OUT_BATCH(PIPE_CONTROL_INSTRUCTION_FLUSH
|
277 PIPE_CONTROL_WRITE_FLUSH
|
278 PIPE_CONTROL_DEPTH_CACHE_FLUSH
|
279 PIPE_CONTROL_NO_WRITE
);
280 OUT_BATCH(0); /* write address */
281 OUT_BATCH(0); /* write data */
283 } else if (intel
->gen
>= 4) {
285 OUT_BATCH(_3DSTATE_PIPE_CONTROL
|
286 PIPE_CONTROL_WRITE_FLUSH
|
287 PIPE_CONTROL_NO_WRITE
);
288 OUT_BATCH(0); /* write address */
289 OUT_BATCH(0); /* write data */
290 OUT_BATCH(0); /* write data */