src/mesa/drivers/dri/intel/intel_batchbuffer.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #include "intel_batchbuffer.h"
  29 #include "intel_ioctl.h"
  30 #include "intel_decode.h"
  31 #include "intel_reg.h"
  32
  33 /* Relocations in kernel space:
  34  *    - pass dma buffer seperately
  35  *    - memory manager knows how to patch
  36  *    - pass list of dependent buffers
  37  *    - pass relocation list
  38  *
  39  * Either:
  40  *    - get back an offset for buffer to fire
  41  *    - memory manager knows how to fire buffer
  42  *
  43  * Really want the buffer to be AGP and pinned.
  44  *
  45  */
  46
  47 /* Cliprect fence: The highest fence protecting a dma buffer
  48  * containing explicit cliprect information.  Like the old drawable
  49  * lock but irq-driven.  X server must wait for this fence to expire
  50  * before changing cliprects [and then doing sw rendering?].  For
  51  * other dma buffers, the scheduler will grab current cliprect info
  52  * and mix into buffer.  X server must hold the lock while changing
  53  * cliprects???  Make per-drawable.  Need cliprects in shared memory
  54  * -- beats storing them with every cmd buffer in the queue.
  55  *
  56  * ==> X server must wait for this fence to expire before touching the
  57  * framebuffer with new cliprects.
  58  *
  59  * ==> Cliprect-dependent buffers associated with a
  60  * cliprect-timestamp.  All of the buffers associated with a timestamp
  61  * must go to hardware before any buffer with a newer timestamp.
  62  *
  63  * ==> Dma should be queued per-drawable for correct X/GL
  64  * synchronization.  Or can fences be used for this?
  65  *
  66  * Applies to: Blit operations, metaops, X server operations -- X
  67  * server automatically waits on its own dma to complete before
  68  * modifying cliprects ???
  69  */
  70
  71 void
  72 intel_batchbuffer_reset(struct intel_batchbuffer *batch)
  73 {
  74    struct intel_context *intel = batch->intel;
  75
  76    if (batch->buf != NULL) {
  77       dri_bo_unreference(batch->buf);
  78       batch->buf = NULL;
  79    }
  80
  81    batch->buf = dri_bo_alloc(intel->bufmgr, "batchbuffer",
  82                              intel->maxBatchSize, 4096,
  83                              DRM_BO_FLAG_MEM_LOCAL | DRM_BO_FLAG_CACHED | DRM_BO_FLAG_CACHED_MAPPED);
  84    dri_bo_map(batch->buf, GL_TRUE);
  85    batch->map = batch->buf->virtual;
  86    batch->size = intel->maxBatchSize;
  87    batch->ptr = batch->map;
  88    batch->dirty_state = ~0;
  89    batch->cliprect_mode = IGNORE_CLIPRECTS;
  90 }
  91
  92 struct intel_batchbuffer *
  93 intel_batchbuffer_alloc(struct intel_context *intel)
  94 {
  95    struct intel_batchbuffer *batch = calloc(sizeof(*batch), 1);
  96
  97    batch->intel = intel;
  98    batch->last_fence = NULL;
  99    intel_batchbuffer_reset(batch);
 100
 101    return batch;
 102 }
 103
 104 void
 105 intel_batchbuffer_free(struct intel_batchbuffer *batch)
 106 {
 107    if (batch->last_fence) {
 108       dri_fence_wait(batch->last_fence);
 109       dri_fence_unreference(batch->last_fence);
 110       batch->last_fence = NULL;
 111    }
 112    if (batch->map) {
 113       dri_bo_unmap(batch->buf);
 114       batch->map = NULL;
 115    }
 116    dri_bo_unreference(batch->buf);
 117    batch->buf = NULL;
 118    free(batch);
 119 }
 120
 121
 122
 123 /* TODO: Push this whole function into bufmgr.
 124  */
 125 static void
 126 do_flush_locked(struct intel_batchbuffer *batch,
 127                 GLuint used, GLboolean allow_unlock)
 128 {
 129    struct intel_context *intel = batch->intel;
 130    void *start;
 131    GLuint count;
 132
 133    dri_bo_unmap(batch->buf);
 134    start = dri_process_relocs(batch->buf, &count);
 135
 136    batch->map = NULL;
 137    batch->ptr = NULL;
 138
 139    /* Throw away non-effective packets.  Won't work once we have
 140     * hardware contexts which would preserve statechanges beyond a
 141     * single buffer.
 142     */
 143
 144    if (!(intel->numClipRects == 0 &&
 145          batch->cliprect_mode == LOOP_CLIPRECTS)) {
 146       if (intel->ttm == GL_TRUE) {
 147          intel_exec_ioctl(batch->intel,
 148                           used,
 149                           batch->cliprect_mode != LOOP_CLIPRECTS,
 150                           allow_unlock,
 151                           start, count, &batch->last_fence);
 152       } else {
 153          intel_batch_ioctl(batch->intel,
 154                            batch->buf->offset,
 155                            used,
 156                            batch->cliprect_mode != LOOP_CLIPRECTS,
 157                            allow_unlock);
 158       }
 159    }
 160
 161    dri_post_submit(batch->buf, &batch->last_fence);
 162
 163    if (intel->numClipRects == 0 &&
 164        batch->cliprect_mode == LOOP_CLIPRECTS) {
 165       if (allow_unlock) {
 166          /* If we are not doing any actual user-visible rendering,
 167           * do a sched_yield to keep the app from pegging the cpu while
 168           * achieving nothing.
 169           */
 170          UNLOCK_HARDWARE(intel);
 171          sched_yield();
 172          LOCK_HARDWARE(intel);
 173       }
 174    }
 175
 176    if (INTEL_DEBUG & DEBUG_BATCH) {
 177       dri_bo_map(batch->buf, GL_FALSE);
 178       intel_decode(batch->buf->virtual, used / 4, batch->buf->offset,
 179                    intel->intelScreen->deviceID);
 180       dri_bo_unmap(batch->buf);
 181
 182       if (intel->vtbl.debug_batch != NULL)
 183          intel->vtbl.debug_batch(intel);
 184    }
 185
 186    intel->vtbl.new_batch(intel);
 187 }
 188
 189 void
 190 _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file,
 191                          int line)
 192 {
 193    struct intel_context *intel = batch->intel;
 194    GLuint used = batch->ptr - batch->map;
 195    GLboolean was_locked = intel->locked;
 196
 197    if (used == 0)
 198       return;
 199
 200    if (INTEL_DEBUG & DEBUG_BATCH)
 201       fprintf(stderr, "%s:%d: Batchbuffer flush with %db used\n", file, line,
 202               used);
 203    /* Add the MI_BATCH_BUFFER_END.  Always add an MI_FLUSH - this is a
 204     * performance drain that we would like to avoid.
 205     */
 206    if (used & 4) {
 207       ((int *) batch->ptr)[0] = intel->vtbl.flush_cmd();
 208       ((int *) batch->ptr)[1] = 0;
 209       ((int *) batch->ptr)[2] = MI_BATCH_BUFFER_END;
 210       used += 12;
 211    }
 212    else {
 213       ((int *) batch->ptr)[0] = intel->vtbl.flush_cmd();
 214       ((int *) batch->ptr)[1] = MI_BATCH_BUFFER_END;
 215       used += 8;
 216    }
 217
 218    /* Workaround for recursive batchbuffer flushing: If the window is
 219     * moved, we can get into a case where we try to flush during a
 220     * flush.  What happens is that when we try to grab the lock for
 221     * the first flush, we detect that the window moved which then
 222     * causes another flush (from the intel_draw_buffer() call in
 223     * intelUpdatePageFlipping()).  To work around this we reset the
 224     * batchbuffer tail pointer before trying to get the lock.  This
 225     * prevent the nested buffer flush, but a better fix would be to
 226     * avoid that in the first place. */
 227    batch->ptr = batch->map;
 228
 229    /* TODO: Just pass the relocation list and dma buffer up to the
 230     * kernel.
 231     */
 232    if (!was_locked)
 233       LOCK_HARDWARE(intel);
 234
 235    do_flush_locked(batch, used, GL_FALSE);
 236
 237    if (!was_locked)
 238       UNLOCK_HARDWARE(intel);
 239
 240    if (INTEL_DEBUG & DEBUG_SYNC) {
 241       fprintf(stderr, "waiting for idle\n");
 242       if (batch->last_fence != NULL)
 243          dri_fence_wait(batch->last_fence);
 244    }
 245
 246    /* Reset the buffer:
 247     */
 248    intel_batchbuffer_reset(batch);
 249 }
 250
 251 void
 252 intel_batchbuffer_finish(struct intel_batchbuffer *batch)
 253 {
 254    intel_batchbuffer_flush(batch);
 255    if (batch->last_fence != NULL)
 256       dri_fence_wait(batch->last_fence);
 257 }
 258
 259
 260 /*  This is the only way buffers get added to the validate list.
 261  */
 262 GLboolean
 263 intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
 264                              dri_bo *buffer,
 265                              GLuint flags, GLuint delta)
 266 {
 267    dri_emit_reloc(batch->buf, flags, delta, batch->ptr - batch->map, buffer);
 268    /*
 269     * Using the old buffer offset, write in what the right data would be, in case
 270     * the buffer doesn't move and we can short-circuit the relocation processing
 271     * in the kernel
 272     */
 273    intel_batchbuffer_emit_dword (batch, buffer->offset + delta);
 274
 275    return GL_TRUE;
 276 }
 277
 278 void
 279 intel_batchbuffer_data(struct intel_batchbuffer *batch,
 280                        const void *data, GLuint bytes,
 281                        enum cliprect_mode cliprect_mode)
 282 {
 283    assert((bytes & 3) == 0);
 284    intel_batchbuffer_require_space(batch, bytes, cliprect_mode);
 285    __memcpy(batch->ptr, data, bytes);
 286    batch->ptr += bytes;
 287 }