mesa/colormac: introduce inline helper for 4 unclamped float to ubyte.
[mesa.git] / src / mesa / drivers / dri / intel / intel_batchbuffer.h
1 #ifndef INTEL_BATCHBUFFER_H
2 #define INTEL_BATCHBUFFER_H
3
4 #include "main/mtypes.h"
5
6 #include "intel_context.h"
7 #include "intel_bufmgr.h"
8 #include "intel_reg.h"
9
10 #define BATCH_RESERVED 16
11
12 void intel_batchbuffer_init(struct intel_context *intel);
13 void intel_batchbuffer_reset(struct intel_context *intel);
14 void intel_batchbuffer_free(struct intel_context *intel);
15
16 void _intel_batchbuffer_flush(struct intel_context *intel,
17 const char *file, int line);
18
19 #define intel_batchbuffer_flush(intel) \
20 _intel_batchbuffer_flush(intel, __FILE__, __LINE__)
21
22
23
24 /* Unlike bmBufferData, this currently requires the buffer be mapped.
25 * Consider it a convenience function wrapping multple
26 * intel_buffer_dword() calls.
27 */
28 void intel_batchbuffer_data(struct intel_context *intel,
29 const void *data, GLuint bytes, bool is_blit);
30
31 GLboolean intel_batchbuffer_emit_reloc(struct intel_context *intel,
32 drm_intel_bo *buffer,
33 uint32_t read_domains,
34 uint32_t write_domain,
35 uint32_t offset);
36 GLboolean intel_batchbuffer_emit_reloc_fenced(struct intel_context *intel,
37 drm_intel_bo *buffer,
38 uint32_t read_domains,
39 uint32_t write_domain,
40 uint32_t offset);
41 void intel_batchbuffer_emit_mi_flush(struct intel_context *intel);
42 void intel_emit_post_sync_nonzero_flush(struct intel_context *intel);
43
44 static INLINE uint32_t float_as_int(float f)
45 {
46 union {
47 float f;
48 uint32_t d;
49 } fi;
50
51 fi.f = f;
52 return fi.d;
53 }
54
55 /* Inline functions - might actually be better off with these
56 * non-inlined. Certainly better off switching all command packets to
57 * be passed as structs rather than dwords, but that's a little bit of
58 * work...
59 */
60 static INLINE unsigned
61 intel_batchbuffer_space(struct intel_context *intel)
62 {
63 return (intel->batch.state_batch_offset - intel->batch.reserved_space)
64 - intel->batch.used*4;
65 }
66
67
68 static INLINE void
69 intel_batchbuffer_emit_dword(struct intel_context *intel, GLuint dword)
70 {
71 #ifdef DEBUG
72 assert(intel_batchbuffer_space(intel) >= 4);
73 #endif
74 intel->batch.map[intel->batch.used++] = dword;
75 }
76
77 static INLINE void
78 intel_batchbuffer_emit_float(struct intel_context *intel, float f)
79 {
80 intel_batchbuffer_emit_dword(intel, float_as_int(f));
81 }
82
83 static INLINE void
84 intel_batchbuffer_require_space(struct intel_context *intel,
85 GLuint sz, int is_blit)
86 {
87
88 if (intel->gen >= 6 &&
89 intel->batch.is_blit != is_blit && intel->batch.used) {
90 intel_batchbuffer_flush(intel);
91 }
92
93 intel->batch.is_blit = is_blit;
94
95 #ifdef DEBUG
96 assert(sz < sizeof(intel->batch.map) - BATCH_RESERVED);
97 #endif
98 if (intel_batchbuffer_space(intel) < sz)
99 intel_batchbuffer_flush(intel);
100 }
101
102 static INLINE void
103 intel_batchbuffer_begin(struct intel_context *intel, int n, bool is_blit)
104 {
105 intel_batchbuffer_require_space(intel, n * 4, is_blit);
106
107 intel->batch.emit = intel->batch.used;
108 #ifdef DEBUG
109 intel->batch.total = n;
110 #endif
111 }
112
113 static INLINE void
114 intel_batchbuffer_advance(struct intel_context *intel)
115 {
116 #ifdef DEBUG
117 struct intel_batchbuffer *batch = &intel->batch;
118 unsigned int _n = batch->used - batch->emit;
119 assert(batch->total != 0);
120 if (_n != batch->total) {
121 fprintf(stderr, "ADVANCE_BATCH: %d of %d dwords emitted\n",
122 _n, batch->total);
123 abort();
124 }
125 batch->total = 0;
126 #endif
127 }
128
129 void intel_batchbuffer_cached_advance(struct intel_context *intel);
130
131 /* Here are the crusty old macros, to be removed:
132 */
133 #define BATCH_LOCALS
134
135 #define BEGIN_BATCH(n) intel_batchbuffer_begin(intel, n, false)
136 #define BEGIN_BATCH_BLT(n) intel_batchbuffer_begin(intel, n, true)
137 #define OUT_BATCH(d) intel_batchbuffer_emit_dword(intel, d)
138 #define OUT_BATCH_F(f) intel_batchbuffer_emit_float(intel,f)
139 #define OUT_RELOC(buf, read_domains, write_domain, delta) do { \
140 intel_batchbuffer_emit_reloc(intel, buf, \
141 read_domains, write_domain, delta); \
142 } while (0)
143 #define OUT_RELOC_FENCED(buf, read_domains, write_domain, delta) do { \
144 intel_batchbuffer_emit_reloc_fenced(intel, buf, \
145 read_domains, write_domain, delta); \
146 } while (0)
147
148 #define ADVANCE_BATCH() intel_batchbuffer_advance(intel);
149 #define CACHED_BATCH() intel_batchbuffer_cached_advance(intel);
150
151 #endif