src/mesa/drivers/dri/intel/intel_blit.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/mtypes.h"
  30 #include "main/context.h"
  31 #include "main/enums.h"
  32 #include "main/colormac.h"
  33
  34 #include "intel_blit.h"
  35 #include "intel_buffers.h"
  36 #include "intel_context.h"
  37 #include "intel_fbo.h"
  38 #include "intel_reg.h"
  39 #include "intel_regions.h"
  40 #include "intel_batchbuffer.h"
  41
  42 #define FILE_DEBUG_FLAG DEBUG_BLIT
  43
  44 /**
  45  * Copy the back color buffer to the front color buffer.
  46  * Used for SwapBuffers().
  47  */
  48 void
  49 intelCopyBuffer(const __DRIdrawablePrivate * dPriv,
  50                 const drm_clip_rect_t * rect)
  51 {
  52
  53    struct intel_context *intel;
  54    const intelScreenPrivate *intelScreen;
  55
  56    DBG("%s\n", __FUNCTION__);
  57
  58    assert(dPriv);
  59
  60    intel = intelScreenContext(dPriv->driScreenPriv->private);
  61    if (!intel)
  62       return;
  63
  64    intelScreen = intel->intelScreen;
  65
  66    /* The LOCK_HARDWARE is required for the cliprects.  Buffer offsets
  67     * should work regardless.
  68     */
  69    LOCK_HARDWARE(intel);
  70
  71    if (dPriv && dPriv->numClipRects) {
  72       struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
  73       struct intel_region *src, *dst;
  74       int nbox = dPriv->numClipRects;
  75       drm_clip_rect_t *pbox = dPriv->pClipRects;
  76       int cpp;
  77       int src_pitch, dst_pitch;
  78       unsigned short src_x, src_y;
  79       int BR13, CMD;
  80       int i;
  81       dri_bo *aper_array[3];
  82
  83       src = intel_get_rb_region(&intel_fb->Base, BUFFER_BACK_LEFT);
  84       dst = intel_get_rb_region(&intel_fb->Base, BUFFER_FRONT_LEFT);
  85
  86       src_pitch = src->pitch * src->cpp;
  87       dst_pitch = dst->pitch * dst->cpp;
  88
  89       cpp = src->cpp;
  90
  91       ASSERT(intel_fb);
  92       ASSERT(intel_fb->Base.Name == 0);    /* Not a user-created FBO */
  93       ASSERT(src);
  94       ASSERT(dst);
  95       ASSERT(src->cpp == dst->cpp);
  96
  97       if (cpp == 2) {
  98          BR13 = (0xCC << 16) | BR13_565;
  99          CMD = XY_SRC_COPY_BLT_CMD;
 100       }
 101       else {
 102          BR13 = (0xCC << 16) | BR13_8888;
 103          CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 104       }
 105
 106       assert(src->tiling != I915_TILING_Y);
 107       assert(dst->tiling != I915_TILING_Y);
 108 #ifndef I915
 109       if (src->tiling != I915_TILING_NONE) {
 110          CMD |= XY_SRC_TILED;
 111          src_pitch /= 4;
 112       }
 113       if (dst->tiling != I915_TILING_NONE) {
 114          CMD |= XY_DST_TILED;
 115          dst_pitch /= 4;
 116       }
 117 #endif
 118       /* do space/cliprects check before going any further */
 119       intel_batchbuffer_require_space(intel->batch, 8 * 4,
 120                                       REFERENCES_CLIPRECTS);
 121    again:
 122       aper_array[0] = intel->batch->buf;
 123       aper_array[1] = dst->buffer;
 124       aper_array[2] = src->buffer;
 125
 126       if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
 127         intel_batchbuffer_flush(intel->batch);
 128         goto again;
 129       }
 130
 131       for (i = 0; i < nbox; i++, pbox++) {
 132          drm_clip_rect_t box = *pbox;
 133
 134          if (rect) {
 135             if (!intel_intersect_cliprects(&box, &box, rect))
 136                continue;
 137          }
 138
 139          if (box.x1 >= box.x2 ||
 140              box.y1 >= box.y2)
 141             continue;
 142
 143          assert(box.x1 < box.x2);
 144          assert(box.y1 < box.y2);
 145          src_x = box.x1 - dPriv->x + dPriv->backX;
 146          src_y = box.y1 - dPriv->y + dPriv->backY;
 147
 148          BEGIN_BATCH(8, REFERENCES_CLIPRECTS);
 149          OUT_BATCH(CMD);
 150          OUT_BATCH(BR13 | dst_pitch);
 151          OUT_BATCH((box.y1 << 16) | box.x1);
 152          OUT_BATCH((box.y2 << 16) | box.x2);
 153
 154          OUT_RELOC(dst->buffer,
 155                    I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 156                    0);
 157          OUT_BATCH((src_y << 16) | src_x);
 158          OUT_BATCH(src_pitch);
 159          OUT_RELOC(src->buffer,
 160                    I915_GEM_DOMAIN_RENDER, 0,
 161                    0);
 162          ADVANCE_BATCH();
 163       }
 164
 165       /* Flush the rendering and the batch so that the results all land on the
 166        * screen in a timely fashion.
 167        */
 168       intel_batchbuffer_emit_mi_flush(intel->batch);
 169       intel_batchbuffer_flush(intel->batch);
 170    }
 171
 172    UNLOCK_HARDWARE(intel);
 173 }
 174
 175 static GLuint translate_raster_op(GLenum logicop)
 176 {
 177    switch(logicop) {
 178    case GL_CLEAR: return 0x00;
 179    case GL_AND: return 0x88;
 180    case GL_AND_REVERSE: return 0x44;
 181    case GL_COPY: return 0xCC;
 182    case GL_AND_INVERTED: return 0x22;
 183    case GL_NOOP: return 0xAA;
 184    case GL_XOR: return 0x66;
 185    case GL_OR: return 0xEE;
 186    case GL_NOR: return 0x11;
 187    case GL_EQUIV: return 0x99;
 188    case GL_INVERT: return 0x55;
 189    case GL_OR_REVERSE: return 0xDD;
 190    case GL_COPY_INVERTED: return 0x33;
 191    case GL_OR_INVERTED: return 0xBB;
 192    case GL_NAND: return 0x77;
 193    case GL_SET: return 0xFF;
 194    default: return 0;
 195    }
 196 }
 197
 198
 199 /* Copy BitBlt
 200  */
 201 GLboolean
 202 intelEmitCopyBlit(struct intel_context *intel,
 203                   GLuint cpp,
 204                   GLshort src_pitch,
 205                   dri_bo *src_buffer,
 206                   GLuint src_offset,
 207                   uint32_t src_tiling,
 208                   GLshort dst_pitch,
 209                   dri_bo *dst_buffer,
 210                   GLuint dst_offset,
 211                   uint32_t dst_tiling,
 212                   GLshort src_x, GLshort src_y,
 213                   GLshort dst_x, GLshort dst_y,
 214                   GLshort w, GLshort h,
 215                   GLenum logic_op)
 216 {
 217    GLuint CMD, BR13, pass = 0;
 218    int dst_y2 = dst_y + h;
 219    int dst_x2 = dst_x + w;
 220    dri_bo *aper_array[3];
 221    BATCH_LOCALS;
 222
 223    if (dst_tiling != I915_TILING_NONE) {
 224       if (dst_offset & 4095)
 225          return GL_FALSE;
 226       if (dst_tiling == I915_TILING_Y)
 227          return GL_FALSE;
 228    }
 229    if (src_tiling != I915_TILING_NONE) {
 230       if (src_offset & 4095)
 231          return GL_FALSE;
 232       if (src_tiling == I915_TILING_Y)
 233          return GL_FALSE;
 234    }
 235
 236    /* do space/cliprects check before going any further */
 237    do {
 238        aper_array[0] = intel->batch->buf;
 239        aper_array[1] = dst_buffer;
 240        aper_array[2] = src_buffer;
 241
 242        if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
 243            intel_batchbuffer_flush(intel->batch);
 244            pass++;
 245        } else
 246            break;
 247    } while (pass < 2);
 248
 249    if (pass >= 2) {
 250        LOCK_HARDWARE(intel);
 251        dri_bo_map(dst_buffer, GL_TRUE);
 252        dri_bo_map(src_buffer, GL_FALSE);
 253        _mesa_copy_rect((GLubyte *)dst_buffer->virtual + dst_offset,
 254                        cpp,
 255                        dst_pitch,
 256                        dst_x, dst_y,
 257                        w, h,
 258                        (GLubyte *)src_buffer->virtual + src_offset,
 259                        src_pitch,
 260                        src_x, src_y);
 261
 262        dri_bo_unmap(src_buffer);
 263        dri_bo_unmap(dst_buffer);
 264        UNLOCK_HARDWARE(intel);
 265
 266        return GL_TRUE;
 267    }
 268
 269    intel_batchbuffer_require_space(intel->batch, 8 * 4, NO_LOOP_CLIPRECTS);
 270    DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
 271        __FUNCTION__,
 272        src_buffer, src_pitch, src_offset, src_x, src_y,
 273        dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h);
 274
 275    src_pitch *= cpp;
 276    dst_pitch *= cpp;
 277
 278    BR13 = translate_raster_op(logic_op) << 16;
 279
 280    switch (cpp) {
 281    case 1:
 282       CMD = XY_SRC_COPY_BLT_CMD;
 283       break;
 284    case 2:
 285       BR13 |= BR13_565;
 286       CMD = XY_SRC_COPY_BLT_CMD;
 287       break;
 288    case 4:
 289       BR13 |= BR13_8888;
 290       CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 291       break;
 292    default:
 293       return GL_FALSE;
 294    }
 295
 296 #ifndef I915
 297    if (dst_tiling != I915_TILING_NONE) {
 298       CMD |= XY_DST_TILED;
 299       dst_pitch /= 4;
 300    }
 301    if (src_tiling != I915_TILING_NONE) {
 302       CMD |= XY_SRC_TILED;
 303       src_pitch /= 4;
 304    }
 305 #endif
 306
 307    if (dst_y2 <= dst_y || dst_x2 <= dst_x) {
 308       return GL_TRUE;
 309    }
 310
 311    assert(dst_x < dst_x2);
 312    assert(dst_y < dst_y2);
 313
 314    BEGIN_BATCH(8, NO_LOOP_CLIPRECTS);
 315    OUT_BATCH(CMD);
 316    OUT_BATCH(BR13 | (uint16_t)dst_pitch);
 317    OUT_BATCH((dst_y << 16) | dst_x);
 318    OUT_BATCH((dst_y2 << 16) | dst_x2);
 319    OUT_RELOC(dst_buffer,
 320              I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 321              dst_offset);
 322    OUT_BATCH((src_y << 16) | src_x);
 323    OUT_BATCH((uint16_t)src_pitch);
 324    OUT_RELOC(src_buffer,
 325              I915_GEM_DOMAIN_RENDER, 0,
 326              src_offset);
 327    ADVANCE_BATCH();
 328
 329    intel_batchbuffer_emit_mi_flush(intel->batch);
 330
 331    return GL_TRUE;
 332 }
 333
 334
 335 /**
 336  * Use blitting to clear the renderbuffers named by 'flags'.
 337  * Note: we can't use the ctx->DrawBuffer->_ColorDrawBufferIndexes field
 338  * since that might include software renderbuffers or renderbuffers
 339  * which we're clearing with triangles.
 340  * \param mask  bitmask of BUFFER_BIT_* values indicating buffers to clear
 341  */
 342 void
 343 intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
 344 {
 345    struct intel_context *intel = intel_context(ctx);
 346    struct gl_framebuffer *fb = ctx->DrawBuffer;
 347    GLuint clear_depth;
 348    GLbitfield skipBuffers = 0;
 349    unsigned int num_cliprects;
 350    struct drm_clip_rect *cliprects;
 351    int x_off, y_off;
 352    BATCH_LOCALS;
 353
 354    /*
 355     * Compute values for clearing the buffers.
 356     */
 357    clear_depth = 0;
 358    if (mask & BUFFER_BIT_DEPTH) {
 359       clear_depth = (GLuint) (fb->_DepthMax * ctx->Depth.Clear);
 360    }
 361    if (mask & BUFFER_BIT_STENCIL) {
 362       clear_depth |= (ctx->Stencil.Clear & 0xff) << 24;
 363    }
 364
 365    /* If clearing both depth and stencil, skip BUFFER_BIT_STENCIL in
 366     * the loop below.
 367     */
 368    if ((mask & BUFFER_BIT_DEPTH) && (mask & BUFFER_BIT_STENCIL)) {
 369       skipBuffers = BUFFER_BIT_STENCIL;
 370    }
 371
 372    LOCK_HARDWARE(intel);
 373
 374    intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off);
 375    if (num_cliprects) {
 376       GLint cx, cy, cw, ch;
 377       drm_clip_rect_t clear;
 378       int i;
 379
 380       /* Get clear bounds after locking */
 381       cx = fb->_Xmin;
 382       cy = fb->_Ymin;
 383       cw = fb->_Xmax - cx;
 384       ch = fb->_Ymax - cy;
 385
 386       if (fb->Name == 0) {
 387          /* clearing a window */
 388
 389          /* flip top to bottom */
 390          clear.x1 = cx + x_off;
 391          clear.y1 = intel->driDrawable->y + intel->driDrawable->h - cy - ch;
 392          clear.x2 = clear.x1 + cw;
 393          clear.y2 = clear.y1 + ch;
 394       }
 395       else {
 396          /* clearing FBO */
 397          assert(num_cliprects == 1);
 398          assert(cliprects == &intel->fboRect);
 399          clear.x1 = cx;
 400          clear.y1 = cy;
 401          clear.x2 = clear.x1 + cw;
 402          clear.y2 = clear.y1 + ch;
 403          /* no change to mask */
 404       }
 405
 406       for (i = 0; i < num_cliprects; i++) {
 407          const drm_clip_rect_t *box = &cliprects[i];
 408          drm_clip_rect_t b;
 409          GLuint buf;
 410          GLuint clearMask = mask;      /* use copy, since we modify it below */
 411          GLboolean all = (cw == fb->Width && ch == fb->Height);
 412
 413          if (!all) {
 414             intel_intersect_cliprects(&b, &clear, box);
 415          }
 416          else {
 417             b = *box;
 418          }
 419
 420          if (b.x1 >= b.x2 || b.y1 >= b.y2)
 421             continue;
 422
 423          if (0)
 424             _mesa_printf("clear %d,%d..%d,%d, mask %x\n",
 425                          b.x1, b.y1, b.x2, b.y2, mask);
 426
 427          /* Loop over all renderbuffers */
 428          for (buf = 0; buf < BUFFER_COUNT && clearMask; buf++) {
 429             const GLbitfield bufBit = 1 << buf;
 430             if ((clearMask & bufBit) && !(bufBit & skipBuffers)) {
 431                /* OK, clear this renderbuffer */
 432                struct intel_renderbuffer *irb = intel_get_renderbuffer(fb, buf);
 433                dri_bo *write_buffer =
 434                   intel_region_buffer(intel, irb->region,
 435                                       all ? INTEL_WRITE_FULL :
 436                                       INTEL_WRITE_PART);
 437                int x1 = b.x1 + irb->region->draw_x;
 438                int y1 = b.y1 + irb->region->draw_y;
 439                int x2 = b.x2 + irb->region->draw_x;
 440                int y2 = b.y2 + irb->region->draw_y;
 441
 442                GLuint clearVal;
 443                GLint pitch, cpp;
 444                GLuint BR13, CMD;
 445
 446                pitch = irb->region->pitch;
 447                cpp = irb->region->cpp;
 448
 449                DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n",
 450                    __FUNCTION__,
 451                    irb->region->buffer, (pitch * cpp),
 452                    x1, y1, x2 - x1, y2 - y1);
 453
 454                BR13 = 0xf0 << 16;
 455                CMD = XY_COLOR_BLT_CMD;
 456
 457                /* Setup the blit command */
 458                if (cpp == 4) {
 459                   BR13 |= BR13_8888;
 460                   if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
 461                      if (clearMask & BUFFER_BIT_DEPTH)
 462                         CMD |= XY_BLT_WRITE_RGB;
 463                      if (clearMask & BUFFER_BIT_STENCIL)
 464                         CMD |= XY_BLT_WRITE_ALPHA;
 465                   }
 466                   else {
 467                      /* clearing RGBA */
 468                      CMD |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 469                   }
 470                }
 471                else {
 472                   ASSERT(cpp == 2);
 473                   BR13 |= BR13_565;
 474                }
 475
 476                assert(irb->region->tiling != I915_TILING_Y);
 477
 478 #ifndef I915
 479                if (irb->region->tiling != I915_TILING_NONE) {
 480                   CMD |= XY_DST_TILED;
 481                   pitch /= 4;
 482                }
 483 #endif
 484                BR13 |= (pitch * cpp);
 485
 486                if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
 487                   clearVal = clear_depth;
 488                }
 489                else {
 490                   uint8_t clear[4];
 491                   GLclampf *color = ctx->Color.ClearColor;
 492
 493                   CLAMPED_FLOAT_TO_UBYTE(clear[0], color[0]);
 494                   CLAMPED_FLOAT_TO_UBYTE(clear[1], color[1]);
 495                   CLAMPED_FLOAT_TO_UBYTE(clear[2], color[2]);
 496                   CLAMPED_FLOAT_TO_UBYTE(clear[3], color[3]);
 497
 498                   switch (irb->Base.Format) {
 499                   case MESA_FORMAT_ARGB8888:
 500                   case MESA_FORMAT_XRGB8888:
 501                      clearVal = intel->ClearColor8888;
 502                      break;
 503                   case MESA_FORMAT_RGB565:
 504                      clearVal = intel->ClearColor565;
 505                      break;
 506                   case MESA_FORMAT_ARGB4444:
 507                      clearVal = PACK_COLOR_4444(clear[3], clear[0],
 508                                                 clear[1], clear[2]);
 509                      break;
 510                   case MESA_FORMAT_ARGB1555:
 511                      clearVal = PACK_COLOR_1555(clear[3], clear[0],
 512                                                 clear[1], clear[2]);
 513                      break;
 514                   default:
 515                      _mesa_problem(ctx, "Unexpected renderbuffer format: %d\n",
 516                                    irb->Base.Format);
 517                      clearVal = 0;
 518                   }
 519                }
 520
 521                /*
 522                   _mesa_debug(ctx, "hardware blit clear buf %d rb id %d\n",
 523                   buf, irb->Base.Name);
 524                 */
 525
 526                assert(x1 < x2);
 527                assert(y1 < y2);
 528
 529                BEGIN_BATCH(6, REFERENCES_CLIPRECTS);
 530                OUT_BATCH(CMD);
 531                OUT_BATCH(BR13);
 532                OUT_BATCH((y1 << 16) | x1);
 533                OUT_BATCH((y2 << 16) | x2);
 534                OUT_RELOC(write_buffer,
 535                          I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 536                          0);
 537                OUT_BATCH(clearVal);
 538                ADVANCE_BATCH();
 539                clearMask &= ~bufBit;    /* turn off bit, for faster loop exit */
 540             }
 541          }
 542       }
 543    }
 544
 545    UNLOCK_HARDWARE(intel);
 546 }
 547
 548 GLboolean
 549 intelEmitImmediateColorExpandBlit(struct intel_context *intel,
 550                                   GLuint cpp,
 551                                   GLubyte *src_bits, GLuint src_size,
 552                                   GLuint fg_color,
 553                                   GLshort dst_pitch,
 554                                   dri_bo *dst_buffer,
 555                                   GLuint dst_offset,
 556                                   uint32_t dst_tiling,
 557                                   GLshort x, GLshort y,
 558                                   GLshort w, GLshort h,
 559                                   GLenum logic_op)
 560 {
 561    int dwords = ALIGN(src_size, 8) / 4;
 562    uint32_t opcode, br13, blit_cmd;
 563
 564    if (dst_tiling != I915_TILING_NONE) {
 565       if (dst_offset & 4095)
 566          return GL_FALSE;
 567       if (dst_tiling == I915_TILING_Y)
 568          return GL_FALSE;
 569    }
 570
 571    assert( logic_op - GL_CLEAR >= 0 );
 572    assert( logic_op - GL_CLEAR < 0x10 );
 573    assert(dst_pitch > 0);
 574
 575    if (w < 0 || h < 0)
 576       return GL_TRUE;
 577
 578    dst_pitch *= cpp;
 579
 580    DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n",
 581        __FUNCTION__,
 582        dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords);
 583
 584    intel_batchbuffer_require_space( intel->batch,
 585                                     (8 * 4) +
 586                                     (3 * 4) +
 587                                     dwords * 4,
 588                                     REFERENCES_CLIPRECTS );
 589
 590    opcode = XY_SETUP_BLT_CMD;
 591    if (cpp == 4)
 592       opcode |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 593 #ifndef I915
 594    if (dst_tiling != I915_TILING_NONE) {
 595       opcode |= XY_DST_TILED;
 596       dst_pitch /= 4;
 597    }
 598 #endif
 599
 600    br13 = dst_pitch | (translate_raster_op(logic_op) << 16) | (1 << 29);
 601    if (cpp == 2)
 602       br13 |= BR13_565;
 603    else
 604       br13 |= BR13_8888;
 605
 606    blit_cmd = XY_TEXT_IMMEDIATE_BLIT_CMD | XY_TEXT_BYTE_PACKED; /* packing? */
 607    if (dst_tiling != I915_TILING_NONE)
 608       blit_cmd |= XY_DST_TILED;
 609
 610    BEGIN_BATCH(8 + 3, REFERENCES_CLIPRECTS);
 611    OUT_BATCH(opcode);
 612    OUT_BATCH(br13);
 613    OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */
 614    OUT_BATCH((100 << 16) | 100); /* clip x2, y2 */
 615    OUT_RELOC(dst_buffer,
 616              I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 617              dst_offset);
 618    OUT_BATCH(0); /* bg */
 619    OUT_BATCH(fg_color); /* fg */
 620    OUT_BATCH(0); /* pattern base addr */
 621
 622    OUT_BATCH(blit_cmd | ((3 - 2) + dwords));
 623    OUT_BATCH((y << 16) | x);
 624    OUT_BATCH(((y + h) << 16) | (x + w));
 625    ADVANCE_BATCH();
 626
 627    intel_batchbuffer_data( intel->batch,
 628                            src_bits,
 629                            dwords * 4,
 630                            REFERENCES_CLIPRECTS );
 631
 632    intel_batchbuffer_emit_mi_flush(intel->batch);
 633
 634    return GL_TRUE;
 635 }
 636
 637 /* We don't have a memmove-type blit like some other hardware, so we'll do a
 638  * rectangular blit covering a large space, then emit 1-scanline blit at the
 639  * end to cover the last if we need.
 640  */
 641 void
 642 intel_emit_linear_blit(struct intel_context *intel,
 643                        drm_intel_bo *dst_bo,
 644                        unsigned int dst_offset,
 645                        drm_intel_bo *src_bo,
 646                        unsigned int src_offset,
 647                        unsigned int size)
 648 {
 649    GLuint pitch, height;
 650
 651    /* The pitch is a signed value. */
 652    pitch = MIN2(size, (1 << 15) - 1);
 653    height = size / pitch;
 654    intelEmitCopyBlit(intel, 1,
 655                      pitch, src_bo, src_offset, I915_TILING_NONE,
 656                      pitch, dst_bo, dst_offset, I915_TILING_NONE,
 657                      0, 0, /* src x/y */
 658                      0, 0, /* dst x/y */
 659                      pitch, height, /* w, h */
 660                      GL_COPY);
 661
 662    src_offset += pitch * height;
 663    dst_offset += pitch * height;
 664    size -= pitch * height;
 665    assert (size < (1 << 15));
 666    if (size != 0) {
 667       intelEmitCopyBlit(intel, 1,
 668                         size, src_bo, src_offset, I915_TILING_NONE,
 669                         size, dst_bo, dst_offset, I915_TILING_NONE,
 670                         0, 0, /* src x/y */
 671                         0, 0, /* dst x/y */
 672                         size, 1, /* w, h */
 673                         GL_COPY);
 674    }
 675 }