src/mesa/drivers/dri/intel/intel_blit.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/mtypes.h"
  30 #include "main/context.h"
  31 #include "main/enums.h"
  32 #include "main/colormac.h"
  33
  34 #include "intel_blit.h"
  35 #include "intel_buffers.h"
  36 #include "intel_context.h"
  37 #include "intel_fbo.h"
  38 #include "intel_reg.h"
  39 #include "intel_regions.h"
  40 #include "intel_batchbuffer.h"
  41 #include "intel_chipset.h"
  42
  43 #define FILE_DEBUG_FLAG DEBUG_BLIT
  44
  45 /**
  46  * Copy the back color buffer to the front color buffer.
  47  * Used for SwapBuffers().
  48  */
  49 void
  50 intelCopyBuffer(const __DRIdrawablePrivate * dPriv,
  51                 const drm_clip_rect_t * rect)
  52 {
  53
  54    struct intel_context *intel;
  55
  56    DBG("%s\n", __FUNCTION__);
  57
  58    assert(dPriv);
  59
  60    intel = intelScreenContext(dPriv->driScreenPriv->private);
  61    if (!intel)
  62       return;
  63
  64    /* The LOCK_HARDWARE is required for the cliprects.  Buffer offsets
  65     * should work regardless.
  66     */
  67    LOCK_HARDWARE(intel);
  68
  69    if (dPriv && dPriv->numClipRects) {
  70       struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
  71       struct intel_region *src, *dst;
  72       int nbox = dPriv->numClipRects;
  73       drm_clip_rect_t *pbox = dPriv->pClipRects;
  74       int cpp;
  75       int src_pitch, dst_pitch;
  76       unsigned short src_x, src_y;
  77       int BR13, CMD;
  78       int i;
  79       dri_bo *aper_array[3];
  80
  81       src = intel_get_rb_region(&intel_fb->Base, BUFFER_BACK_LEFT);
  82       dst = intel_get_rb_region(&intel_fb->Base, BUFFER_FRONT_LEFT);
  83
  84       src_pitch = src->pitch * src->cpp;
  85       dst_pitch = dst->pitch * dst->cpp;
  86
  87       cpp = src->cpp;
  88
  89       ASSERT(intel_fb);
  90       ASSERT(intel_fb->Base.Name == 0);    /* Not a user-created FBO */
  91       ASSERT(src);
  92       ASSERT(dst);
  93       ASSERT(src->cpp == dst->cpp);
  94
  95       if (cpp == 2) {
  96          BR13 = (0xCC << 16) | BR13_565;
  97          CMD = XY_SRC_COPY_BLT_CMD;
  98       }
  99       else {
 100          BR13 = (0xCC << 16) | BR13_8888;
 101          CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 102       }
 103
 104       assert(src->tiling != I915_TILING_Y);
 105       assert(dst->tiling != I915_TILING_Y);
 106 #ifndef I915
 107       if (src->tiling != I915_TILING_NONE) {
 108          CMD |= XY_SRC_TILED;
 109          src_pitch /= 4;
 110       }
 111       if (dst->tiling != I915_TILING_NONE) {
 112          CMD |= XY_DST_TILED;
 113          dst_pitch /= 4;
 114       }
 115 #endif
 116       /* do space/cliprects check before going any further */
 117       intel_batchbuffer_require_space(intel->batch, 8 * 4,
 118                                       REFERENCES_CLIPRECTS);
 119    again:
 120       aper_array[0] = intel->batch->buf;
 121       aper_array[1] = dst->buffer;
 122       aper_array[2] = src->buffer;
 123
 124       if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
 125         intel_batchbuffer_flush(intel->batch);
 126         goto again;
 127       }
 128
 129       for (i = 0; i < nbox; i++, pbox++) {
 130          drm_clip_rect_t box = *pbox;
 131
 132          if (rect) {
 133             if (!intel_intersect_cliprects(&box, &box, rect))
 134                continue;
 135          }
 136
 137          if (box.x1 >= box.x2 ||
 138              box.y1 >= box.y2)
 139             continue;
 140
 141          assert(box.x1 < box.x2);
 142          assert(box.y1 < box.y2);
 143          src_x = box.x1 - dPriv->x + dPriv->backX;
 144          src_y = box.y1 - dPriv->y + dPriv->backY;
 145
 146          BEGIN_BATCH(8, REFERENCES_CLIPRECTS);
 147          OUT_BATCH(CMD);
 148          OUT_BATCH(BR13 | dst_pitch);
 149          OUT_BATCH((box.y1 << 16) | box.x1);
 150          OUT_BATCH((box.y2 << 16) | box.x2);
 151
 152          OUT_RELOC(dst->buffer,
 153                    I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 154                    0);
 155          OUT_BATCH((src_y << 16) | src_x);
 156          OUT_BATCH(src_pitch);
 157          OUT_RELOC(src->buffer,
 158                    I915_GEM_DOMAIN_RENDER, 0,
 159                    0);
 160          ADVANCE_BATCH();
 161       }
 162
 163       /* Flush the rendering and the batch so that the results all land on the
 164        * screen in a timely fashion.
 165        */
 166       intel_batchbuffer_emit_mi_flush(intel->batch);
 167       intel_batchbuffer_flush(intel->batch);
 168    }
 169
 170    UNLOCK_HARDWARE(intel);
 171 }
 172
 173 static GLuint translate_raster_op(GLenum logicop)
 174 {
 175    switch(logicop) {
 176    case GL_CLEAR: return 0x00;
 177    case GL_AND: return 0x88;
 178    case GL_AND_REVERSE: return 0x44;
 179    case GL_COPY: return 0xCC;
 180    case GL_AND_INVERTED: return 0x22;
 181    case GL_NOOP: return 0xAA;
 182    case GL_XOR: return 0x66;
 183    case GL_OR: return 0xEE;
 184    case GL_NOR: return 0x11;
 185    case GL_EQUIV: return 0x99;
 186    case GL_INVERT: return 0x55;
 187    case GL_OR_REVERSE: return 0xDD;
 188    case GL_COPY_INVERTED: return 0x33;
 189    case GL_OR_INVERTED: return 0xBB;
 190    case GL_NAND: return 0x77;
 191    case GL_SET: return 0xFF;
 192    default: return 0;
 193    }
 194 }
 195
 196
 197 /* Copy BitBlt
 198  */
 199 GLboolean
 200 intelEmitCopyBlit(struct intel_context *intel,
 201                   GLuint cpp,
 202                   GLshort src_pitch,
 203                   dri_bo *src_buffer,
 204                   GLuint src_offset,
 205                   uint32_t src_tiling,
 206                   GLshort dst_pitch,
 207                   dri_bo *dst_buffer,
 208                   GLuint dst_offset,
 209                   uint32_t dst_tiling,
 210                   GLshort src_x, GLshort src_y,
 211                   GLshort dst_x, GLshort dst_y,
 212                   GLshort w, GLshort h,
 213                   GLenum logic_op)
 214 {
 215    GLuint CMD, BR13, pass = 0;
 216    int dst_y2 = dst_y + h;
 217    int dst_x2 = dst_x + w;
 218    dri_bo *aper_array[3];
 219    BATCH_LOCALS;
 220
 221    if (dst_tiling != I915_TILING_NONE) {
 222       if (dst_offset & 4095)
 223          return GL_FALSE;
 224       if (dst_tiling == I915_TILING_Y)
 225          return GL_FALSE;
 226    }
 227    if (src_tiling != I915_TILING_NONE) {
 228       if (src_offset & 4095)
 229          return GL_FALSE;
 230       if (src_tiling == I915_TILING_Y)
 231          return GL_FALSE;
 232    }
 233
 234    /* do space/cliprects check before going any further */
 235    do {
 236        aper_array[0] = intel->batch->buf;
 237        aper_array[1] = dst_buffer;
 238        aper_array[2] = src_buffer;
 239
 240        if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
 241            intel_batchbuffer_flush(intel->batch);
 242            pass++;
 243        } else
 244            break;
 245    } while (pass < 2);
 246
 247    if (pass >= 2) {
 248        LOCK_HARDWARE(intel);
 249        dri_bo_map(dst_buffer, GL_TRUE);
 250        dri_bo_map(src_buffer, GL_FALSE);
 251        _mesa_copy_rect((GLubyte *)dst_buffer->virtual + dst_offset,
 252                        cpp,
 253                        dst_pitch,
 254                        dst_x, dst_y,
 255                        w, h,
 256                        (GLubyte *)src_buffer->virtual + src_offset,
 257                        src_pitch,
 258                        src_x, src_y);
 259
 260        dri_bo_unmap(src_buffer);
 261        dri_bo_unmap(dst_buffer);
 262        UNLOCK_HARDWARE(intel);
 263
 264        return GL_TRUE;
 265    }
 266
 267    intel_batchbuffer_require_space(intel->batch, 8 * 4, NO_LOOP_CLIPRECTS);
 268    DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
 269        __FUNCTION__,
 270        src_buffer, src_pitch, src_offset, src_x, src_y,
 271        dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h);
 272
 273    src_pitch *= cpp;
 274    dst_pitch *= cpp;
 275
 276    BR13 = translate_raster_op(logic_op) << 16;
 277
 278    switch (cpp) {
 279    case 1:
 280       CMD = XY_SRC_COPY_BLT_CMD;
 281       break;
 282    case 2:
 283       BR13 |= BR13_565;
 284       CMD = XY_SRC_COPY_BLT_CMD;
 285       break;
 286    case 4:
 287       BR13 |= BR13_8888;
 288       CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 289       break;
 290    default:
 291       return GL_FALSE;
 292    }
 293
 294 #ifndef I915
 295    if (dst_tiling != I915_TILING_NONE) {
 296       CMD |= XY_DST_TILED;
 297       dst_pitch /= 4;
 298    }
 299    if (src_tiling != I915_TILING_NONE) {
 300       CMD |= XY_SRC_TILED;
 301       src_pitch /= 4;
 302    }
 303 #endif
 304
 305    if (dst_y2 <= dst_y || dst_x2 <= dst_x) {
 306       return GL_TRUE;
 307    }
 308
 309    assert(dst_x < dst_x2);
 310    assert(dst_y < dst_y2);
 311
 312    BEGIN_BATCH(8, NO_LOOP_CLIPRECTS);
 313    OUT_BATCH(CMD);
 314    OUT_BATCH(BR13 | (uint16_t)dst_pitch);
 315    OUT_BATCH((dst_y << 16) | dst_x);
 316    OUT_BATCH((dst_y2 << 16) | dst_x2);
 317    OUT_RELOC(dst_buffer,
 318              I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 319              dst_offset);
 320    OUT_BATCH((src_y << 16) | src_x);
 321    OUT_BATCH((uint16_t)src_pitch);
 322    OUT_RELOC(src_buffer,
 323              I915_GEM_DOMAIN_RENDER, 0,
 324              src_offset);
 325    ADVANCE_BATCH();
 326
 327    intel_batchbuffer_emit_mi_flush(intel->batch);
 328
 329    return GL_TRUE;
 330 }
 331
 332
 333 /**
 334  * Use blitting to clear the renderbuffers named by 'flags'.
 335  * Note: we can't use the ctx->DrawBuffer->_ColorDrawBufferIndexes field
 336  * since that might include software renderbuffers or renderbuffers
 337  * which we're clearing with triangles.
 338  * \param mask  bitmask of BUFFER_BIT_* values indicating buffers to clear
 339  */
 340 void
 341 intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
 342 {
 343    struct intel_context *intel = intel_context(ctx);
 344    struct gl_framebuffer *fb = ctx->DrawBuffer;
 345    GLuint clear_depth;
 346    GLbitfield skipBuffers = 0;
 347    unsigned int num_cliprects;
 348    struct drm_clip_rect *cliprects;
 349    int x_off, y_off;
 350    BATCH_LOCALS;
 351
 352    /*
 353     * Compute values for clearing the buffers.
 354     */
 355    clear_depth = 0;
 356    if (mask & BUFFER_BIT_DEPTH) {
 357       clear_depth = (GLuint) (fb->_DepthMax * ctx->Depth.Clear);
 358    }
 359    if (mask & BUFFER_BIT_STENCIL) {
 360       clear_depth |= (ctx->Stencil.Clear & 0xff) << 24;
 361    }
 362
 363    /* If clearing both depth and stencil, skip BUFFER_BIT_STENCIL in
 364     * the loop below.
 365     */
 366    if ((mask & BUFFER_BIT_DEPTH) && (mask & BUFFER_BIT_STENCIL)) {
 367       skipBuffers = BUFFER_BIT_STENCIL;
 368    }
 369
 370    LOCK_HARDWARE(intel);
 371
 372    intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off);
 373    if (num_cliprects) {
 374       GLint cx, cy, cw, ch;
 375       drm_clip_rect_t clear;
 376       int i;
 377
 378       /* Get clear bounds after locking */
 379       cx = fb->_Xmin;
 380       cy = fb->_Ymin;
 381       cw = fb->_Xmax - cx;
 382       ch = fb->_Ymax - cy;
 383
 384       if (fb->Name == 0) {
 385          /* clearing a window */
 386
 387          /* flip top to bottom */
 388          clear.x1 = cx + x_off;
 389          clear.y1 = intel->driDrawable->y + intel->driDrawable->h - cy - ch;
 390          clear.x2 = clear.x1 + cw;
 391          clear.y2 = clear.y1 + ch;
 392       }
 393       else {
 394          /* clearing FBO */
 395          assert(num_cliprects == 1);
 396          assert(cliprects == &intel->fboRect);
 397          clear.x1 = cx;
 398          clear.y1 = cy;
 399          clear.x2 = clear.x1 + cw;
 400          clear.y2 = clear.y1 + ch;
 401          /* no change to mask */
 402       }
 403
 404       for (i = 0; i < num_cliprects; i++) {
 405          const drm_clip_rect_t *box = &cliprects[i];
 406          drm_clip_rect_t b;
 407          GLuint buf;
 408          GLuint clearMask = mask;      /* use copy, since we modify it below */
 409          GLboolean all = (cw == fb->Width && ch == fb->Height);
 410
 411          if (!all) {
 412             intel_intersect_cliprects(&b, &clear, box);
 413          }
 414          else {
 415             b = *box;
 416          }
 417
 418          if (b.x1 >= b.x2 || b.y1 >= b.y2)
 419             continue;
 420
 421          if (0)
 422             _mesa_printf("clear %d,%d..%d,%d, mask %x\n",
 423                          b.x1, b.y1, b.x2, b.y2, mask);
 424
 425          /* Loop over all renderbuffers */
 426          for (buf = 0; buf < BUFFER_COUNT && clearMask; buf++) {
 427             const GLbitfield bufBit = 1 << buf;
 428             if ((clearMask & bufBit) && !(bufBit & skipBuffers)) {
 429                /* OK, clear this renderbuffer */
 430                struct intel_renderbuffer *irb = intel_get_renderbuffer(fb, buf);
 431                dri_bo *write_buffer =
 432                   intel_region_buffer(intel, irb->region,
 433                                       all ? INTEL_WRITE_FULL :
 434                                       INTEL_WRITE_PART);
 435                int x1 = b.x1 + irb->region->draw_x;
 436                int y1 = b.y1 + irb->region->draw_y;
 437                int x2 = b.x2 + irb->region->draw_x;
 438                int y2 = b.y2 + irb->region->draw_y;
 439
 440                GLuint clearVal;
 441                GLint pitch, cpp;
 442                GLuint BR13, CMD;
 443
 444                pitch = irb->region->pitch;
 445                cpp = irb->region->cpp;
 446
 447                DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n",
 448                    __FUNCTION__,
 449                    irb->region->buffer, (pitch * cpp),
 450                    x1, y1, x2 - x1, y2 - y1);
 451
 452                BR13 = 0xf0 << 16;
 453                CMD = XY_COLOR_BLT_CMD;
 454
 455                /* Setup the blit command */
 456                if (cpp == 4) {
 457                   BR13 |= BR13_8888;
 458                   if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
 459                      if (clearMask & BUFFER_BIT_DEPTH)
 460                         CMD |= XY_BLT_WRITE_RGB;
 461                      if (clearMask & BUFFER_BIT_STENCIL)
 462                         CMD |= XY_BLT_WRITE_ALPHA;
 463                   }
 464                   else {
 465                      /* clearing RGBA */
 466                      CMD |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 467                   }
 468                }
 469                else {
 470                   ASSERT(cpp == 2);
 471                   BR13 |= BR13_565;
 472                }
 473
 474                assert(irb->region->tiling != I915_TILING_Y);
 475
 476 #ifndef I915
 477                if (irb->region->tiling != I915_TILING_NONE) {
 478                   CMD |= XY_DST_TILED;
 479                   pitch /= 4;
 480                }
 481 #endif
 482                BR13 |= (pitch * cpp);
 483
 484                if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
 485                   clearVal = clear_depth;
 486                }
 487                else {
 488                   uint8_t clear[4];
 489                   GLclampf *color = ctx->Color.ClearColor;
 490
 491                   CLAMPED_FLOAT_TO_UBYTE(clear[0], color[0]);
 492                   CLAMPED_FLOAT_TO_UBYTE(clear[1], color[1]);
 493                   CLAMPED_FLOAT_TO_UBYTE(clear[2], color[2]);
 494                   CLAMPED_FLOAT_TO_UBYTE(clear[3], color[3]);
 495
 496                   switch (irb->Base.Format) {
 497                   case MESA_FORMAT_ARGB8888:
 498                   case MESA_FORMAT_XRGB8888:
 499                      clearVal = PACK_COLOR_8888(clear[3], clear[0],
 500                                                 clear[1], clear[2]);
 501                      break;
 502                   case MESA_FORMAT_RGB565:
 503                      clearVal = PACK_COLOR_565(clear[0], clear[1], clear[2]);
 504                      break;
 505                   case MESA_FORMAT_ARGB4444:
 506                      clearVal = PACK_COLOR_4444(clear[3], clear[0],
 507                                                 clear[1], clear[2]);
 508                      break;
 509                   case MESA_FORMAT_ARGB1555:
 510                      clearVal = PACK_COLOR_1555(clear[3], clear[0],
 511                                                 clear[1], clear[2]);
 512                      break;
 513                   default:
 514                      _mesa_problem(ctx, "Unexpected renderbuffer format: %d\n",
 515                                    irb->Base.Format);
 516                      clearVal = 0;
 517                   }
 518                }
 519
 520                /*
 521                   _mesa_debug(ctx, "hardware blit clear buf %d rb id %d\n",
 522                   buf, irb->Base.Name);
 523                 */
 524
 525                assert(x1 < x2);
 526                assert(y1 < y2);
 527
 528                BEGIN_BATCH(6, REFERENCES_CLIPRECTS);
 529                OUT_BATCH(CMD);
 530                OUT_BATCH(BR13);
 531                OUT_BATCH((y1 << 16) | x1);
 532                OUT_BATCH((y2 << 16) | x2);
 533                OUT_RELOC(write_buffer,
 534                          I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 535                          0);
 536                OUT_BATCH(clearVal);
 537                ADVANCE_BATCH();
 538                clearMask &= ~bufBit;    /* turn off bit, for faster loop exit */
 539             }
 540          }
 541       }
 542    }
 543
 544    UNLOCK_HARDWARE(intel);
 545 }
 546
 547 GLboolean
 548 intelEmitImmediateColorExpandBlit(struct intel_context *intel,
 549                                   GLuint cpp,
 550                                   GLubyte *src_bits, GLuint src_size,
 551                                   GLuint fg_color,
 552                                   GLshort dst_pitch,
 553                                   dri_bo *dst_buffer,
 554                                   GLuint dst_offset,
 555                                   uint32_t dst_tiling,
 556                                   GLshort x, GLshort y,
 557                                   GLshort w, GLshort h,
 558                                   GLenum logic_op)
 559 {
 560    int dwords = ALIGN(src_size, 8) / 4;
 561    uint32_t opcode, br13, blit_cmd;
 562
 563    if (dst_tiling != I915_TILING_NONE) {
 564       if (dst_offset & 4095)
 565          return GL_FALSE;
 566       if (dst_tiling == I915_TILING_Y)
 567          return GL_FALSE;
 568    }
 569
 570    assert( logic_op - GL_CLEAR >= 0 );
 571    assert( logic_op - GL_CLEAR < 0x10 );
 572    assert(dst_pitch > 0);
 573
 574    if (w < 0 || h < 0)
 575       return GL_TRUE;
 576
 577    dst_pitch *= cpp;
 578
 579    DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n",
 580        __FUNCTION__,
 581        dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords);
 582
 583    intel_batchbuffer_require_space( intel->batch,
 584                                     (8 * 4) +
 585                                     (3 * 4) +
 586                                     dwords * 4,
 587                                     REFERENCES_CLIPRECTS );
 588
 589    opcode = XY_SETUP_BLT_CMD;
 590    if (cpp == 4)
 591       opcode |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 592 #ifndef I915
 593    if (dst_tiling != I915_TILING_NONE) {
 594       opcode |= XY_DST_TILED;
 595       dst_pitch /= 4;
 596    }
 597 #endif
 598
 599    br13 = dst_pitch | (translate_raster_op(logic_op) << 16) | (1 << 29);
 600    if (cpp == 2)
 601       br13 |= BR13_565;
 602    else
 603       br13 |= BR13_8888;
 604
 605    blit_cmd = XY_TEXT_IMMEDIATE_BLIT_CMD | XY_TEXT_BYTE_PACKED; /* packing? */
 606    if (dst_tiling != I915_TILING_NONE)
 607       blit_cmd |= XY_DST_TILED;
 608
 609    BEGIN_BATCH(8 + 3, REFERENCES_CLIPRECTS);
 610    OUT_BATCH(opcode);
 611    OUT_BATCH(br13);
 612    OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */
 613    OUT_BATCH((100 << 16) | 100); /* clip x2, y2 */
 614    OUT_RELOC(dst_buffer,
 615              I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 616              dst_offset);
 617    OUT_BATCH(0); /* bg */
 618    OUT_BATCH(fg_color); /* fg */
 619    OUT_BATCH(0); /* pattern base addr */
 620
 621    OUT_BATCH(blit_cmd | ((3 - 2) + dwords));
 622    OUT_BATCH((y << 16) | x);
 623    OUT_BATCH(((y + h) << 16) | (x + w));
 624    ADVANCE_BATCH();
 625
 626    intel_batchbuffer_data( intel->batch,
 627                            src_bits,
 628                            dwords * 4,
 629                            REFERENCES_CLIPRECTS );
 630
 631    intel_batchbuffer_emit_mi_flush(intel->batch);
 632
 633    return GL_TRUE;
 634 }
 635
 636 /* We don't have a memmove-type blit like some other hardware, so we'll do a
 637  * rectangular blit covering a large space, then emit 1-scanline blit at the
 638  * end to cover the last if we need.
 639  */
 640 void
 641 intel_emit_linear_blit(struct intel_context *intel,
 642                        drm_intel_bo *dst_bo,
 643                        unsigned int dst_offset,
 644                        drm_intel_bo *src_bo,
 645                        unsigned int src_offset,
 646                        unsigned int size)
 647 {
 648    GLuint pitch, height;
 649
 650    /* The pitch is a signed value. */
 651    pitch = MIN2(size, (1 << 15) - 1);
 652    height = size / pitch;
 653    intelEmitCopyBlit(intel, 1,
 654                      pitch, src_bo, src_offset, I915_TILING_NONE,
 655                      pitch, dst_bo, dst_offset, I915_TILING_NONE,
 656                      0, 0, /* src x/y */
 657                      0, 0, /* dst x/y */
 658                      pitch, height, /* w, h */
 659                      GL_COPY);
 660
 661    src_offset += pitch * height;
 662    dst_offset += pitch * height;
 663    size -= pitch * height;
 664    assert (size < (1 << 15));
 665    if (size != 0) {
 666       intelEmitCopyBlit(intel, 1,
 667                         size, src_bo, src_offset, I915_TILING_NONE,
 668                         size, dst_bo, dst_offset, I915_TILING_NONE,
 669                         0, 0, /* src x/y */
 670                         0, 0, /* dst x/y */
 671                         size, 1, /* w, h */
 672                         GL_COPY);
 673    }
 674 }