Add E7221 variant to i915.
[mesa.git] / src / mesa / drivers / dri / intel / intel_chipset.h
1 /*
2 * Copyright © 2007 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28 #define PCI_CHIP_I810 0x7121
29 #define PCI_CHIP_I810_DC100 0x7123
30 #define PCI_CHIP_I810_E 0x7125
31 #define PCI_CHIP_I815 0x1132
32
33 #define PCI_CHIP_I830_M 0x3577
34 #define PCI_CHIP_845_G 0x2562
35 #define PCI_CHIP_I855_GM 0x3582
36 #define PCI_CHIP_I865_G 0x2572
37
38 #define PCI_CHIP_I915_G 0x2582
39 #define PCI_CHIP_E7221_G 0x258A
40 #define PCI_CHIP_I915_GM 0x2592
41 #define PCI_CHIP_I945_G 0x2772
42 #define PCI_CHIP_I945_GM 0x27A2
43 #define PCI_CHIP_I945_GME 0x27AE
44
45 #define PCI_CHIP_Q35_G 0x29B2
46 #define PCI_CHIP_G33_G 0x29C2
47 #define PCI_CHIP_Q33_G 0x29D2
48
49 #define PCI_CHIP_I965_G 0x29A2
50 #define PCI_CHIP_I965_Q 0x2992
51 #define PCI_CHIP_I965_G_1 0x2982
52 #define PCI_CHIP_I946_GZ 0x2972
53 #define PCI_CHIP_I965_GM 0x2A02
54 #define PCI_CHIP_I965_GME 0x2A12
55
56 #define PCI_CHIP_IGD_GM 0x2A42
57
58 #define IS_MOBILE(devid) (devid == PCI_CHIP_I855_GM || \
59 devid == PCI_CHIP_I915_GM || \
60 devid == PCI_CHIP_I945_GM || \
61 devid == PCI_CHIP_I945_GME || \
62 devid == PCI_CHIP_I965_GM || \
63 devid == PCI_CHIP_I965_GME || \
64 devid == PCI_CHIP_IGD_GM)
65
66 #define IS_IGD(devid) (devid == PCI_CHIP_IGD_GM)
67
68 #define IS_965(devid) (devid == PCI_CHIP_I965_G || \
69 devid == PCI_CHIP_I965_Q || \
70 devid == PCI_CHIP_I965_G_1 || \
71 devid == PCI_CHIP_I965_GM || \
72 devid == PCI_CHIP_I965_GME || \
73 devid == PCI_CHIP_I946_GZ || \
74 IS_IGD(devid))
75
76 #define IS_9XX(devid) (devid == PCI_CHIP_I915_G || \
77 devid == PCI_CHIP_E7221_G || \
78 devid == PCI_CHIP_I915_GM || \
79 devid == PCI_CHIP_I945_G || \
80 devid == PCI_CHIP_I945_GM || \
81 devid == PCI_CHIP_I945_GME || \
82 devid == PCI_CHIP_G33_G || \
83 devid == PCI_CHIP_Q35_G || \
84 devid == PCI_CHIP_Q33_G || \
85 IS_965(devid))
86
87 #define IS_945(devid) (devid == PCI_CHIP_I945_G || \
88 devid == PCI_CHIP_I945_GM || \
89 devid == PCI_CHIP_I945_GME || \
90 devid == PCI_CHIP_G33_G || \
91 devid == PCI_CHIP_Q33_G || \
92 devid == PCI_CHIP_Q35_G)