src/mesa/drivers/dri/intel/intel_clear.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * Copyright 2009 Intel Corporation.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  **************************************************************************/
  28
  29 #include "main/glheader.h"
  30 #include "main/mtypes.h"
  31 #include "swrast/swrast.h"
  32 #include "drivers/common/meta.h"
  33
  34 #include "intel_context.h"
  35 #include "intel_blit.h"
  36 #include "intel_clear.h"
  37 #include "intel_fbo.h"
  38 #include "intel_regions.h"
  39
  40 #define FILE_DEBUG_FLAG DEBUG_BLIT
  41
  42 static const char *buffer_names[] = {
  43    [BUFFER_FRONT_LEFT] = "front",
  44    [BUFFER_BACK_LEFT] = "back",
  45    [BUFFER_FRONT_RIGHT] = "front right",
  46    [BUFFER_BACK_RIGHT] = "back right",
  47    [BUFFER_DEPTH] = "depth",
  48    [BUFFER_STENCIL] = "stencil",
  49    [BUFFER_ACCUM] = "accum",
  50    [BUFFER_AUX0] = "aux0",
  51    [BUFFER_COLOR0] = "color0",
  52    [BUFFER_COLOR1] = "color1",
  53    [BUFFER_COLOR2] = "color2",
  54    [BUFFER_COLOR3] = "color3",
  55    [BUFFER_COLOR4] = "color4",
  56    [BUFFER_COLOR5] = "color5",
  57    [BUFFER_COLOR6] = "color6",
  58    [BUFFER_COLOR7] = "color7",
  59 };
  60
  61 /**
  62  * Called by ctx->Driver.Clear.
  63  */
  64 static void
  65 intelClear(GLcontext *ctx, GLbitfield mask)
  66 {
  67    struct intel_context *intel = intel_context(ctx);
  68    const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask);
  69    GLbitfield tri_mask = 0;
  70    GLbitfield blit_mask = 0;
  71    GLbitfield swrast_mask = 0;
  72    struct gl_framebuffer *fb = ctx->DrawBuffer;
  73    GLuint i;
  74
  75    if (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_FRONT_RIGHT)) {
  76       intel->front_buffer_dirty = GL_TRUE;
  77    }
  78
  79    if (0)
  80       fprintf(stderr, "%s\n", __FUNCTION__);
  81
  82    /* HW color buffers (front, back, aux, generic FBO, etc) */
  83    if (colorMask == ~0) {
  84       /* clear all R,G,B,A */
  85       /* XXX FBO: need to check if colorbuffers are software RBOs! */
  86       blit_mask |= (mask & BUFFER_BITS_COLOR);
  87    }
  88    else {
  89       /* glColorMask in effect */
  90       tri_mask |= (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_BACK_LEFT));
  91    }
  92
  93    /* HW stencil */
  94    if (mask & BUFFER_BIT_STENCIL) {
  95       const struct intel_region *stencilRegion
  96          = intel_get_rb_region(fb, BUFFER_STENCIL);
  97       if (stencilRegion) {
  98          /* have hw stencil */
  99          if (stencilRegion->tiling == I915_TILING_Y ||
 100              (ctx->Stencil.WriteMask[0] & 0xff) != 0xff) {
 101             /* We have to use the 3D engine if we're clearing a partial mask
 102              * of the stencil buffer, or if we're on a 965 which has a tiled
 103              * depth/stencil buffer in a layout we can't blit to.
 104              */
 105             tri_mask |= BUFFER_BIT_STENCIL;
 106          }
 107          else {
 108             /* clearing all stencil bits, use blitting */
 109             blit_mask |= BUFFER_BIT_STENCIL;
 110          }
 111       }
 112    }
 113
 114    /* HW depth */
 115    if (mask & BUFFER_BIT_DEPTH) {
 116       const struct intel_region *irb = intel_get_rb_region(fb, BUFFER_DEPTH);
 117
 118       /* clear depth with whatever method is used for stencil (see above) */
 119       if (irb->tiling == I915_TILING_Y || tri_mask & BUFFER_BIT_STENCIL)
 120          tri_mask |= BUFFER_BIT_DEPTH;
 121       else
 122          blit_mask |= BUFFER_BIT_DEPTH;
 123    }
 124
 125    /* If we're doing a tri pass for depth/stencil, include a likely color
 126     * buffer with it.
 127     */
 128    if (mask & (BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL)) {
 129       int color_bit = _mesa_ffs(mask & BUFFER_BITS_COLOR);
 130       if (color_bit != 0) {
 131          tri_mask |= blit_mask & (1 << (color_bit - 1));
 132          blit_mask &= ~(1 << (color_bit - 1));
 133       }
 134    }
 135
 136    /* SW fallback clearing */
 137    swrast_mask = mask & ~tri_mask & ~blit_mask;
 138
 139    {
 140       /* look for non-Intel renderbuffers (clear them with swrast) */
 141       GLbitfield blit_or_tri = blit_mask | tri_mask;
 142       while (blit_or_tri) {
 143          GLuint i = _mesa_ffs(blit_or_tri) - 1;
 144          GLbitfield bufBit = 1 << i;
 145          if (!fb->Attachment[i].Renderbuffer->ClassID) {
 146             blit_mask &= ~bufBit;
 147             tri_mask &= ~bufBit;
 148             swrast_mask |= bufBit;
 149          }
 150          blit_or_tri ^= bufBit;
 151       }
 152    }
 153
 154    if (blit_mask) {
 155       if (INTEL_DEBUG & DEBUG_BLIT) {
 156          DBG("blit clear:");
 157          for (i = 0; i < BUFFER_COUNT; i++) {
 158             if (blit_mask & (1 << i))
 159                DBG(" %s", buffer_names[i]);
 160          }
 161          DBG("\n");
 162       }
 163       intelClearWithBlit(ctx, blit_mask);
 164    }
 165
 166    if (tri_mask) {
 167       if (INTEL_DEBUG & DEBUG_BLIT) {
 168          DBG("tri clear:");
 169          for (i = 0; i < BUFFER_COUNT; i++) {
 170             if (tri_mask & (1 << i))
 171                DBG(" %s", buffer_names[i]);
 172          }
 173          DBG("\n");
 174       }
 175
 176       _mesa_meta_Clear(&intel->ctx, tri_mask);
 177    }
 178
 179    if (swrast_mask) {
 180       if (INTEL_DEBUG & DEBUG_BLIT) {
 181          DBG("swrast clear:");
 182          for (i = 0; i < BUFFER_COUNT; i++) {
 183             if (swrast_mask & (1 << i))
 184                DBG(" %s", buffer_names[i]);
 185          }
 186          DBG("\n");
 187       }
 188       _swrast_Clear(ctx, swrast_mask);
 189    }
 190 }
 191
 192
 193 void
 194 intelInitClearFuncs(struct dd_function_table *functions)
 195 {
 196    functions->Clear = intelClear;
 197 }