src/mesa/drivers/dri/intel/intel_clear.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * Copyright 2009 Intel Corporation.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  **************************************************************************/
  28
  29 #include "main/glheader.h"
  30 #include "main/mtypes.h"
  31 #include "swrast/swrast.h"
  32 #include "drivers/common/meta.h"
  33
  34 #include "intel_context.h"
  35 #include "intel_blit.h"
  36 #include "intel_chipset.h"
  37 #include "intel_clear.h"
  38 #include "intel_fbo.h"
  39 #include "intel_pixel.h"
  40 #include "intel_regions.h"
  41 #include "intel_batchbuffer.h"
  42
  43 #define FILE_DEBUG_FLAG DEBUG_BLIT
  44
  45 static const char *buffer_names[] = {
  46    [BUFFER_FRONT_LEFT] = "front",
  47    [BUFFER_BACK_LEFT] = "back",
  48    [BUFFER_FRONT_RIGHT] = "front right",
  49    [BUFFER_BACK_RIGHT] = "back right",
  50    [BUFFER_DEPTH] = "depth",
  51    [BUFFER_STENCIL] = "stencil",
  52    [BUFFER_ACCUM] = "accum",
  53    [BUFFER_AUX0] = "aux0",
  54    [BUFFER_COLOR0] = "color0",
  55    [BUFFER_COLOR1] = "color1",
  56    [BUFFER_COLOR2] = "color2",
  57    [BUFFER_COLOR3] = "color3",
  58    [BUFFER_COLOR4] = "color4",
  59    [BUFFER_COLOR5] = "color5",
  60    [BUFFER_COLOR6] = "color6",
  61    [BUFFER_COLOR7] = "color7",
  62 };
  63
  64 /**
  65  * Called by ctx->Driver.Clear.
  66  */
  67 static void
  68 intelClear(GLcontext *ctx, GLbitfield mask)
  69 {
  70    struct intel_context *intel = intel_context(ctx);
  71    const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask);
  72    GLbitfield tri_mask = 0;
  73    GLbitfield blit_mask = 0;
  74    GLbitfield swrast_mask = 0;
  75    struct gl_framebuffer *fb = ctx->DrawBuffer;
  76    GLuint i;
  77
  78    if (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_FRONT_RIGHT)) {
  79       intel->front_buffer_dirty = GL_TRUE;
  80    }
  81
  82    if (0)
  83       fprintf(stderr, "%s\n", __FUNCTION__);
  84
  85    /* HW color buffers (front, back, aux, generic FBO, etc) */
  86    if (colorMask == ~0) {
  87       /* clear all R,G,B,A */
  88       /* XXX FBO: need to check if colorbuffers are software RBOs! */
  89       blit_mask |= (mask & BUFFER_BITS_COLOR);
  90    }
  91    else {
  92       /* glColorMask in effect */
  93       tri_mask |= (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_BACK_LEFT));
  94    }
  95
  96    /* HW stencil */
  97    if (mask & BUFFER_BIT_STENCIL) {
  98       const struct intel_region *stencilRegion
  99          = intel_get_rb_region(fb, BUFFER_STENCIL);
 100       if (stencilRegion) {
 101          /* have hw stencil */
 102          if (stencilRegion->tiling == I915_TILING_Y ||
 103              (ctx->Stencil.WriteMask[0] & 0xff) != 0xff) {
 104             /* We have to use the 3D engine if we're clearing a partial mask
 105              * of the stencil buffer, or if we're on a 965 which has a tiled
 106              * depth/stencil buffer in a layout we can't blit to.
 107              */
 108             tri_mask |= BUFFER_BIT_STENCIL;
 109          }
 110          else {
 111             /* clearing all stencil bits, use blitting */
 112             blit_mask |= BUFFER_BIT_STENCIL;
 113          }
 114       }
 115    }
 116
 117    /* HW depth */
 118    if (mask & BUFFER_BIT_DEPTH) {
 119       const struct intel_region *irb = intel_get_rb_region(fb, BUFFER_DEPTH);
 120
 121       /* clear depth with whatever method is used for stencil (see above) */
 122       if (irb->tiling == I915_TILING_Y || tri_mask & BUFFER_BIT_STENCIL)
 123          tri_mask |= BUFFER_BIT_DEPTH;
 124       else
 125          blit_mask |= BUFFER_BIT_DEPTH;
 126    }
 127
 128    /* If we're doing a tri pass for depth/stencil, include a likely color
 129     * buffer with it.
 130     */
 131    if (mask & (BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL)) {
 132       int color_bit = _mesa_ffs(mask & BUFFER_BITS_COLOR);
 133       if (color_bit != 0) {
 134          tri_mask |= blit_mask & (1 << (color_bit - 1));
 135          blit_mask &= ~(1 << (color_bit - 1));
 136       }
 137    }
 138
 139    /* SW fallback clearing */
 140    swrast_mask = mask & ~tri_mask & ~blit_mask;
 141
 142    {
 143       /* look for non-Intel renderbuffers (clear them with swrast) */
 144       GLbitfield blit_or_tri = blit_mask | tri_mask;
 145       while (blit_or_tri) {
 146          GLuint i = _mesa_ffs(blit_or_tri) - 1;
 147          GLbitfield bufBit = 1 << i;
 148          if (!fb->Attachment[i].Renderbuffer->ClassID) {
 149             blit_mask &= ~bufBit;
 150             tri_mask &= ~bufBit;
 151             swrast_mask |= bufBit;
 152          }
 153          blit_or_tri ^= bufBit;
 154       }
 155    }
 156
 157    if (blit_mask) {
 158       if (INTEL_DEBUG & DEBUG_BLIT) {
 159          DBG("blit clear:");
 160          for (i = 0; i < BUFFER_COUNT; i++) {
 161             if (blit_mask & (1 << i))
 162                DBG(" %s", buffer_names[i]);
 163          }
 164          DBG("\n");
 165       }
 166       intelClearWithBlit(ctx, blit_mask);
 167    }
 168
 169    if (tri_mask) {
 170       if (INTEL_DEBUG & DEBUG_BLIT) {
 171          DBG("tri clear:");
 172          for (i = 0; i < BUFFER_COUNT; i++) {
 173             if (tri_mask & (1 << i))
 174                DBG(" %s", buffer_names[i]);
 175          }
 176          DBG("\n");
 177       }
 178
 179       _mesa_meta_Clear(&intel->ctx, tri_mask);
 180    }
 181
 182    if (swrast_mask) {
 183       if (INTEL_DEBUG & DEBUG_BLIT) {
 184          DBG("swrast clear:");
 185          for (i = 0; i < BUFFER_COUNT; i++) {
 186             if (swrast_mask & (1 << i))
 187                DBG(" %s", buffer_names[i]);
 188          }
 189          DBG("\n");
 190       }
 191       _swrast_Clear(ctx, swrast_mask);
 192    }
 193 }
 194
 195
 196 void
 197 intelInitClearFuncs(struct dd_function_table *functions)
 198 {
 199    functions->Clear = intelClear;
 200 }