intel: Use rb->Data and rb->RowStride to handle spans Y flipping.
[mesa.git] / src / mesa / drivers / dri / intel / intel_context.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/extensions.h"
32 #include "main/fbobject.h"
33 #include "main/framebuffer.h"
34 #include "main/imports.h"
35 #include "main/points.h"
36 #include "main/renderbuffer.h"
37
38 #include "swrast/swrast.h"
39 #include "swrast_setup/swrast_setup.h"
40 #include "tnl/tnl.h"
41 #include "drivers/common/driverfuncs.h"
42 #include "drivers/common/meta.h"
43
44 #include "intel_chipset.h"
45 #include "intel_buffers.h"
46 #include "intel_tex.h"
47 #include "intel_batchbuffer.h"
48 #include "intel_clear.h"
49 #include "intel_extensions.h"
50 #include "intel_pixel.h"
51 #include "intel_regions.h"
52 #include "intel_buffer_objects.h"
53 #include "intel_fbo.h"
54 #include "intel_bufmgr.h"
55 #include "intel_screen.h"
56
57 #include "drirenderbuffer.h"
58 #include "utils.h"
59
60
61 #ifndef INTEL_DEBUG
62 int INTEL_DEBUG = (0);
63 #endif
64
65
66 static const GLubyte *
67 intelGetString(struct gl_context * ctx, GLenum name)
68 {
69 const struct intel_context *const intel = intel_context(ctx);
70 const char *chipset;
71 static char buffer[128];
72
73 switch (name) {
74 case GL_VENDOR:
75 return (GLubyte *) "Tungsten Graphics, Inc";
76 break;
77
78 case GL_RENDERER:
79 switch (intel->intelScreen->deviceID) {
80 case PCI_CHIP_845_G:
81 chipset = "Intel(R) 845G";
82 break;
83 case PCI_CHIP_I830_M:
84 chipset = "Intel(R) 830M";
85 break;
86 case PCI_CHIP_I855_GM:
87 chipset = "Intel(R) 852GM/855GM";
88 break;
89 case PCI_CHIP_I865_G:
90 chipset = "Intel(R) 865G";
91 break;
92 case PCI_CHIP_I915_G:
93 chipset = "Intel(R) 915G";
94 break;
95 case PCI_CHIP_E7221_G:
96 chipset = "Intel (R) E7221G (i915)";
97 break;
98 case PCI_CHIP_I915_GM:
99 chipset = "Intel(R) 915GM";
100 break;
101 case PCI_CHIP_I945_G:
102 chipset = "Intel(R) 945G";
103 break;
104 case PCI_CHIP_I945_GM:
105 chipset = "Intel(R) 945GM";
106 break;
107 case PCI_CHIP_I945_GME:
108 chipset = "Intel(R) 945GME";
109 break;
110 case PCI_CHIP_G33_G:
111 chipset = "Intel(R) G33";
112 break;
113 case PCI_CHIP_Q35_G:
114 chipset = "Intel(R) Q35";
115 break;
116 case PCI_CHIP_Q33_G:
117 chipset = "Intel(R) Q33";
118 break;
119 case PCI_CHIP_IGD_GM:
120 case PCI_CHIP_IGD_G:
121 chipset = "Intel(R) IGD";
122 break;
123 case PCI_CHIP_I965_Q:
124 chipset = "Intel(R) 965Q";
125 break;
126 case PCI_CHIP_I965_G:
127 case PCI_CHIP_I965_G_1:
128 chipset = "Intel(R) 965G";
129 break;
130 case PCI_CHIP_I946_GZ:
131 chipset = "Intel(R) 946GZ";
132 break;
133 case PCI_CHIP_I965_GM:
134 chipset = "Intel(R) 965GM";
135 break;
136 case PCI_CHIP_I965_GME:
137 chipset = "Intel(R) 965GME/GLE";
138 break;
139 case PCI_CHIP_GM45_GM:
140 chipset = "Mobile IntelĀ® GM45 Express Chipset";
141 break;
142 case PCI_CHIP_IGD_E_G:
143 chipset = "Intel(R) Integrated Graphics Device";
144 break;
145 case PCI_CHIP_G45_G:
146 chipset = "Intel(R) G45/G43";
147 break;
148 case PCI_CHIP_Q45_G:
149 chipset = "Intel(R) Q45/Q43";
150 break;
151 case PCI_CHIP_G41_G:
152 chipset = "Intel(R) G41";
153 break;
154 case PCI_CHIP_B43_G:
155 case PCI_CHIP_B43_G1:
156 chipset = "Intel(R) B43";
157 break;
158 case PCI_CHIP_ILD_G:
159 chipset = "Intel(R) Ironlake Desktop";
160 break;
161 case PCI_CHIP_ILM_G:
162 chipset = "Intel(R) Ironlake Mobile";
163 break;
164 case PCI_CHIP_SANDYBRIDGE_GT1:
165 case PCI_CHIP_SANDYBRIDGE_GT2:
166 case PCI_CHIP_SANDYBRIDGE_GT2_PLUS:
167 chipset = "Intel(R) Sandybridge Desktop";
168 break;
169 case PCI_CHIP_SANDYBRIDGE_M_GT1:
170 case PCI_CHIP_SANDYBRIDGE_M_GT2:
171 case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS:
172 chipset = "Intel(R) Sandybridge Mobile";
173 break;
174 case PCI_CHIP_SANDYBRIDGE_S:
175 chipset = "Intel(R) Sandybridge Server";
176 break;
177 case PCI_CHIP_IVYBRIDGE_GT1:
178 case PCI_CHIP_IVYBRIDGE_GT2:
179 chipset = "Intel(R) Ivybridge Desktop";
180 break;
181 case PCI_CHIP_IVYBRIDGE_M_GT1:
182 case PCI_CHIP_IVYBRIDGE_M_GT2:
183 chipset = "Intel(R) Ivybridge Mobile";
184 break;
185 case PCI_CHIP_IVYBRIDGE_S_GT1:
186 chipset = "Intel(R) Ivybridge Server";
187 break;
188 default:
189 chipset = "Unknown Intel Chipset";
190 break;
191 }
192
193 (void) driGetRendererString(buffer, chipset, 0);
194 return (GLubyte *) buffer;
195
196 default:
197 return NULL;
198 }
199 }
200
201 static void
202 intel_flush_front(struct gl_context *ctx)
203 {
204 struct intel_context *intel = intel_context(ctx);
205 __DRIcontext *driContext = intel->driContext;
206 __DRIscreen *const screen = intel->intelScreen->driScrnPriv;
207
208 if ((ctx->DrawBuffer->Name == 0) && intel->front_buffer_dirty) {
209 if (screen->dri2.loader &&
210 (screen->dri2.loader->base.version >= 2)
211 && (screen->dri2.loader->flushFrontBuffer != NULL) &&
212 driContext->driDrawablePriv &&
213 driContext->driDrawablePriv->loaderPrivate) {
214 (*screen->dri2.loader->flushFrontBuffer)(driContext->driDrawablePriv,
215 driContext->driDrawablePriv->loaderPrivate);
216
217 /* We set the dirty bit in intel_prepare_render() if we're
218 * front buffer rendering once we get there.
219 */
220 intel->front_buffer_dirty = GL_FALSE;
221 }
222 }
223 }
224
225 static unsigned
226 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
227 {
228 return _mesa_get_format_bytes(rb->Base.Format) * 8;
229 }
230
231 static void
232 intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel,
233 __DRIdrawable *drawable,
234 __DRIbuffer **buffers,
235 int *count);
236
237 static void
238 intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel,
239 __DRIdrawable *drawable,
240 __DRIbuffer *buffer,
241 struct intel_renderbuffer *rb,
242 const char *buffer_name);
243
244 static void
245 intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel,
246 __DRIdrawable *drawable,
247 __DRIbuffer **buffers,
248 unsigned **attachments,
249 int *count);
250
251 static void
252 intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
253 __DRIdrawable *drawable,
254 __DRIbuffer *buffer,
255 struct intel_renderbuffer *rb,
256 const char *buffer_name);
257 static void
258 intel_verify_dri2_has_hiz(struct intel_context *intel,
259 __DRIdrawable *drawable,
260 __DRIbuffer **buffers,
261 unsigned **attachments,
262 int *count);
263
264 void
265 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
266 {
267 struct gl_framebuffer *fb = drawable->driverPrivate;
268 struct intel_renderbuffer *rb;
269 struct intel_context *intel = context->driverPrivate;
270 __DRIbuffer *buffers = NULL;
271 unsigned *attachments = NULL;
272 int i, count;
273 const char *region_name;
274
275 bool try_separate_stencil =
276 intel->has_separate_stencil &&
277 intel->intelScreen->dri2_has_hiz != INTEL_DRI2_HAS_HIZ_FALSE &&
278 intel->intelScreen->driScrnPriv->dri2.loader != NULL &&
279 intel->intelScreen->driScrnPriv->dri2.loader->base.version > 2 &&
280 intel->intelScreen->driScrnPriv->dri2.loader->getBuffersWithFormat != NULL;
281
282 assert(!intel->must_use_separate_stencil || try_separate_stencil);
283
284 /* If we're rendering to the fake front buffer, make sure all the
285 * pending drawing has landed on the real front buffer. Otherwise
286 * when we eventually get to DRI2GetBuffersWithFormat the stale
287 * real front buffer contents will get copied to the new fake front
288 * buffer.
289 */
290 if (intel->is_front_buffer_rendering) {
291 intel_flush(&intel->ctx);
292 intel_flush_front(&intel->ctx);
293 }
294
295 /* Set this up front, so that in case our buffers get invalidated
296 * while we're getting new buffers, we don't clobber the stamp and
297 * thus ignore the invalidate. */
298 drawable->lastStamp = drawable->dri2.stamp;
299
300 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
301 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
302
303 if (try_separate_stencil) {
304 intel_query_dri2_buffers_with_separate_stencil(intel, drawable, &buffers,
305 &attachments, &count);
306 } else {
307 intel_query_dri2_buffers_no_separate_stencil(intel, drawable, &buffers,
308 &count);
309 }
310
311 if (buffers == NULL)
312 return;
313
314 drawable->x = 0;
315 drawable->y = 0;
316 drawable->backX = 0;
317 drawable->backY = 0;
318 drawable->numClipRects = 1;
319 drawable->pClipRects[0].x1 = 0;
320 drawable->pClipRects[0].y1 = 0;
321 drawable->pClipRects[0].x2 = drawable->w;
322 drawable->pClipRects[0].y2 = drawable->h;
323 drawable->numBackClipRects = 1;
324 drawable->pBackClipRects[0].x1 = 0;
325 drawable->pBackClipRects[0].y1 = 0;
326 drawable->pBackClipRects[0].x2 = drawable->w;
327 drawable->pBackClipRects[0].y2 = drawable->h;
328
329 for (i = 0; i < count; i++) {
330 switch (buffers[i].attachment) {
331 case __DRI_BUFFER_FRONT_LEFT:
332 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
333 region_name = "dri2 front buffer";
334 break;
335
336 case __DRI_BUFFER_FAKE_FRONT_LEFT:
337 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
338 region_name = "dri2 fake front buffer";
339 break;
340
341 case __DRI_BUFFER_BACK_LEFT:
342 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
343 region_name = "dri2 back buffer";
344 break;
345
346 case __DRI_BUFFER_DEPTH:
347 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
348 region_name = "dri2 depth buffer";
349 break;
350
351 case __DRI_BUFFER_HIZ:
352 /* The hiz region resides in the depth renderbuffer. */
353 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
354 region_name = "dri2 hiz buffer";
355 break;
356
357 case __DRI_BUFFER_DEPTH_STENCIL:
358 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
359 region_name = "dri2 depth / stencil buffer";
360 break;
361
362 case __DRI_BUFFER_STENCIL:
363 rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
364 region_name = "dri2 stencil buffer";
365 break;
366
367 case __DRI_BUFFER_ACCUM:
368 default:
369 fprintf(stderr,
370 "unhandled buffer attach event, attachment type %d\n",
371 buffers[i].attachment);
372 return;
373 }
374
375 if (try_separate_stencil) {
376 intel_process_dri2_buffer_with_separate_stencil(intel, drawable,
377 &buffers[i], rb,
378 region_name);
379 } else {
380 intel_process_dri2_buffer_no_separate_stencil(intel, drawable,
381 &buffers[i], rb,
382 region_name);
383 }
384 }
385
386 if (try_separate_stencil
387 && intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN) {
388 intel_verify_dri2_has_hiz(intel, drawable, &buffers, &attachments,
389 &count);
390 }
391
392 if (attachments)
393 free(attachments);
394
395 driUpdateFramebufferSize(&intel->ctx, drawable);
396 }
397
398 /**
399 * intel_prepare_render should be called anywhere that curent read/drawbuffer
400 * state is required.
401 */
402 void
403 intel_prepare_render(struct intel_context *intel)
404 {
405 __DRIcontext *driContext = intel->driContext;
406 __DRIdrawable *drawable;
407
408 drawable = driContext->driDrawablePriv;
409 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
410 if (drawable->lastStamp != drawable->dri2.stamp)
411 intel_update_renderbuffers(driContext, drawable);
412 intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer);
413 driContext->dri2.draw_stamp = drawable->dri2.stamp;
414 }
415
416 drawable = driContext->driReadablePriv;
417 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
418 if (drawable->lastStamp != drawable->dri2.stamp)
419 intel_update_renderbuffers(driContext, drawable);
420 driContext->dri2.read_stamp = drawable->dri2.stamp;
421 }
422
423 /* If we're currently rendering to the front buffer, the rendering
424 * that will happen next will probably dirty the front buffer. So
425 * mark it as dirty here.
426 */
427 if (intel->is_front_buffer_rendering)
428 intel->front_buffer_dirty = GL_TRUE;
429
430 /* Wait for the swapbuffers before the one we just emitted, so we
431 * don't get too many swaps outstanding for apps that are GPU-heavy
432 * but not CPU-heavy.
433 *
434 * We're using intelDRI2Flush (called from the loader before
435 * swapbuffer) and glFlush (for front buffer rendering) as the
436 * indicator that a frame is done and then throttle when we get
437 * here as we prepare to render the next frame. At this point for
438 * round trips for swap/copy and getting new buffers are done and
439 * we'll spend less time waiting on the GPU.
440 *
441 * Unfortunately, we don't have a handle to the batch containing
442 * the swap, and getting our hands on that doesn't seem worth it,
443 * so we just us the first batch we emitted after the last swap.
444 */
445 if (intel->need_throttle && intel->first_post_swapbuffers_batch) {
446 drm_intel_bo_wait_rendering(intel->first_post_swapbuffers_batch);
447 drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
448 intel->first_post_swapbuffers_batch = NULL;
449 intel->need_throttle = GL_FALSE;
450 }
451 }
452
453 static void
454 intel_viewport(struct gl_context *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
455 {
456 struct intel_context *intel = intel_context(ctx);
457 __DRIcontext *driContext = intel->driContext;
458
459 if (intel->saved_viewport)
460 intel->saved_viewport(ctx, x, y, w, h);
461
462 if (ctx->DrawBuffer->Name == 0) {
463 dri2InvalidateDrawable(driContext->driDrawablePriv);
464 dri2InvalidateDrawable(driContext->driReadablePriv);
465 }
466 }
467
468 static const struct dri_debug_control debug_control[] = {
469 { "tex", DEBUG_TEXTURE},
470 { "state", DEBUG_STATE},
471 { "ioctl", DEBUG_IOCTL},
472 { "blit", DEBUG_BLIT},
473 { "mip", DEBUG_MIPTREE},
474 { "fall", DEBUG_FALLBACKS},
475 { "verb", DEBUG_VERBOSE},
476 { "bat", DEBUG_BATCH},
477 { "pix", DEBUG_PIXEL},
478 { "buf", DEBUG_BUFMGR},
479 { "reg", DEBUG_REGION},
480 { "fbo", DEBUG_FBO},
481 { "gs", DEBUG_GS},
482 { "sync", DEBUG_SYNC},
483 { "prim", DEBUG_PRIMS },
484 { "vert", DEBUG_VERTS },
485 { "dri", DEBUG_DRI },
486 { "sf", DEBUG_SF },
487 { "san", DEBUG_SANITY },
488 { "sleep", DEBUG_SLEEP },
489 { "stats", DEBUG_STATS },
490 { "tile", DEBUG_TILE },
491 { "sing", DEBUG_SINGLE_THREAD },
492 { "thre", DEBUG_SINGLE_THREAD },
493 { "wm", DEBUG_WM },
494 { "urb", DEBUG_URB },
495 { "vs", DEBUG_VS },
496 { "clip", DEBUG_CLIP },
497 { NULL, 0 }
498 };
499
500
501 static void
502 intelInvalidateState(struct gl_context * ctx, GLuint new_state)
503 {
504 struct intel_context *intel = intel_context(ctx);
505
506 _swrast_InvalidateState(ctx, new_state);
507 _swsetup_InvalidateState(ctx, new_state);
508 _vbo_InvalidateState(ctx, new_state);
509 _tnl_InvalidateState(ctx, new_state);
510 _tnl_invalidate_vertex_state(ctx, new_state);
511
512 intel->NewGLState |= new_state;
513
514 if (intel->vtbl.invalidate_state)
515 intel->vtbl.invalidate_state( intel, new_state );
516 }
517
518 void
519 intel_flush(struct gl_context *ctx)
520 {
521 struct intel_context *intel = intel_context(ctx);
522
523 if (intel->Fallback)
524 _swrast_flush(ctx);
525
526 if (intel->gen < 4)
527 INTEL_FIREVERTICES(intel);
528
529 if (intel->batch.used)
530 intel_batchbuffer_flush(intel);
531 }
532
533 static void
534 intel_glFlush(struct gl_context *ctx)
535 {
536 struct intel_context *intel = intel_context(ctx);
537
538 intel_flush(ctx);
539 intel_flush_front(ctx);
540 if (intel->is_front_buffer_rendering)
541 intel->need_throttle = GL_TRUE;
542 }
543
544 void
545 intelFinish(struct gl_context * ctx)
546 {
547 struct intel_context *intel = intel_context(ctx);
548
549 intel_flush(ctx);
550 intel_flush_front(ctx);
551
552 if (intel->batch.last_bo)
553 drm_intel_bo_wait_rendering(intel->batch.last_bo);
554 }
555
556 void
557 intelInitDriverFunctions(struct dd_function_table *functions)
558 {
559 _mesa_init_driver_functions(functions);
560
561 functions->Flush = intel_glFlush;
562 functions->Finish = intelFinish;
563 functions->GetString = intelGetString;
564 functions->UpdateState = intelInvalidateState;
565
566 intelInitTextureFuncs(functions);
567 intelInitTextureImageFuncs(functions);
568 intelInitTextureSubImageFuncs(functions);
569 intelInitTextureCopyImageFuncs(functions);
570 intelInitStateFuncs(functions);
571 intelInitClearFuncs(functions);
572 intelInitBufferFuncs(functions);
573 intelInitPixelFuncs(functions);
574 intelInitBufferObjectFuncs(functions);
575 intel_init_syncobj_functions(functions);
576 }
577
578 GLboolean
579 intelInitContext(struct intel_context *intel,
580 int api,
581 const struct gl_config * mesaVis,
582 __DRIcontext * driContextPriv,
583 void *sharedContextPrivate,
584 struct dd_function_table *functions)
585 {
586 struct gl_context *ctx = &intel->ctx;
587 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
588 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
589 struct intel_screen *intelScreen = sPriv->private;
590 int bo_reuse_mode;
591 struct gl_config visual;
592
593 /* we can't do anything without a connection to the device */
594 if (intelScreen->bufmgr == NULL)
595 return GL_FALSE;
596
597 /* Can't rely on invalidate events, fall back to glViewport hack */
598 if (!driContextPriv->driScreenPriv->dri2.useInvalidate) {
599 intel->saved_viewport = functions->Viewport;
600 functions->Viewport = intel_viewport;
601 }
602
603 if (mesaVis == NULL) {
604 memset(&visual, 0, sizeof visual);
605 mesaVis = &visual;
606 }
607
608 if (!_mesa_initialize_context(&intel->ctx, api, mesaVis, shareCtx,
609 functions, (void *) intel)) {
610 printf("%s: failed to init mesa context\n", __FUNCTION__);
611 return GL_FALSE;
612 }
613
614 driContextPriv->driverPrivate = intel;
615 intel->intelScreen = intelScreen;
616 intel->driContext = driContextPriv;
617 intel->driFd = sPriv->fd;
618
619 intel->has_xrgb_textures = GL_TRUE;
620 intel->gen = intelScreen->gen;
621 if (IS_GEN7(intel->intelScreen->deviceID)) {
622 intel->needs_ff_sync = GL_TRUE;
623 intel->has_luminance_srgb = GL_TRUE;
624 } else if (IS_GEN6(intel->intelScreen->deviceID)) {
625 intel->needs_ff_sync = GL_TRUE;
626 intel->has_luminance_srgb = GL_TRUE;
627 } else if (IS_GEN5(intel->intelScreen->deviceID)) {
628 intel->needs_ff_sync = GL_TRUE;
629 intel->has_luminance_srgb = GL_TRUE;
630 } else if (IS_965(intel->intelScreen->deviceID)) {
631 if (IS_G4X(intel->intelScreen->deviceID)) {
632 intel->has_luminance_srgb = GL_TRUE;
633 intel->is_g4x = GL_TRUE;
634 }
635 } else if (IS_9XX(intel->intelScreen->deviceID)) {
636 if (IS_945(intel->intelScreen->deviceID)) {
637 intel->is_945 = GL_TRUE;
638 }
639 } else {
640 if (intel->intelScreen->deviceID == PCI_CHIP_I830_M ||
641 intel->intelScreen->deviceID == PCI_CHIP_845_G) {
642 intel->has_xrgb_textures = GL_FALSE;
643 }
644 }
645
646 intel->has_separate_stencil = intel->intelScreen->hw_has_separate_stencil;
647 intel->must_use_separate_stencil = intel->intelScreen->hw_must_use_separate_stencil;
648 intel->has_hiz = intel->intelScreen->hw_has_hiz;
649
650 memset(&ctx->TextureFormatSupported, 0,
651 sizeof(ctx->TextureFormatSupported));
652 ctx->TextureFormatSupported[MESA_FORMAT_ARGB8888] = GL_TRUE;
653 if (intel->has_xrgb_textures)
654 ctx->TextureFormatSupported[MESA_FORMAT_XRGB8888] = GL_TRUE;
655 ctx->TextureFormatSupported[MESA_FORMAT_ARGB4444] = GL_TRUE;
656 ctx->TextureFormatSupported[MESA_FORMAT_ARGB1555] = GL_TRUE;
657 ctx->TextureFormatSupported[MESA_FORMAT_RGB565] = GL_TRUE;
658 ctx->TextureFormatSupported[MESA_FORMAT_L8] = GL_TRUE;
659 ctx->TextureFormatSupported[MESA_FORMAT_A8] = GL_TRUE;
660 ctx->TextureFormatSupported[MESA_FORMAT_I8] = GL_TRUE;
661 ctx->TextureFormatSupported[MESA_FORMAT_AL88] = GL_TRUE;
662 if (intel->gen >= 4)
663 ctx->TextureFormatSupported[MESA_FORMAT_AL1616] = GL_TRUE;
664
665 /* Depth and stencil */
666 ctx->TextureFormatSupported[MESA_FORMAT_S8_Z24] = !intel->must_use_separate_stencil;
667 ctx->TextureFormatSupported[MESA_FORMAT_X8_Z24] = intel->has_separate_stencil;
668 ctx->TextureFormatSupported[MESA_FORMAT_S8] = intel->has_separate_stencil;
669
670 /*
671 * This was disabled in initial FBO enabling to avoid combinations
672 * of depth+stencil that wouldn't work together. We since decided
673 * that it was OK, since it's up to the app to come up with the
674 * combo that actually works, so this can probably be re-enabled.
675 */
676 /*
677 ctx->TextureFormatSupported[MESA_FORMAT_Z16] = GL_TRUE;
678 ctx->TextureFormatSupported[MESA_FORMAT_Z24] = GL_TRUE;
679 */
680
681 /* ctx->Extensions.MESA_ycbcr_texture */
682 ctx->TextureFormatSupported[MESA_FORMAT_YCBCR] = GL_TRUE;
683 ctx->TextureFormatSupported[MESA_FORMAT_YCBCR_REV] = GL_TRUE;
684
685 /* GL_3DFX_texture_compression_FXT1 */
686 ctx->TextureFormatSupported[MESA_FORMAT_RGB_FXT1] = GL_TRUE;
687 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_FXT1] = GL_TRUE;
688
689 /* GL_EXT_texture_compression_s3tc */
690 ctx->TextureFormatSupported[MESA_FORMAT_RGB_DXT1] = GL_TRUE;
691 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_DXT1] = GL_TRUE;
692 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_DXT3] = GL_TRUE;
693 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_DXT5] = GL_TRUE;
694
695 #ifndef I915
696 /* GL_ARB_texture_compression_rgtc */
697 ctx->TextureFormatSupported[MESA_FORMAT_RED_RGTC1] = GL_TRUE;
698 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RED_RGTC1] = GL_TRUE;
699 ctx->TextureFormatSupported[MESA_FORMAT_RG_RGTC2] = GL_TRUE;
700 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RG_RGTC2] = GL_TRUE;
701
702 /* GL_ARB_texture_rg */
703 ctx->TextureFormatSupported[MESA_FORMAT_R8] = GL_TRUE;
704 ctx->TextureFormatSupported[MESA_FORMAT_R16] = GL_TRUE;
705 ctx->TextureFormatSupported[MESA_FORMAT_RG88] = GL_TRUE;
706 ctx->TextureFormatSupported[MESA_FORMAT_RG1616] = GL_TRUE;
707
708 /* GL_MESA_texture_signed_rgba / GL_EXT_texture_snorm */
709 ctx->TextureFormatSupported[MESA_FORMAT_DUDV8] = GL_TRUE;
710 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RGBA8888_REV] = GL_TRUE;
711 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_R8] = GL_TRUE;
712 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RG88_REV] = GL_TRUE;
713 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_R16] = GL_TRUE;
714 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_GR1616] = GL_TRUE;
715
716 /* GL_EXT_texture_sRGB */
717 ctx->TextureFormatSupported[MESA_FORMAT_SARGB8] = GL_TRUE;
718 if (intel->gen >= 5 || intel->is_g4x)
719 ctx->TextureFormatSupported[MESA_FORMAT_SRGB_DXT1] = GL_TRUE;
720 ctx->TextureFormatSupported[MESA_FORMAT_SRGBA_DXT1] = GL_TRUE;
721 ctx->TextureFormatSupported[MESA_FORMAT_SRGBA_DXT3] = GL_TRUE;
722 ctx->TextureFormatSupported[MESA_FORMAT_SRGBA_DXT5] = GL_TRUE;
723 if (intel->has_luminance_srgb) {
724 ctx->TextureFormatSupported[MESA_FORMAT_SL8] = GL_TRUE;
725 ctx->TextureFormatSupported[MESA_FORMAT_SLA8] = GL_TRUE;
726 }
727
728 #ifdef TEXTURE_FLOAT_ENABLED
729 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_FLOAT32] = GL_TRUE;
730 ctx->TextureFormatSupported[MESA_FORMAT_RG_FLOAT32] = GL_TRUE;
731 ctx->TextureFormatSupported[MESA_FORMAT_R_FLOAT32] = GL_TRUE;
732 ctx->TextureFormatSupported[MESA_FORMAT_INTENSITY_FLOAT32] = GL_TRUE;
733 ctx->TextureFormatSupported[MESA_FORMAT_LUMINANCE_FLOAT32] = GL_TRUE;
734 ctx->TextureFormatSupported[MESA_FORMAT_ALPHA_FLOAT32] = GL_TRUE;
735 ctx->TextureFormatSupported[MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32] = GL_TRUE;
736 #endif
737
738 #endif /* !I915 */
739
740 driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
741 sPriv->myNum, (intel->gen >= 4) ? "i965" : "i915");
742 if (intel->gen < 4)
743 intel->maxBatchSize = 4096;
744 else
745 intel->maxBatchSize = sizeof(intel->batch.map);
746
747 intel->bufmgr = intelScreen->bufmgr;
748
749 bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
750 switch (bo_reuse_mode) {
751 case DRI_CONF_BO_REUSE_DISABLED:
752 break;
753 case DRI_CONF_BO_REUSE_ALL:
754 intel_bufmgr_gem_enable_reuse(intel->bufmgr);
755 break;
756 }
757
758 /* This doesn't yet catch all non-conformant rendering, but it's a
759 * start.
760 */
761 if (getenv("INTEL_STRICT_CONFORMANCE")) {
762 unsigned int value = atoi(getenv("INTEL_STRICT_CONFORMANCE"));
763 if (value > 0) {
764 intel->conformance_mode = value;
765 }
766 else {
767 intel->conformance_mode = 1;
768 }
769 }
770
771 if (intel->conformance_mode > 0) {
772 ctx->Const.MinLineWidth = 1.0;
773 ctx->Const.MinLineWidthAA = 1.0;
774 ctx->Const.MaxLineWidth = 1.0;
775 ctx->Const.MaxLineWidthAA = 1.0;
776 ctx->Const.LineWidthGranularity = 1.0;
777 }
778 else {
779 ctx->Const.MinLineWidth = 1.0;
780 ctx->Const.MinLineWidthAA = 1.0;
781 ctx->Const.MaxLineWidth = 5.0;
782 ctx->Const.MaxLineWidthAA = 5.0;
783 ctx->Const.LineWidthGranularity = 0.5;
784 }
785
786 ctx->Const.MinPointSize = 1.0;
787 ctx->Const.MinPointSizeAA = 1.0;
788 ctx->Const.MaxPointSize = 255.0;
789 ctx->Const.MaxPointSizeAA = 3.0;
790 ctx->Const.PointSizeGranularity = 1.0;
791
792 ctx->Const.MaxSamples = 1.0;
793
794 /* reinitialize the context point state.
795 * It depend on constants in __struct gl_contextRec::Const
796 */
797 _mesa_init_point(ctx);
798
799 if (intel->gen >= 4) {
800 ctx->Const.sRGBCapable = GL_TRUE;
801 if (MAX_WIDTH > 8192)
802 ctx->Const.MaxRenderbufferSize = 8192;
803 } else {
804 if (MAX_WIDTH > 2048)
805 ctx->Const.MaxRenderbufferSize = 2048;
806 }
807
808 /* Initialize the software rasterizer and helper modules. */
809 _swrast_CreateContext(ctx);
810 _vbo_CreateContext(ctx);
811 _tnl_CreateContext(ctx);
812 _swsetup_CreateContext(ctx);
813
814 /* Configure swrast to match hardware characteristics: */
815 _swrast_allow_pixel_fog(ctx, GL_FALSE);
816 _swrast_allow_vertex_fog(ctx, GL_TRUE);
817
818 _mesa_meta_init(ctx);
819
820 intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
821 intel->hw_stipple = 1;
822
823 /* XXX FBO: this doesn't seem to be used anywhere */
824 switch (mesaVis->depthBits) {
825 case 0: /* what to do in this case? */
826 case 16:
827 intel->polygon_offset_scale = 1.0;
828 break;
829 case 24:
830 intel->polygon_offset_scale = 2.0; /* req'd to pass glean */
831 break;
832 default:
833 assert(0);
834 break;
835 }
836
837 if (intel->gen >= 4)
838 intel->polygon_offset_scale /= 0xffff;
839
840 intel->RenderIndex = ~0;
841
842 switch (ctx->API) {
843 case API_OPENGL:
844 intelInitExtensions(ctx);
845 break;
846 case API_OPENGLES:
847 break;
848 case API_OPENGLES2:
849 intelInitExtensionsES2(ctx);
850 break;
851 }
852
853 INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
854 if (INTEL_DEBUG & DEBUG_BUFMGR)
855 dri_bufmgr_set_debug(intel->bufmgr, GL_TRUE);
856
857 intel_batchbuffer_reset(intel);
858
859 intel_fbo_init(intel);
860
861 if (intel->ctx.Mesa_DXTn) {
862 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
863 _mesa_enable_extension(ctx, "GL_S3_s3tc");
864 }
865 else if (driQueryOptionb(&intel->optionCache, "force_s3tc_enable")) {
866 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
867 }
868 intel->use_texture_tiling = driQueryOptionb(&intel->optionCache,
869 "texture_tiling");
870 intel->use_early_z = driQueryOptionb(&intel->optionCache, "early_z");
871
872 intel->prim.primitive = ~0;
873
874 /* Force all software fallbacks */
875 if (driQueryOptionb(&intel->optionCache, "no_rast")) {
876 fprintf(stderr, "disabling 3D rasterization\n");
877 intel->no_rast = 1;
878 }
879
880 if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) {
881 fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
882 intel->always_flush_batch = 1;
883 }
884
885 if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) {
886 fprintf(stderr, "flushing GPU caches before/after each draw call\n");
887 intel->always_flush_cache = 1;
888 }
889
890 return GL_TRUE;
891 }
892
893 void
894 intelDestroyContext(__DRIcontext * driContextPriv)
895 {
896 struct intel_context *intel =
897 (struct intel_context *) driContextPriv->driverPrivate;
898
899 assert(intel); /* should never be null */
900 if (intel) {
901 INTEL_FIREVERTICES(intel);
902
903 _mesa_meta_free(&intel->ctx);
904
905 intel->vtbl.destroy(intel);
906
907 _swsetup_DestroyContext(&intel->ctx);
908 _tnl_DestroyContext(&intel->ctx);
909 _vbo_DestroyContext(&intel->ctx);
910
911 _swrast_DestroyContext(&intel->ctx);
912 intel->Fallback = 0x0; /* don't call _swrast_Flush later */
913
914 intel_batchbuffer_free(intel);
915
916 free(intel->prim.vb);
917 intel->prim.vb = NULL;
918 drm_intel_bo_unreference(intel->prim.vb_bo);
919 intel->prim.vb_bo = NULL;
920 drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
921 intel->first_post_swapbuffers_batch = NULL;
922
923 driDestroyOptionCache(&intel->optionCache);
924
925 /* free the Mesa context */
926 _mesa_free_context_data(&intel->ctx);
927
928 FREE(intel);
929 driContextPriv->driverPrivate = NULL;
930 }
931 }
932
933 GLboolean
934 intelUnbindContext(__DRIcontext * driContextPriv)
935 {
936 /* Unset current context and dispath table */
937 _mesa_make_current(NULL, NULL, NULL);
938
939 return GL_TRUE;
940 }
941
942 GLboolean
943 intelMakeCurrent(__DRIcontext * driContextPriv,
944 __DRIdrawable * driDrawPriv,
945 __DRIdrawable * driReadPriv)
946 {
947 struct intel_context *intel;
948 GET_CURRENT_CONTEXT(curCtx);
949
950 if (driContextPriv)
951 intel = (struct intel_context *) driContextPriv->driverPrivate;
952 else
953 intel = NULL;
954
955 /* According to the glXMakeCurrent() man page: "Pending commands to
956 * the previous context, if any, are flushed before it is released."
957 * But only flush if we're actually changing contexts.
958 */
959 if (intel_context(curCtx) && intel_context(curCtx) != intel) {
960 _mesa_flush(curCtx);
961 }
962
963 if (driContextPriv) {
964 struct gl_framebuffer *fb, *readFb;
965
966 if (driDrawPriv == NULL && driReadPriv == NULL) {
967 fb = _mesa_get_incomplete_framebuffer();
968 readFb = _mesa_get_incomplete_framebuffer();
969 } else {
970 fb = driDrawPriv->driverPrivate;
971 readFb = driReadPriv->driverPrivate;
972 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
973 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
974 }
975
976 intel_prepare_render(intel);
977 _mesa_make_current(&intel->ctx, fb, readFb);
978
979 /* We do this in intel_prepare_render() too, but intel->ctx.DrawBuffer
980 * is NULL at that point. We can't call _mesa_makecurrent()
981 * first, since we need the buffer size for the initial
982 * viewport. So just call intel_draw_buffer() again here. */
983 intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer);
984 }
985 else {
986 _mesa_make_current(NULL, NULL, NULL);
987 }
988
989 return GL_TRUE;
990 }
991
992 /**
993 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
994 *
995 * To determine which DRI buffers to request, examine the renderbuffers
996 * attached to the drawable's framebuffer. Then request the buffers with
997 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
998 *
999 * This is called from intel_update_renderbuffers(). It is used only if either
1000 * the hardware or the X driver lacks separate stencil support.
1001 *
1002 * \param drawable Drawable whose buffers are queried.
1003 * \param buffers [out] List of buffers returned by DRI2 query.
1004 * \param buffer_count [out] Number of buffers returned.
1005 *
1006 * \see intel_update_renderbuffers()
1007 * \see DRI2GetBuffers()
1008 * \see DRI2GetBuffersWithFormat()
1009 */
1010 static void
1011 intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel,
1012 __DRIdrawable *drawable,
1013 __DRIbuffer **buffers,
1014 int *buffer_count)
1015 {
1016 assert(!intel->must_use_separate_stencil);
1017
1018 __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1019 struct gl_framebuffer *fb = drawable->driverPrivate;
1020
1021 if (screen->dri2.loader
1022 && screen->dri2.loader->base.version > 2
1023 && screen->dri2.loader->getBuffersWithFormat != NULL) {
1024
1025 int i = 0;
1026 const int max_attachments = 4;
1027 unsigned *attachments = calloc(2 * max_attachments, sizeof(unsigned));
1028
1029 struct intel_renderbuffer *front_rb;
1030 struct intel_renderbuffer *back_rb;
1031 struct intel_renderbuffer *depth_rb;
1032 struct intel_renderbuffer *stencil_rb;
1033
1034 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1035 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1036 depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
1037 stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
1038
1039 if ((intel->is_front_buffer_rendering ||
1040 intel->is_front_buffer_reading ||
1041 !back_rb) && front_rb) {
1042 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1043 attachments[i++] = intel_bits_per_pixel(front_rb);
1044 }
1045
1046 if (back_rb) {
1047 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1048 attachments[i++] = intel_bits_per_pixel(back_rb);
1049 }
1050
1051 if (depth_rb && stencil_rb) {
1052 attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL;
1053 attachments[i++] = intel_bits_per_pixel(depth_rb);
1054 } else if (depth_rb) {
1055 attachments[i++] = __DRI_BUFFER_DEPTH;
1056 attachments[i++] = intel_bits_per_pixel(depth_rb);
1057 } else if (stencil_rb) {
1058 attachments[i++] = __DRI_BUFFER_STENCIL;
1059 attachments[i++] = intel_bits_per_pixel(stencil_rb);
1060 }
1061
1062 assert(i <= 2 * max_attachments);
1063
1064 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1065 &drawable->w,
1066 &drawable->h,
1067 attachments, i / 2,
1068 buffer_count,
1069 drawable->loaderPrivate);
1070 free(attachments);
1071
1072 } else if (screen->dri2.loader) {
1073
1074 int i = 0;
1075 const int max_attachments = 4;
1076 unsigned *attachments = calloc(max_attachments, sizeof(unsigned));
1077
1078 if (intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT))
1079 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1080 if (intel_get_renderbuffer(fb, BUFFER_BACK_LEFT))
1081 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1082 if (intel_get_renderbuffer(fb, BUFFER_DEPTH))
1083 attachments[i++] = __DRI_BUFFER_DEPTH;
1084 if (intel_get_renderbuffer(fb, BUFFER_STENCIL))
1085 attachments[i++] = __DRI_BUFFER_STENCIL;
1086
1087 assert(i <= max_attachments);
1088
1089 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1090 &drawable->w,
1091 &drawable->h,
1092 attachments, i,
1093 buffer_count,
1094 drawable->loaderPrivate);
1095 free(attachments);
1096
1097 } else {
1098 *buffers = NULL;
1099 *buffer_count = 0;
1100 }
1101 }
1102
1103 /**
1104 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1105 *
1106 * This is called from intel_update_renderbuffers(). It is used only if
1107 * either the hardware or the X driver lacks separate stencil support.
1108 *
1109 * \par Note:
1110 * DRI buffers whose attachment point is DRI2BufferStencil or
1111 * DRI2BufferDepthStencil are handled as special cases.
1112 *
1113 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1114 * that is passed to intel_region_alloc_for_handle().
1115 *
1116 * \see intel_update_renderbuffers()
1117 * \see intel_region_alloc_for_handle()
1118 * \see intel_renderbuffer_set_region()
1119 */
1120 static void
1121 intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel,
1122 __DRIdrawable *drawable,
1123 __DRIbuffer *buffer,
1124 struct intel_renderbuffer *rb,
1125 const char *buffer_name)
1126 {
1127 assert(!intel->must_use_separate_stencil);
1128
1129 struct gl_framebuffer *fb = drawable->driverPrivate;
1130 struct intel_region *region = NULL;
1131 struct intel_renderbuffer *depth_rb = NULL;
1132
1133 if (!rb)
1134 return;
1135
1136 if (rb->region && rb->region->name == buffer->name)
1137 return;
1138
1139 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1140 fprintf(stderr,
1141 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1142 buffer->name, buffer->attachment,
1143 buffer->cpp, buffer->pitch);
1144 }
1145
1146 bool identify_depth_and_stencil = false;
1147 if (buffer->attachment == __DRI_BUFFER_STENCIL) {
1148 struct intel_renderbuffer *depth_rb =
1149 intel_get_renderbuffer(fb, BUFFER_DEPTH);
1150 identify_depth_and_stencil = depth_rb && depth_rb->region;
1151 }
1152
1153 if (identify_depth_and_stencil) {
1154 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1155 fprintf(stderr, "(reusing depth buffer as stencil)\n");
1156 }
1157 intel_region_reference(&region, depth_rb->region);
1158 } else {
1159 region = intel_region_alloc_for_handle(intel->intelScreen,
1160 buffer->cpp,
1161 drawable->w,
1162 drawable->h,
1163 buffer->pitch / buffer->cpp,
1164 buffer->name,
1165 buffer_name);
1166 }
1167
1168 intel_renderbuffer_set_region(intel, rb, region);
1169 intel_region_release(&region);
1170
1171 if (buffer->attachment == __DRI_BUFFER_DEPTH_STENCIL) {
1172 struct intel_renderbuffer *stencil_rb =
1173 intel_get_renderbuffer(fb, BUFFER_STENCIL);
1174
1175 if (!stencil_rb)
1176 return;
1177
1178 if (stencil_rb->region && stencil_rb->region->name == buffer->name)
1179 return;
1180
1181 intel_renderbuffer_set_region(intel, stencil_rb, region);
1182 }
1183 }
1184
1185 /**
1186 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1187 *
1188 * To determine which DRI buffers to request, examine the renderbuffers
1189 * attached to the drawable's framebuffer. Then request the buffers with
1190 * DRI2GetBuffersWithFormat().
1191 *
1192 * This is called from intel_update_renderbuffers(). It is used when 1) the
1193 * hardware supports separate stencil and 2) the X driver's separate stencil
1194 * support has been verified to work or is still unknown.
1195 *
1196 * \param drawable Drawable whose buffers are queried.
1197 * \param buffers [out] List of buffers returned by DRI2 query.
1198 * \param buffer_count [out] Number of buffers returned.
1199 * \param attachments [out] List of pairs (attachment_point, bits_per_pixel)
1200 * that were submitted in the DRI2 query. Number of pairs
1201 * is same as buffer_count.
1202 *
1203 * \see intel_update_renderbuffers()
1204 * \see DRI2GetBuffersWithFormat()
1205 * \see enum intel_dri2_has_hiz
1206 */
1207 static void
1208 intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel,
1209 __DRIdrawable *drawable,
1210 __DRIbuffer **buffers,
1211 unsigned **attachments,
1212 int *count)
1213 {
1214 assert(intel->has_separate_stencil);
1215
1216 __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1217 struct gl_framebuffer *fb = drawable->driverPrivate;
1218
1219 const int max_attachments = 5;
1220 int i = 0;
1221
1222 *attachments = calloc(2 * max_attachments, sizeof(unsigned));
1223 if (!*attachments) {
1224 *buffers = NULL;
1225 *count = 0;
1226 return;
1227 }
1228
1229 struct intel_renderbuffer *front_rb;
1230 struct intel_renderbuffer *back_rb;
1231 struct intel_renderbuffer *depth_rb;
1232 struct intel_renderbuffer *stencil_rb;
1233
1234 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1235 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1236 depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
1237 stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
1238
1239 if ((intel->is_front_buffer_rendering ||
1240 intel->is_front_buffer_reading ||
1241 !back_rb) && front_rb) {
1242 (*attachments)[i++] = __DRI_BUFFER_FRONT_LEFT;
1243 (*attachments)[i++] = intel_bits_per_pixel(front_rb);
1244 }
1245
1246 if (back_rb) {
1247 (*attachments)[i++] = __DRI_BUFFER_BACK_LEFT;
1248 (*attachments)[i++] = intel_bits_per_pixel(back_rb);
1249 }
1250
1251 /*
1252 * We request a separate stencil buffer, and perhaps a hiz buffer too, even
1253 * if we do not yet know if the X driver supports it. See the comments for
1254 * 'enum intel_dri2_has_hiz'.
1255 */
1256
1257 if (depth_rb) {
1258 (*attachments)[i++] = __DRI_BUFFER_DEPTH;
1259 (*attachments)[i++] = intel_bits_per_pixel(depth_rb);
1260
1261 if (intel->vtbl.is_hiz_depth_format(intel, depth_rb->Base.Format)) {
1262 /* Depth and hiz buffer have same bpp. */
1263 (*attachments)[i++] = __DRI_BUFFER_HIZ;
1264 (*attachments)[i++] = intel_bits_per_pixel(depth_rb);
1265 }
1266 }
1267
1268 if (stencil_rb) {
1269 assert(stencil_rb->Base.Format == MESA_FORMAT_S8);
1270 (*attachments)[i++] = __DRI_BUFFER_STENCIL;
1271 (*attachments)[i++] = intel_bits_per_pixel(stencil_rb);
1272 }
1273
1274 assert(i <= 2 * max_attachments);
1275
1276 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1277 &drawable->w,
1278 &drawable->h,
1279 *attachments, i / 2,
1280 count,
1281 drawable->loaderPrivate);
1282
1283 if (!*buffers) {
1284 free(*attachments);
1285 *attachments = NULL;
1286 *count = 0;
1287 }
1288 }
1289
1290 /**
1291 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1292 *
1293 * This is called from intel_update_renderbuffers(). It is used when 1) the
1294 * hardware supports separate stencil and 2) the X driver's separate stencil
1295 * support has been verified to work or is still unknown.
1296 *
1297 * \par Note:
1298 * DRI buffers whose attachment point is DRI2BufferStencil or DRI2BufferHiz
1299 * are handled as special cases.
1300 *
1301 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1302 * that is passed to intel_region_alloc_for_handle().
1303 *
1304 * \see intel_update_renderbuffers()
1305 * \see intel_region_alloc_for_handle()
1306 * \see intel_renderbuffer_set_region()
1307 * \see enum intel_dri2_has_hiz
1308 */
1309 static void
1310 intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
1311 __DRIdrawable *drawable,
1312 __DRIbuffer *buffer,
1313 struct intel_renderbuffer *rb,
1314 const char *buffer_name)
1315 {
1316 assert(intel->has_separate_stencil);
1317 assert(buffer->attachment != __DRI_BUFFER_DEPTH_STENCIL);
1318
1319 if (!rb)
1320 return;
1321
1322 /* If the renderbuffer's and DRIbuffer's regions match, then continue. */
1323 if ((buffer->attachment != __DRI_BUFFER_HIZ &&
1324 rb->region &&
1325 rb->region->name == buffer->name) ||
1326 (buffer->attachment == __DRI_BUFFER_HIZ &&
1327 rb->hiz_region &&
1328 rb->hiz_region->name == buffer->name)) {
1329 return;
1330 }
1331
1332 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1333 fprintf(stderr,
1334 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1335 buffer->name, buffer->attachment,
1336 buffer->cpp, buffer->pitch);
1337 }
1338
1339 /*
1340 * The stencil buffer has quirky pitch requirements. From Section
1341 * 2.11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface Pitch":
1342 * The pitch must be set to 2x the value computed based on width, as
1343 * the stencil buffer is stored with two rows interleaved.
1344 * If we neglect to double the pitch, then drm_intel_gem_bo_map_gtt()
1345 * maps the memory incorrectly.
1346 *
1347 * To satisfy the pitch requirement, the X driver hackishly allocated
1348 * the gem buffer with bpp doubled and height halved. So buffer->cpp is
1349 * correct, but drawable->height is not.
1350 */
1351 int buffer_height = drawable->h;
1352 if (buffer->attachment == __DRI_BUFFER_STENCIL) {
1353 buffer_height /= 2;
1354 }
1355
1356 struct intel_region *region =
1357 intel_region_alloc_for_handle(intel->intelScreen,
1358 buffer->cpp,
1359 drawable->w,
1360 buffer_height,
1361 buffer->pitch / buffer->cpp,
1362 buffer->name,
1363 buffer_name);
1364
1365 if (buffer->attachment == __DRI_BUFFER_HIZ) {
1366 intel_renderbuffer_set_hiz_region(intel, rb, region);
1367 } else {
1368 intel_renderbuffer_set_region(intel, rb, region);
1369 }
1370
1371 intel_region_release(&region);
1372 }
1373
1374 /**
1375 * \brief Verify that the X driver supports hiz and separate stencil.
1376 *
1377 * This implements the cleanup stage of the handshake described in the
1378 * comments for 'enum intel_dri2_has_hiz'.
1379 *
1380 * This should be called from intel_update_renderbuffers() after 1) the
1381 * DRIdrawable has been queried for its buffers via DRI2GetBuffersWithFormat()
1382 * and 2) the DRM region of each returned DRIbuffer has been assigned to the
1383 * appropriate intel_renderbuffer. Furthermore, this should be called *only*
1384 * when 1) intel_update_renderbuffers() tried to used the X driver's separate
1385 * stencil functionality and 2) it has not yet been determined if the X driver
1386 * supports separate stencil.
1387 *
1388 * If we determine that the X driver does have support, then we set
1389 * intel_screen.dri2_has_hiz to true and return.
1390 *
1391 * If we determine that the X driver lacks support, and we requested
1392 * a DRI2BufferDepth and DRI2BufferStencil, then we must remedy the mistake by
1393 * taking the following actions:
1394 * 1. Discard the framebuffer's stencil and depth renderbuffers.
1395 * 2. Create a combined depth/stencil renderbuffer and attach
1396 * it to the framebuffer's depth and stencil attachment points.
1397 * 3. Query the drawable for a new set of buffers, which consists of the
1398 * originally requested set plus DRI2BufferDepthStencil.
1399 * 4. Assign the DRI2BufferDepthStencil's DRM region to the new
1400 * depth/stencil renderbuffer.
1401 *
1402 * \pre intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN
1403 *
1404 * \param drawable Drawable whose buffers were queried.
1405 *
1406 * \param buffers [in/out] As input, the buffer list returned by the
1407 * original DRI2 query. As output, the current buffer
1408 * list, which may have been altered by a new DRI2 query.
1409 *
1410 * \param attachments [in/out] As input, the attachment list submitted
1411 * in the original DRI2 query. As output, the attachment
1412 * list that was submitted in the DRI2 query that
1413 * obtained the current buffer list, as returned in the
1414 * output parameter \c buffers. (Note: If no new query
1415 * was made, then the list remains unaltered).
1416 *
1417 * \param count [out] Number of buffers in the current buffer list, as
1418 * returned in the output parameter \c buffers.
1419 *
1420 * \see enum intel_dri2_has_hiz
1421 * \see struct intel_screen::dri2_has_hiz
1422 * \see intel_update_renderbuffers
1423 */
1424 static void
1425 intel_verify_dri2_has_hiz(struct intel_context *intel,
1426 __DRIdrawable *drawable,
1427 __DRIbuffer **buffers,
1428 unsigned **attachments,
1429 int *count)
1430 {
1431 assert(intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN);
1432
1433 struct gl_framebuffer *fb = drawable->driverPrivate;
1434 struct intel_renderbuffer *stencil_rb =
1435 intel_get_renderbuffer(fb, BUFFER_STENCIL);
1436
1437 if (stencil_rb) {
1438 /*
1439 * We requested a DRI2BufferStencil without knowing if the X driver
1440 * supports it. Now, check if X handled the request correctly and clean
1441 * up if it did not. (See comments for 'enum intel_dri2_has_hiz').
1442 */
1443 struct intel_renderbuffer *depth_rb =
1444 intel_get_renderbuffer(fb, BUFFER_DEPTH);
1445 assert(stencil_rb->Base.Format == MESA_FORMAT_S8);
1446 assert(depth_rb && depth_rb->Base.Format == MESA_FORMAT_X8_Z24);
1447
1448 if (stencil_rb->region->tiling == I915_TILING_Y) {
1449 intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_TRUE;
1450 return;
1451 } else {
1452 /*
1453 * Oops... the screen doesn't support separate stencil. Discard the
1454 * separate depth and stencil buffers and replace them with
1455 * a combined depth/stencil buffer. Discard the hiz buffer too.
1456 */
1457 intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_FALSE;
1458
1459 /* 1. Discard depth and stencil renderbuffers. */
1460 _mesa_remove_renderbuffer(fb, BUFFER_DEPTH);
1461 depth_rb = NULL;
1462 _mesa_remove_renderbuffer(fb, BUFFER_STENCIL);
1463 stencil_rb = NULL;
1464
1465 /* 2. Create new depth/stencil renderbuffer. */
1466 struct intel_renderbuffer *depth_stencil_rb =
1467 intel_create_renderbuffer(MESA_FORMAT_S8_Z24);
1468 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depth_stencil_rb->Base);
1469 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &depth_stencil_rb->Base);
1470
1471 /* 3. Append DRI2BufferDepthStencil to attachment list. */
1472 int old_count = *count;
1473 unsigned int *old_attachments = *attachments;
1474 *count = old_count + 1;
1475 *attachments = malloc(2 * (*count) * sizeof(unsigned));
1476 memcpy(*attachments, old_attachments, 2 * old_count * sizeof(unsigned));
1477 free(old_attachments);
1478 (*attachments)[2 * old_count + 0] = __DRI_BUFFER_DEPTH_STENCIL;
1479 (*attachments)[2 * old_count + 1] = intel_bits_per_pixel(depth_stencil_rb);
1480
1481 /* 4. Request new set of DRI2 attachments. */
1482 __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1483 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1484 &drawable->w,
1485 &drawable->h,
1486 *attachments,
1487 *count,
1488 count,
1489 drawable->loaderPrivate);
1490 if (!*buffers)
1491 return;
1492
1493 /*
1494 * I don't know how to recover from the failure assertion below.
1495 * Rather than fail gradually and unexpectedly, we should just die
1496 * now.
1497 */
1498 assert(*count == old_count + 1);
1499
1500 /* 5. Assign the DRI buffer's DRM region to the its renderbuffers. */
1501 __DRIbuffer *depth_stencil_buffer = NULL;
1502 for (int i = 0; i < *count; ++i) {
1503 if ((*buffers)[i].attachment == __DRI_BUFFER_DEPTH_STENCIL) {
1504 depth_stencil_buffer = &(*buffers)[i];
1505 break;
1506 }
1507 }
1508 struct intel_region *region =
1509 intel_region_alloc_for_handle(intel->intelScreen,
1510 depth_stencil_buffer->cpp,
1511 drawable->w,
1512 drawable->h,
1513 depth_stencil_buffer->pitch
1514 / depth_stencil_buffer->cpp,
1515 depth_stencil_buffer->name,
1516 "dri2 depth / stencil buffer");
1517 intel_renderbuffer_set_region(intel,
1518 intel_get_renderbuffer(fb, BUFFER_DEPTH),
1519 region);
1520 intel_renderbuffer_set_region(intel,
1521 intel_get_renderbuffer(fb, BUFFER_STENCIL),
1522 region);
1523 intel_region_release(&region);
1524 }
1525 }
1526
1527 if (intel_framebuffer_has_hiz(fb)) {
1528 /*
1529 * In the future, the driver may advertise a GL config with hiz
1530 * compatible depth bits and 0 stencil bits (for example, when the
1531 * driver gains support for float32 depth buffers). When that day comes,
1532 * here we need to verify that the X driver does in fact support hiz and
1533 * clean up if it doesn't.
1534 *
1535 * Presently, however, no verification or clean up is necessary, and
1536 * execution should not reach here. If the framebuffer still has a hiz
1537 * region, then we have already set dri2_has_hiz to true after
1538 * confirming above that the stencil buffer is Y tiled.
1539 */
1540 assert(0);
1541 }
1542 }