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[mesa.git] / src / mesa / drivers / dri / intel / intel_context.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/extensions.h"
32 #include "main/fbobject.h"
33 #include "main/framebuffer.h"
34 #include "main/imports.h"
35 #include "main/points.h"
36 #include "main/renderbuffer.h"
37
38 #include "swrast/swrast.h"
39 #include "swrast_setup/swrast_setup.h"
40 #include "tnl/tnl.h"
41 #include "drivers/common/driverfuncs.h"
42 #include "drivers/common/meta.h"
43
44 #include "intel_chipset.h"
45 #include "intel_buffers.h"
46 #include "intel_tex.h"
47 #include "intel_batchbuffer.h"
48 #include "intel_clear.h"
49 #include "intel_extensions.h"
50 #include "intel_pixel.h"
51 #include "intel_regions.h"
52 #include "intel_buffer_objects.h"
53 #include "intel_fbo.h"
54 #include "intel_bufmgr.h"
55 #include "intel_screen.h"
56
57 #include "drirenderbuffer.h"
58 #include "utils.h"
59 #include "../glsl/ralloc.h"
60
61 #ifndef INTEL_DEBUG
62 int INTEL_DEBUG = (0);
63 #endif
64
65
66 static const GLubyte *
67 intelGetString(struct gl_context * ctx, GLenum name)
68 {
69 const struct intel_context *const intel = intel_context(ctx);
70 const char *chipset;
71 static char buffer[128];
72
73 switch (name) {
74 case GL_VENDOR:
75 return (GLubyte *) "Tungsten Graphics, Inc";
76 break;
77
78 case GL_RENDERER:
79 switch (intel->intelScreen->deviceID) {
80 case PCI_CHIP_845_G:
81 chipset = "Intel(R) 845G";
82 break;
83 case PCI_CHIP_I830_M:
84 chipset = "Intel(R) 830M";
85 break;
86 case PCI_CHIP_I855_GM:
87 chipset = "Intel(R) 852GM/855GM";
88 break;
89 case PCI_CHIP_I865_G:
90 chipset = "Intel(R) 865G";
91 break;
92 case PCI_CHIP_I915_G:
93 chipset = "Intel(R) 915G";
94 break;
95 case PCI_CHIP_E7221_G:
96 chipset = "Intel (R) E7221G (i915)";
97 break;
98 case PCI_CHIP_I915_GM:
99 chipset = "Intel(R) 915GM";
100 break;
101 case PCI_CHIP_I945_G:
102 chipset = "Intel(R) 945G";
103 break;
104 case PCI_CHIP_I945_GM:
105 chipset = "Intel(R) 945GM";
106 break;
107 case PCI_CHIP_I945_GME:
108 chipset = "Intel(R) 945GME";
109 break;
110 case PCI_CHIP_G33_G:
111 chipset = "Intel(R) G33";
112 break;
113 case PCI_CHIP_Q35_G:
114 chipset = "Intel(R) Q35";
115 break;
116 case PCI_CHIP_Q33_G:
117 chipset = "Intel(R) Q33";
118 break;
119 case PCI_CHIP_IGD_GM:
120 case PCI_CHIP_IGD_G:
121 chipset = "Intel(R) IGD";
122 break;
123 case PCI_CHIP_I965_Q:
124 chipset = "Intel(R) 965Q";
125 break;
126 case PCI_CHIP_I965_G:
127 case PCI_CHIP_I965_G_1:
128 chipset = "Intel(R) 965G";
129 break;
130 case PCI_CHIP_I946_GZ:
131 chipset = "Intel(R) 946GZ";
132 break;
133 case PCI_CHIP_I965_GM:
134 chipset = "Intel(R) 965GM";
135 break;
136 case PCI_CHIP_I965_GME:
137 chipset = "Intel(R) 965GME/GLE";
138 break;
139 case PCI_CHIP_GM45_GM:
140 chipset = "Mobile Intel® GM45 Express Chipset";
141 break;
142 case PCI_CHIP_IGD_E_G:
143 chipset = "Intel(R) Integrated Graphics Device";
144 break;
145 case PCI_CHIP_G45_G:
146 chipset = "Intel(R) G45/G43";
147 break;
148 case PCI_CHIP_Q45_G:
149 chipset = "Intel(R) Q45/Q43";
150 break;
151 case PCI_CHIP_G41_G:
152 chipset = "Intel(R) G41";
153 break;
154 case PCI_CHIP_B43_G:
155 case PCI_CHIP_B43_G1:
156 chipset = "Intel(R) B43";
157 break;
158 case PCI_CHIP_ILD_G:
159 chipset = "Intel(R) Ironlake Desktop";
160 break;
161 case PCI_CHIP_ILM_G:
162 chipset = "Intel(R) Ironlake Mobile";
163 break;
164 case PCI_CHIP_SANDYBRIDGE_GT1:
165 case PCI_CHIP_SANDYBRIDGE_GT2:
166 case PCI_CHIP_SANDYBRIDGE_GT2_PLUS:
167 chipset = "Intel(R) Sandybridge Desktop";
168 break;
169 case PCI_CHIP_SANDYBRIDGE_M_GT1:
170 case PCI_CHIP_SANDYBRIDGE_M_GT2:
171 case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS:
172 chipset = "Intel(R) Sandybridge Mobile";
173 break;
174 case PCI_CHIP_SANDYBRIDGE_S:
175 chipset = "Intel(R) Sandybridge Server";
176 break;
177 case PCI_CHIP_IVYBRIDGE_GT1:
178 case PCI_CHIP_IVYBRIDGE_GT2:
179 chipset = "Intel(R) Ivybridge Desktop";
180 break;
181 case PCI_CHIP_IVYBRIDGE_M_GT1:
182 case PCI_CHIP_IVYBRIDGE_M_GT2:
183 chipset = "Intel(R) Ivybridge Mobile";
184 break;
185 case PCI_CHIP_IVYBRIDGE_S_GT1:
186 chipset = "Intel(R) Ivybridge Server";
187 break;
188 default:
189 chipset = "Unknown Intel Chipset";
190 break;
191 }
192
193 (void) driGetRendererString(buffer, chipset, 0);
194 return (GLubyte *) buffer;
195
196 default:
197 return NULL;
198 }
199 }
200
201 static void
202 intel_flush_front(struct gl_context *ctx)
203 {
204 struct intel_context *intel = intel_context(ctx);
205 __DRIcontext *driContext = intel->driContext;
206 __DRIscreen *const screen = intel->intelScreen->driScrnPriv;
207
208 if ((ctx->DrawBuffer->Name == 0) && intel->front_buffer_dirty) {
209 if (screen->dri2.loader &&
210 (screen->dri2.loader->base.version >= 2)
211 && (screen->dri2.loader->flushFrontBuffer != NULL) &&
212 driContext->driDrawablePriv &&
213 driContext->driDrawablePriv->loaderPrivate) {
214 (*screen->dri2.loader->flushFrontBuffer)(driContext->driDrawablePriv,
215 driContext->driDrawablePriv->loaderPrivate);
216
217 /* We set the dirty bit in intel_prepare_render() if we're
218 * front buffer rendering once we get there.
219 */
220 intel->front_buffer_dirty = false;
221 }
222 }
223 }
224
225 static unsigned
226 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
227 {
228 return _mesa_get_format_bytes(rb->Base.Format) * 8;
229 }
230
231 static void
232 intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel,
233 __DRIdrawable *drawable,
234 __DRIbuffer **buffers,
235 int *count);
236
237 static void
238 intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel,
239 __DRIdrawable *drawable,
240 __DRIbuffer *buffer,
241 struct intel_renderbuffer *rb,
242 const char *buffer_name);
243
244 static void
245 intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel,
246 __DRIdrawable *drawable,
247 __DRIbuffer **buffers,
248 unsigned **attachments,
249 int *count);
250
251 static void
252 intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
253 __DRIdrawable *drawable,
254 __DRIbuffer *buffer,
255 struct intel_renderbuffer *rb,
256 const char *buffer_name);
257 static void
258 intel_verify_dri2_has_hiz(struct intel_context *intel,
259 __DRIdrawable *drawable,
260 __DRIbuffer **buffers,
261 unsigned **attachments,
262 int *count);
263
264 void
265 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
266 {
267 struct gl_framebuffer *fb = drawable->driverPrivate;
268 struct intel_renderbuffer *rb;
269 struct intel_context *intel = context->driverPrivate;
270 __DRIbuffer *buffers = NULL;
271 unsigned *attachments = NULL;
272 int i, count;
273 const char *region_name;
274
275 bool try_separate_stencil =
276 intel->has_separate_stencil &&
277 intel->intelScreen->dri2_has_hiz != INTEL_DRI2_HAS_HIZ_FALSE &&
278 intel->intelScreen->driScrnPriv->dri2.loader != NULL &&
279 intel->intelScreen->driScrnPriv->dri2.loader->base.version > 2 &&
280 intel->intelScreen->driScrnPriv->dri2.loader->getBuffersWithFormat != NULL;
281
282 assert(!intel->must_use_separate_stencil || try_separate_stencil);
283
284 /* If we're rendering to the fake front buffer, make sure all the
285 * pending drawing has landed on the real front buffer. Otherwise
286 * when we eventually get to DRI2GetBuffersWithFormat the stale
287 * real front buffer contents will get copied to the new fake front
288 * buffer.
289 */
290 if (intel->is_front_buffer_rendering) {
291 intel_flush(&intel->ctx);
292 intel_flush_front(&intel->ctx);
293 }
294
295 /* Set this up front, so that in case our buffers get invalidated
296 * while we're getting new buffers, we don't clobber the stamp and
297 * thus ignore the invalidate. */
298 drawable->lastStamp = drawable->dri2.stamp;
299
300 if (unlikely(INTEL_DEBUG & DEBUG_DRI))
301 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
302
303 if (try_separate_stencil) {
304 intel_query_dri2_buffers_with_separate_stencil(intel, drawable, &buffers,
305 &attachments, &count);
306 } else {
307 intel_query_dri2_buffers_no_separate_stencil(intel, drawable, &buffers,
308 &count);
309 }
310
311 if (buffers == NULL)
312 return;
313
314 for (i = 0; i < count; i++) {
315 switch (buffers[i].attachment) {
316 case __DRI_BUFFER_FRONT_LEFT:
317 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
318 region_name = "dri2 front buffer";
319 break;
320
321 case __DRI_BUFFER_FAKE_FRONT_LEFT:
322 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
323 region_name = "dri2 fake front buffer";
324 break;
325
326 case __DRI_BUFFER_BACK_LEFT:
327 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
328 region_name = "dri2 back buffer";
329 break;
330
331 case __DRI_BUFFER_DEPTH:
332 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
333 region_name = "dri2 depth buffer";
334 break;
335
336 case __DRI_BUFFER_HIZ:
337 /* The hiz region resides in the depth renderbuffer. */
338 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
339 region_name = "dri2 hiz buffer";
340 break;
341
342 case __DRI_BUFFER_DEPTH_STENCIL:
343 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
344 region_name = "dri2 depth / stencil buffer";
345 break;
346
347 case __DRI_BUFFER_STENCIL:
348 rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
349 region_name = "dri2 stencil buffer";
350 break;
351
352 case __DRI_BUFFER_ACCUM:
353 default:
354 fprintf(stderr,
355 "unhandled buffer attach event, attachment type %d\n",
356 buffers[i].attachment);
357 return;
358 }
359
360 if (try_separate_stencil) {
361 intel_process_dri2_buffer_with_separate_stencil(intel, drawable,
362 &buffers[i], rb,
363 region_name);
364 } else {
365 intel_process_dri2_buffer_no_separate_stencil(intel, drawable,
366 &buffers[i], rb,
367 region_name);
368 }
369 }
370
371 if (try_separate_stencil
372 && intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN) {
373 intel_verify_dri2_has_hiz(intel, drawable, &buffers, &attachments,
374 &count);
375 }
376
377 if (attachments)
378 free(attachments);
379
380 driUpdateFramebufferSize(&intel->ctx, drawable);
381 }
382
383 /**
384 * intel_prepare_render should be called anywhere that curent read/drawbuffer
385 * state is required.
386 */
387 void
388 intel_prepare_render(struct intel_context *intel)
389 {
390 __DRIcontext *driContext = intel->driContext;
391 __DRIdrawable *drawable;
392
393 drawable = driContext->driDrawablePriv;
394 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
395 if (drawable->lastStamp != drawable->dri2.stamp)
396 intel_update_renderbuffers(driContext, drawable);
397 intel_draw_buffer(&intel->ctx);
398 driContext->dri2.draw_stamp = drawable->dri2.stamp;
399 }
400
401 drawable = driContext->driReadablePriv;
402 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
403 if (drawable->lastStamp != drawable->dri2.stamp)
404 intel_update_renderbuffers(driContext, drawable);
405 driContext->dri2.read_stamp = drawable->dri2.stamp;
406 }
407
408 /* If we're currently rendering to the front buffer, the rendering
409 * that will happen next will probably dirty the front buffer. So
410 * mark it as dirty here.
411 */
412 if (intel->is_front_buffer_rendering)
413 intel->front_buffer_dirty = true;
414
415 /* Wait for the swapbuffers before the one we just emitted, so we
416 * don't get too many swaps outstanding for apps that are GPU-heavy
417 * but not CPU-heavy.
418 *
419 * We're using intelDRI2Flush (called from the loader before
420 * swapbuffer) and glFlush (for front buffer rendering) as the
421 * indicator that a frame is done and then throttle when we get
422 * here as we prepare to render the next frame. At this point for
423 * round trips for swap/copy and getting new buffers are done and
424 * we'll spend less time waiting on the GPU.
425 *
426 * Unfortunately, we don't have a handle to the batch containing
427 * the swap, and getting our hands on that doesn't seem worth it,
428 * so we just us the first batch we emitted after the last swap.
429 */
430 if (intel->need_throttle && intel->first_post_swapbuffers_batch) {
431 drm_intel_bo_wait_rendering(intel->first_post_swapbuffers_batch);
432 drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
433 intel->first_post_swapbuffers_batch = NULL;
434 intel->need_throttle = false;
435 }
436 }
437
438 static void
439 intel_viewport(struct gl_context *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
440 {
441 struct intel_context *intel = intel_context(ctx);
442 __DRIcontext *driContext = intel->driContext;
443
444 if (intel->saved_viewport)
445 intel->saved_viewport(ctx, x, y, w, h);
446
447 if (ctx->DrawBuffer->Name == 0) {
448 dri2InvalidateDrawable(driContext->driDrawablePriv);
449 dri2InvalidateDrawable(driContext->driReadablePriv);
450 }
451 }
452
453 static const struct dri_debug_control debug_control[] = {
454 { "tex", DEBUG_TEXTURE},
455 { "state", DEBUG_STATE},
456 { "ioctl", DEBUG_IOCTL},
457 { "blit", DEBUG_BLIT},
458 { "mip", DEBUG_MIPTREE},
459 { "fall", DEBUG_FALLBACKS},
460 { "verb", DEBUG_VERBOSE},
461 { "bat", DEBUG_BATCH},
462 { "pix", DEBUG_PIXEL},
463 { "buf", DEBUG_BUFMGR},
464 { "reg", DEBUG_REGION},
465 { "fbo", DEBUG_FBO},
466 { "gs", DEBUG_GS},
467 { "sync", DEBUG_SYNC},
468 { "prim", DEBUG_PRIMS },
469 { "vert", DEBUG_VERTS },
470 { "dri", DEBUG_DRI },
471 { "sf", DEBUG_SF },
472 { "san", DEBUG_SANITY },
473 { "sleep", DEBUG_SLEEP },
474 { "stats", DEBUG_STATS },
475 { "tile", DEBUG_TILE },
476 { "wm", DEBUG_WM },
477 { "urb", DEBUG_URB },
478 { "vs", DEBUG_VS },
479 { "clip", DEBUG_CLIP },
480 { NULL, 0 }
481 };
482
483
484 static void
485 intelInvalidateState(struct gl_context * ctx, GLuint new_state)
486 {
487 struct intel_context *intel = intel_context(ctx);
488
489 _swrast_InvalidateState(ctx, new_state);
490 _vbo_InvalidateState(ctx, new_state);
491
492 intel->NewGLState |= new_state;
493
494 if (intel->vtbl.invalidate_state)
495 intel->vtbl.invalidate_state( intel, new_state );
496 }
497
498 void
499 intel_flush(struct gl_context *ctx)
500 {
501 struct intel_context *intel = intel_context(ctx);
502
503 if (intel->Fallback)
504 _swrast_flush(ctx);
505
506 if (intel->gen < 4)
507 INTEL_FIREVERTICES(intel);
508
509 if (intel->batch.used)
510 intel_batchbuffer_flush(intel);
511 }
512
513 static void
514 intel_glFlush(struct gl_context *ctx)
515 {
516 struct intel_context *intel = intel_context(ctx);
517
518 intel_flush(ctx);
519 intel_flush_front(ctx);
520 if (intel->is_front_buffer_rendering)
521 intel->need_throttle = true;
522 }
523
524 void
525 intelFinish(struct gl_context * ctx)
526 {
527 struct intel_context *intel = intel_context(ctx);
528
529 intel_flush(ctx);
530 intel_flush_front(ctx);
531
532 if (intel->batch.last_bo)
533 drm_intel_bo_wait_rendering(intel->batch.last_bo);
534 }
535
536 void
537 intelInitDriverFunctions(struct dd_function_table *functions)
538 {
539 _mesa_init_driver_functions(functions);
540
541 functions->Flush = intel_glFlush;
542 functions->Finish = intelFinish;
543 functions->GetString = intelGetString;
544 functions->UpdateState = intelInvalidateState;
545
546 intelInitTextureFuncs(functions);
547 intelInitTextureImageFuncs(functions);
548 intelInitTextureSubImageFuncs(functions);
549 intelInitTextureCopyImageFuncs(functions);
550 intelInitStateFuncs(functions);
551 intelInitClearFuncs(functions);
552 intelInitBufferFuncs(functions);
553 intelInitPixelFuncs(functions);
554 intelInitBufferObjectFuncs(functions);
555 intel_init_syncobj_functions(functions);
556 }
557
558 bool
559 intelInitContext(struct intel_context *intel,
560 int api,
561 const struct gl_config * mesaVis,
562 __DRIcontext * driContextPriv,
563 void *sharedContextPrivate,
564 struct dd_function_table *functions)
565 {
566 struct gl_context *ctx = &intel->ctx;
567 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
568 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
569 struct intel_screen *intelScreen = sPriv->private;
570 int bo_reuse_mode;
571 struct gl_config visual;
572
573 /* we can't do anything without a connection to the device */
574 if (intelScreen->bufmgr == NULL)
575 return false;
576
577 /* Can't rely on invalidate events, fall back to glViewport hack */
578 if (!driContextPriv->driScreenPriv->dri2.useInvalidate) {
579 intel->saved_viewport = functions->Viewport;
580 functions->Viewport = intel_viewport;
581 }
582
583 if (mesaVis == NULL) {
584 memset(&visual, 0, sizeof visual);
585 mesaVis = &visual;
586 }
587
588 if (!_mesa_initialize_context(&intel->ctx, api, mesaVis, shareCtx,
589 functions, (void *) intel)) {
590 printf("%s: failed to init mesa context\n", __FUNCTION__);
591 return false;
592 }
593
594 driContextPriv->driverPrivate = intel;
595 intel->intelScreen = intelScreen;
596 intel->driContext = driContextPriv;
597 intel->driFd = sPriv->fd;
598
599 intel->gen = intelScreen->gen;
600
601 const int devID = intelScreen->deviceID;
602
603 if (IS_SNB_GT1(devID) || IS_IVB_GT1(devID))
604 intel->gt = 1;
605 else if (IS_SNB_GT2(devID) || IS_IVB_GT2(devID))
606 intel->gt = 2;
607 else
608 intel->gt = 0;
609
610 if (IS_G4X(devID)) {
611 intel->is_g4x = true;
612 } else if (IS_945(devID)) {
613 intel->is_945 = true;
614 }
615
616 if (intel->gen >= 5) {
617 intel->needs_ff_sync = true;
618 }
619
620 intel->has_separate_stencil = intel->intelScreen->hw_has_separate_stencil;
621 intel->must_use_separate_stencil = intel->intelScreen->hw_must_use_separate_stencil;
622 intel->has_hiz = intel->intelScreen->hw_has_hiz;
623
624 memset(&ctx->TextureFormatSupported, 0,
625 sizeof(ctx->TextureFormatSupported));
626 ctx->TextureFormatSupported[MESA_FORMAT_ARGB8888] = true;
627 if (devID != PCI_CHIP_I830_M && devID != PCI_CHIP_845_G)
628 ctx->TextureFormatSupported[MESA_FORMAT_XRGB8888] = true;
629 ctx->TextureFormatSupported[MESA_FORMAT_ARGB4444] = true;
630 ctx->TextureFormatSupported[MESA_FORMAT_ARGB1555] = true;
631 ctx->TextureFormatSupported[MESA_FORMAT_RGB565] = true;
632 ctx->TextureFormatSupported[MESA_FORMAT_L8] = true;
633 ctx->TextureFormatSupported[MESA_FORMAT_A8] = true;
634 ctx->TextureFormatSupported[MESA_FORMAT_I8] = true;
635 ctx->TextureFormatSupported[MESA_FORMAT_AL88] = true;
636 if (intel->gen >= 4)
637 ctx->TextureFormatSupported[MESA_FORMAT_AL1616] = true;
638
639 /* Depth and stencil */
640 ctx->TextureFormatSupported[MESA_FORMAT_S8_Z24] = true;
641 ctx->TextureFormatSupported[MESA_FORMAT_X8_Z24] = true;
642 ctx->TextureFormatSupported[MESA_FORMAT_S8] = intel->has_separate_stencil;
643
644 /*
645 * This was disabled in initial FBO enabling to avoid combinations
646 * of depth+stencil that wouldn't work together. We since decided
647 * that it was OK, since it's up to the app to come up with the
648 * combo that actually works, so this can probably be re-enabled.
649 */
650 /*
651 ctx->TextureFormatSupported[MESA_FORMAT_Z16] = true;
652 ctx->TextureFormatSupported[MESA_FORMAT_Z24] = true;
653 */
654
655 /* ctx->Extensions.MESA_ycbcr_texture */
656 ctx->TextureFormatSupported[MESA_FORMAT_YCBCR] = true;
657 ctx->TextureFormatSupported[MESA_FORMAT_YCBCR_REV] = true;
658
659 /* GL_3DFX_texture_compression_FXT1 */
660 ctx->TextureFormatSupported[MESA_FORMAT_RGB_FXT1] = true;
661 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_FXT1] = true;
662
663 /* GL_EXT_texture_compression_s3tc */
664 ctx->TextureFormatSupported[MESA_FORMAT_RGB_DXT1] = true;
665 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_DXT1] = true;
666 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_DXT3] = true;
667 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_DXT5] = true;
668
669 #ifndef I915
670 /* GL_ARB_texture_compression_rgtc */
671 ctx->TextureFormatSupported[MESA_FORMAT_RED_RGTC1] = true;
672 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RED_RGTC1] = true;
673 ctx->TextureFormatSupported[MESA_FORMAT_RG_RGTC2] = true;
674 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RG_RGTC2] = true;
675
676 /* GL_ARB_texture_rg */
677 ctx->TextureFormatSupported[MESA_FORMAT_R8] = true;
678 ctx->TextureFormatSupported[MESA_FORMAT_R16] = true;
679 ctx->TextureFormatSupported[MESA_FORMAT_RG88] = true;
680 ctx->TextureFormatSupported[MESA_FORMAT_RG1616] = true;
681
682 /* GL_MESA_texture_signed_rgba / GL_EXT_texture_snorm */
683 ctx->TextureFormatSupported[MESA_FORMAT_DUDV8] = true;
684 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RGBA8888_REV] = true;
685 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_R8] = true;
686 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RG88_REV] = true;
687 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_R16] = true;
688 ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_GR1616] = true;
689
690 /* GL_EXT_texture_sRGB */
691 ctx->TextureFormatSupported[MESA_FORMAT_SARGB8] = true;
692 if (intel->gen >= 5 || intel->is_g4x)
693 ctx->TextureFormatSupported[MESA_FORMAT_SRGB_DXT1] = true;
694 ctx->TextureFormatSupported[MESA_FORMAT_SRGBA_DXT1] = true;
695 ctx->TextureFormatSupported[MESA_FORMAT_SRGBA_DXT3] = true;
696 ctx->TextureFormatSupported[MESA_FORMAT_SRGBA_DXT5] = true;
697 if (intel->gen >= 5 || intel->is_g4x) {
698 ctx->TextureFormatSupported[MESA_FORMAT_SL8] = true;
699 ctx->TextureFormatSupported[MESA_FORMAT_SLA8] = true;
700 }
701
702 #ifdef TEXTURE_FLOAT_ENABLED
703 ctx->TextureFormatSupported[MESA_FORMAT_RGBA_FLOAT32] = true;
704 ctx->TextureFormatSupported[MESA_FORMAT_RG_FLOAT32] = true;
705 ctx->TextureFormatSupported[MESA_FORMAT_R_FLOAT32] = true;
706 ctx->TextureFormatSupported[MESA_FORMAT_INTENSITY_FLOAT32] = true;
707 ctx->TextureFormatSupported[MESA_FORMAT_LUMINANCE_FLOAT32] = true;
708 ctx->TextureFormatSupported[MESA_FORMAT_ALPHA_FLOAT32] = true;
709 ctx->TextureFormatSupported[MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32] = true;
710
711 /* GL_EXT_texture_shared_exponent */
712 ctx->TextureFormatSupported[MESA_FORMAT_RGB9_E5_FLOAT] = true;
713
714 /* GL_EXT_packed_float */
715 ctx->TextureFormatSupported[MESA_FORMAT_R11_G11_B10_FLOAT] = true;
716 #endif
717
718 #endif /* !I915 */
719
720 driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
721 sPriv->myNum, (intel->gen >= 4) ? "i965" : "i915");
722 if (intel->gen < 4)
723 intel->maxBatchSize = 4096;
724 else
725 intel->maxBatchSize = sizeof(intel->batch.map);
726
727 intel->bufmgr = intelScreen->bufmgr;
728
729 bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
730 switch (bo_reuse_mode) {
731 case DRI_CONF_BO_REUSE_DISABLED:
732 break;
733 case DRI_CONF_BO_REUSE_ALL:
734 intel_bufmgr_gem_enable_reuse(intel->bufmgr);
735 break;
736 }
737
738 /* This doesn't yet catch all non-conformant rendering, but it's a
739 * start.
740 */
741 if (getenv("INTEL_STRICT_CONFORMANCE")) {
742 unsigned int value = atoi(getenv("INTEL_STRICT_CONFORMANCE"));
743 if (value > 0) {
744 intel->conformance_mode = value;
745 }
746 else {
747 intel->conformance_mode = 1;
748 }
749 }
750
751 if (intel->conformance_mode > 0) {
752 ctx->Const.MinLineWidth = 1.0;
753 ctx->Const.MinLineWidthAA = 1.0;
754 ctx->Const.MaxLineWidth = 1.0;
755 ctx->Const.MaxLineWidthAA = 1.0;
756 ctx->Const.LineWidthGranularity = 1.0;
757 }
758 else {
759 ctx->Const.MinLineWidth = 1.0;
760 ctx->Const.MinLineWidthAA = 1.0;
761 ctx->Const.MaxLineWidth = 5.0;
762 ctx->Const.MaxLineWidthAA = 5.0;
763 ctx->Const.LineWidthGranularity = 0.5;
764 }
765
766 ctx->Const.MinPointSize = 1.0;
767 ctx->Const.MinPointSizeAA = 1.0;
768 ctx->Const.MaxPointSize = 255.0;
769 ctx->Const.MaxPointSizeAA = 3.0;
770 ctx->Const.PointSizeGranularity = 1.0;
771
772 ctx->Const.MaxSamples = 1.0;
773
774 if (intel->gen >= 6)
775 ctx->Const.MaxClipPlanes = 8;
776
777 ctx->Const.StripTextureBorder = GL_TRUE;
778
779 /* reinitialize the context point state.
780 * It depend on constants in __struct gl_contextRec::Const
781 */
782 _mesa_init_point(ctx);
783
784 if (intel->gen >= 4) {
785 ctx->Const.sRGBCapable = true;
786 if (MAX_WIDTH > 8192)
787 ctx->Const.MaxRenderbufferSize = 8192;
788 } else {
789 if (MAX_WIDTH > 2048)
790 ctx->Const.MaxRenderbufferSize = 2048;
791 }
792
793 /* Initialize the software rasterizer and helper modules. */
794 _swrast_CreateContext(ctx);
795 _vbo_CreateContext(ctx);
796 _tnl_CreateContext(ctx);
797 _swsetup_CreateContext(ctx);
798
799 /* Configure swrast to match hardware characteristics: */
800 _swrast_allow_pixel_fog(ctx, false);
801 _swrast_allow_vertex_fog(ctx, true);
802
803 _mesa_meta_init(ctx);
804
805 intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
806 intel->hw_stipple = 1;
807
808 /* XXX FBO: this doesn't seem to be used anywhere */
809 switch (mesaVis->depthBits) {
810 case 0: /* what to do in this case? */
811 case 16:
812 intel->polygon_offset_scale = 1.0;
813 break;
814 case 24:
815 intel->polygon_offset_scale = 2.0; /* req'd to pass glean */
816 break;
817 default:
818 assert(0);
819 break;
820 }
821
822 if (intel->gen >= 4)
823 intel->polygon_offset_scale /= 0xffff;
824
825 intel->RenderIndex = ~0;
826
827 switch (ctx->API) {
828 case API_OPENGL:
829 intelInitExtensions(ctx);
830 break;
831 case API_OPENGLES:
832 intelInitExtensionsES1(ctx);
833 break;
834 case API_OPENGLES2:
835 intelInitExtensionsES2(ctx);
836 break;
837 }
838
839 INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
840 if (INTEL_DEBUG & DEBUG_BUFMGR)
841 dri_bufmgr_set_debug(intel->bufmgr, true);
842
843 intel_batchbuffer_init(intel);
844
845 intel_fbo_init(intel);
846
847 intel->use_texture_tiling = driQueryOptionb(&intel->optionCache,
848 "texture_tiling");
849 intel->use_early_z = driQueryOptionb(&intel->optionCache, "early_z");
850
851 intel->prim.primitive = ~0;
852
853 /* Force all software fallbacks */
854 if (driQueryOptionb(&intel->optionCache, "no_rast")) {
855 fprintf(stderr, "disabling 3D rasterization\n");
856 intel->no_rast = 1;
857 }
858
859 if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) {
860 fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
861 intel->always_flush_batch = 1;
862 }
863
864 if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) {
865 fprintf(stderr, "flushing GPU caches before/after each draw call\n");
866 intel->always_flush_cache = 1;
867 }
868
869 return true;
870 }
871
872 void
873 intelDestroyContext(__DRIcontext * driContextPriv)
874 {
875 struct intel_context *intel =
876 (struct intel_context *) driContextPriv->driverPrivate;
877
878 assert(intel); /* should never be null */
879 if (intel) {
880 INTEL_FIREVERTICES(intel);
881
882 _mesa_meta_free(&intel->ctx);
883
884 intel->vtbl.destroy(intel);
885
886 _swsetup_DestroyContext(&intel->ctx);
887 _tnl_DestroyContext(&intel->ctx);
888 _vbo_DestroyContext(&intel->ctx);
889
890 _swrast_DestroyContext(&intel->ctx);
891 intel->Fallback = 0x0; /* don't call _swrast_Flush later */
892
893 intel_batchbuffer_free(intel);
894
895 free(intel->prim.vb);
896 intel->prim.vb = NULL;
897 drm_intel_bo_unreference(intel->prim.vb_bo);
898 intel->prim.vb_bo = NULL;
899 drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
900 intel->first_post_swapbuffers_batch = NULL;
901
902 driDestroyOptionCache(&intel->optionCache);
903
904 /* free the Mesa context */
905 _mesa_free_context_data(&intel->ctx);
906
907 _math_matrix_dtr(&intel->ViewportMatrix);
908
909 ralloc_free(intel);
910 driContextPriv->driverPrivate = NULL;
911 }
912 }
913
914 GLboolean
915 intelUnbindContext(__DRIcontext * driContextPriv)
916 {
917 /* Unset current context and dispath table */
918 _mesa_make_current(NULL, NULL, NULL);
919
920 return true;
921 }
922
923 GLboolean
924 intelMakeCurrent(__DRIcontext * driContextPriv,
925 __DRIdrawable * driDrawPriv,
926 __DRIdrawable * driReadPriv)
927 {
928 struct intel_context *intel;
929 GET_CURRENT_CONTEXT(curCtx);
930
931 if (driContextPriv)
932 intel = (struct intel_context *) driContextPriv->driverPrivate;
933 else
934 intel = NULL;
935
936 /* According to the glXMakeCurrent() man page: "Pending commands to
937 * the previous context, if any, are flushed before it is released."
938 * But only flush if we're actually changing contexts.
939 */
940 if (intel_context(curCtx) && intel_context(curCtx) != intel) {
941 _mesa_flush(curCtx);
942 }
943
944 if (driContextPriv) {
945 struct gl_framebuffer *fb, *readFb;
946
947 if (driDrawPriv == NULL && driReadPriv == NULL) {
948 fb = _mesa_get_incomplete_framebuffer();
949 readFb = _mesa_get_incomplete_framebuffer();
950 } else {
951 fb = driDrawPriv->driverPrivate;
952 readFb = driReadPriv->driverPrivate;
953 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
954 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
955 }
956
957 intel_prepare_render(intel);
958 _mesa_make_current(&intel->ctx, fb, readFb);
959
960 /* We do this in intel_prepare_render() too, but intel->ctx.DrawBuffer
961 * is NULL at that point. We can't call _mesa_makecurrent()
962 * first, since we need the buffer size for the initial
963 * viewport. So just call intel_draw_buffer() again here. */
964 intel_draw_buffer(&intel->ctx);
965 }
966 else {
967 _mesa_make_current(NULL, NULL, NULL);
968 }
969
970 return true;
971 }
972
973 /**
974 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
975 *
976 * To determine which DRI buffers to request, examine the renderbuffers
977 * attached to the drawable's framebuffer. Then request the buffers with
978 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
979 *
980 * This is called from intel_update_renderbuffers(). It is used only if either
981 * the hardware or the X driver lacks separate stencil support.
982 *
983 * \param drawable Drawable whose buffers are queried.
984 * \param buffers [out] List of buffers returned by DRI2 query.
985 * \param buffer_count [out] Number of buffers returned.
986 *
987 * \see intel_update_renderbuffers()
988 * \see DRI2GetBuffers()
989 * \see DRI2GetBuffersWithFormat()
990 */
991 static void
992 intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel,
993 __DRIdrawable *drawable,
994 __DRIbuffer **buffers,
995 int *buffer_count)
996 {
997 assert(!intel->must_use_separate_stencil);
998
999 __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1000 struct gl_framebuffer *fb = drawable->driverPrivate;
1001
1002 if (screen->dri2.loader
1003 && screen->dri2.loader->base.version > 2
1004 && screen->dri2.loader->getBuffersWithFormat != NULL) {
1005
1006 int i = 0;
1007 const int max_attachments = 4;
1008 unsigned *attachments = calloc(2 * max_attachments, sizeof(unsigned));
1009
1010 struct intel_renderbuffer *front_rb;
1011 struct intel_renderbuffer *back_rb;
1012 struct intel_renderbuffer *depth_rb;
1013 struct intel_renderbuffer *stencil_rb;
1014
1015 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1016 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1017 depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
1018 stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
1019
1020 if ((intel->is_front_buffer_rendering ||
1021 intel->is_front_buffer_reading ||
1022 !back_rb) && front_rb) {
1023 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1024 attachments[i++] = intel_bits_per_pixel(front_rb);
1025 }
1026
1027 if (back_rb) {
1028 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1029 attachments[i++] = intel_bits_per_pixel(back_rb);
1030 }
1031
1032 if (depth_rb && stencil_rb) {
1033 attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL;
1034 attachments[i++] = intel_bits_per_pixel(depth_rb);
1035 } else if (depth_rb) {
1036 attachments[i++] = __DRI_BUFFER_DEPTH;
1037 attachments[i++] = intel_bits_per_pixel(depth_rb);
1038 } else if (stencil_rb) {
1039 attachments[i++] = __DRI_BUFFER_STENCIL;
1040 attachments[i++] = intel_bits_per_pixel(stencil_rb);
1041 }
1042
1043 assert(i <= 2 * max_attachments);
1044
1045 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1046 &drawable->w,
1047 &drawable->h,
1048 attachments, i / 2,
1049 buffer_count,
1050 drawable->loaderPrivate);
1051 free(attachments);
1052
1053 } else if (screen->dri2.loader) {
1054
1055 int i = 0;
1056 const int max_attachments = 4;
1057 unsigned *attachments = calloc(max_attachments, sizeof(unsigned));
1058
1059 if (intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT))
1060 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1061 if (intel_get_renderbuffer(fb, BUFFER_BACK_LEFT))
1062 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1063 if (intel_get_renderbuffer(fb, BUFFER_DEPTH))
1064 attachments[i++] = __DRI_BUFFER_DEPTH;
1065 if (intel_get_renderbuffer(fb, BUFFER_STENCIL))
1066 attachments[i++] = __DRI_BUFFER_STENCIL;
1067
1068 assert(i <= max_attachments);
1069
1070 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1071 &drawable->w,
1072 &drawable->h,
1073 attachments, i,
1074 buffer_count,
1075 drawable->loaderPrivate);
1076 free(attachments);
1077
1078 } else {
1079 *buffers = NULL;
1080 *buffer_count = 0;
1081 }
1082 }
1083
1084 /**
1085 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1086 *
1087 * This is called from intel_update_renderbuffers(). It is used only if
1088 * either the hardware or the X driver lacks separate stencil support.
1089 *
1090 * \par Note:
1091 * DRI buffers whose attachment point is DRI2BufferStencil or
1092 * DRI2BufferDepthStencil are handled as special cases.
1093 *
1094 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1095 * that is passed to intel_region_alloc_for_handle().
1096 *
1097 * \see intel_update_renderbuffers()
1098 * \see intel_region_alloc_for_handle()
1099 */
1100 static void
1101 intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel,
1102 __DRIdrawable *drawable,
1103 __DRIbuffer *buffer,
1104 struct intel_renderbuffer *rb,
1105 const char *buffer_name)
1106 {
1107 assert(!intel->must_use_separate_stencil);
1108
1109 struct gl_framebuffer *fb = drawable->driverPrivate;
1110 struct intel_renderbuffer *depth_rb = NULL;
1111
1112 if (!rb)
1113 return;
1114
1115 if (rb->region && rb->region->name == buffer->name)
1116 return;
1117
1118 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1119 fprintf(stderr,
1120 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1121 buffer->name, buffer->attachment,
1122 buffer->cpp, buffer->pitch);
1123 }
1124
1125 bool identify_depth_and_stencil = false;
1126 if (buffer->attachment == __DRI_BUFFER_STENCIL) {
1127 struct intel_renderbuffer *depth_rb =
1128 intel_get_renderbuffer(fb, BUFFER_DEPTH);
1129 identify_depth_and_stencil = depth_rb && depth_rb->region;
1130 }
1131
1132 if (identify_depth_and_stencil) {
1133 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1134 fprintf(stderr, "(reusing depth buffer as stencil)\n");
1135 }
1136 intel_region_reference(&rb->region, depth_rb->region);
1137 } else {
1138 intel_region_release(&rb->region);
1139 rb->region = intel_region_alloc_for_handle(intel->intelScreen,
1140 buffer->cpp,
1141 drawable->w,
1142 drawable->h,
1143 buffer->pitch / buffer->cpp,
1144 buffer->name,
1145 buffer_name);
1146 }
1147
1148 if (buffer->attachment == __DRI_BUFFER_DEPTH_STENCIL) {
1149 struct intel_renderbuffer *stencil_rb =
1150 intel_get_renderbuffer(fb, BUFFER_STENCIL);
1151
1152 if (!stencil_rb)
1153 return;
1154
1155 /* The rb passed in is the BUFFER_DEPTH attachment, and we need
1156 * to associate this region to BUFFER_STENCIL as well.
1157 */
1158 intel_region_reference(&stencil_rb->region, rb->region);
1159 }
1160 }
1161
1162 /**
1163 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1164 *
1165 * To determine which DRI buffers to request, examine the renderbuffers
1166 * attached to the drawable's framebuffer. Then request the buffers with
1167 * DRI2GetBuffersWithFormat().
1168 *
1169 * This is called from intel_update_renderbuffers(). It is used when 1) the
1170 * hardware supports separate stencil and 2) the X driver's separate stencil
1171 * support has been verified to work or is still unknown.
1172 *
1173 * \param drawable Drawable whose buffers are queried.
1174 * \param buffers [out] List of buffers returned by DRI2 query.
1175 * \param buffer_count [out] Number of buffers returned.
1176 * \param attachments [out] List of pairs (attachment_point, bits_per_pixel)
1177 * that were submitted in the DRI2 query. Number of pairs
1178 * is same as buffer_count.
1179 *
1180 * \see intel_update_renderbuffers()
1181 * \see DRI2GetBuffersWithFormat()
1182 * \see enum intel_dri2_has_hiz
1183 */
1184 static void
1185 intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel,
1186 __DRIdrawable *drawable,
1187 __DRIbuffer **buffers,
1188 unsigned **attachments,
1189 int *count)
1190 {
1191 assert(intel->has_separate_stencil);
1192
1193 __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1194 struct gl_framebuffer *fb = drawable->driverPrivate;
1195
1196 const int max_attachments = 5;
1197 int i = 0;
1198
1199 *attachments = calloc(2 * max_attachments, sizeof(unsigned));
1200 if (!*attachments) {
1201 *buffers = NULL;
1202 *count = 0;
1203 return;
1204 }
1205
1206 struct intel_renderbuffer *front_rb;
1207 struct intel_renderbuffer *back_rb;
1208 struct intel_renderbuffer *depth_rb;
1209 struct intel_renderbuffer *stencil_rb;
1210
1211 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1212 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1213 depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
1214 stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
1215
1216 if ((intel->is_front_buffer_rendering ||
1217 intel->is_front_buffer_reading ||
1218 !back_rb) && front_rb) {
1219 (*attachments)[i++] = __DRI_BUFFER_FRONT_LEFT;
1220 (*attachments)[i++] = intel_bits_per_pixel(front_rb);
1221 }
1222
1223 if (back_rb) {
1224 (*attachments)[i++] = __DRI_BUFFER_BACK_LEFT;
1225 (*attachments)[i++] = intel_bits_per_pixel(back_rb);
1226 }
1227
1228 /*
1229 * We request a separate stencil buffer, and perhaps a hiz buffer too, even
1230 * if we do not yet know if the X driver supports it. See the comments for
1231 * 'enum intel_dri2_has_hiz'.
1232 */
1233
1234 if (depth_rb) {
1235 (*attachments)[i++] = __DRI_BUFFER_DEPTH;
1236 (*attachments)[i++] = intel_bits_per_pixel(depth_rb);
1237
1238 if (intel->vtbl.is_hiz_depth_format(intel, depth_rb->Base.Format)) {
1239 /* Depth and hiz buffer have same bpp. */
1240 (*attachments)[i++] = __DRI_BUFFER_HIZ;
1241 (*attachments)[i++] = intel_bits_per_pixel(depth_rb);
1242 }
1243 }
1244
1245 if (stencil_rb) {
1246 assert(stencil_rb->Base.Format == MESA_FORMAT_S8);
1247 (*attachments)[i++] = __DRI_BUFFER_STENCIL;
1248 (*attachments)[i++] = intel_bits_per_pixel(stencil_rb);
1249 }
1250
1251 assert(i <= 2 * max_attachments);
1252
1253 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1254 &drawable->w,
1255 &drawable->h,
1256 *attachments, i / 2,
1257 count,
1258 drawable->loaderPrivate);
1259
1260 if (!*buffers) {
1261 free(*attachments);
1262 *attachments = NULL;
1263 *count = 0;
1264 }
1265 }
1266
1267 /**
1268 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1269 *
1270 * This is called from intel_update_renderbuffers(). It is used when 1) the
1271 * hardware supports separate stencil and 2) the X driver's separate stencil
1272 * support has been verified to work or is still unknown.
1273 *
1274 * \par Note:
1275 * DRI buffers whose attachment point is DRI2BufferStencil or DRI2BufferHiz
1276 * are handled as special cases.
1277 *
1278 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1279 * that is passed to intel_region_alloc_for_handle().
1280 *
1281 * \see intel_update_renderbuffers()
1282 * \see intel_region_alloc_for_handle()
1283 * \see enum intel_dri2_has_hiz
1284 */
1285 static void
1286 intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
1287 __DRIdrawable *drawable,
1288 __DRIbuffer *buffer,
1289 struct intel_renderbuffer *rb,
1290 const char *buffer_name)
1291 {
1292 assert(intel->has_separate_stencil);
1293 assert(buffer->attachment != __DRI_BUFFER_DEPTH_STENCIL);
1294
1295 if (!rb)
1296 return;
1297
1298 /* If the renderbuffer's and DRIbuffer's regions match, then continue. */
1299 if ((buffer->attachment != __DRI_BUFFER_HIZ &&
1300 rb->region &&
1301 rb->region->name == buffer->name) ||
1302 (buffer->attachment == __DRI_BUFFER_HIZ &&
1303 rb->hiz_region &&
1304 rb->hiz_region->name == buffer->name)) {
1305 return;
1306 }
1307
1308 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1309 fprintf(stderr,
1310 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1311 buffer->name, buffer->attachment,
1312 buffer->cpp, buffer->pitch);
1313 }
1314
1315 /*
1316 * The stencil buffer has quirky pitch requirements. From Section
1317 * 2.11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface Pitch":
1318 * The pitch must be set to 2x the value computed based on width, as
1319 * the stencil buffer is stored with two rows interleaved.
1320 * If we neglect to double the pitch, then drm_intel_gem_bo_map_gtt()
1321 * maps the memory incorrectly.
1322 *
1323 * To satisfy the pitch requirement, the X driver hackishly allocated
1324 * the gem buffer with bpp doubled and height halved. So buffer->cpp is
1325 * correct, but drawable->height is not.
1326 */
1327 int buffer_height = drawable->h;
1328 if (buffer->attachment == __DRI_BUFFER_STENCIL) {
1329 buffer_height /= 2;
1330 }
1331
1332 struct intel_region *region =
1333 intel_region_alloc_for_handle(intel->intelScreen,
1334 buffer->cpp,
1335 drawable->w,
1336 buffer_height,
1337 buffer->pitch / buffer->cpp,
1338 buffer->name,
1339 buffer_name);
1340
1341 if (buffer->attachment == __DRI_BUFFER_HIZ) {
1342 intel_region_reference(&rb->hiz_region, region);
1343 } else {
1344 intel_region_reference(&rb->region, region);
1345 }
1346
1347 intel_region_release(&region);
1348 }
1349
1350 /**
1351 * \brief Verify that the X driver supports hiz and separate stencil.
1352 *
1353 * This implements the cleanup stage of the handshake described in the
1354 * comments for 'enum intel_dri2_has_hiz'.
1355 *
1356 * This should be called from intel_update_renderbuffers() after 1) the
1357 * DRIdrawable has been queried for its buffers via DRI2GetBuffersWithFormat()
1358 * and 2) the DRM region of each returned DRIbuffer has been assigned to the
1359 * appropriate intel_renderbuffer. Furthermore, this should be called *only*
1360 * when 1) intel_update_renderbuffers() tried to used the X driver's separate
1361 * stencil functionality and 2) it has not yet been determined if the X driver
1362 * supports separate stencil.
1363 *
1364 * If we determine that the X driver does have support, then we set
1365 * intel_screen.dri2_has_hiz to true and return.
1366 *
1367 * If we determine that the X driver lacks support, and we requested
1368 * a DRI2BufferDepth and DRI2BufferStencil, then we must remedy the mistake by
1369 * taking the following actions:
1370 * 1. Discard the framebuffer's stencil and depth renderbuffers.
1371 * 2. Create a combined depth/stencil renderbuffer and attach
1372 * it to the framebuffer's depth and stencil attachment points.
1373 * 3. Query the drawable for a new set of buffers, which consists of the
1374 * originally requested set plus DRI2BufferDepthStencil.
1375 * 4. Assign the DRI2BufferDepthStencil's DRM region to the new
1376 * depth/stencil renderbuffer.
1377 *
1378 * \pre intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN
1379 *
1380 * \param drawable Drawable whose buffers were queried.
1381 *
1382 * \param buffers [in/out] As input, the buffer list returned by the
1383 * original DRI2 query. As output, the current buffer
1384 * list, which may have been altered by a new DRI2 query.
1385 *
1386 * \param attachments [in/out] As input, the attachment list submitted
1387 * in the original DRI2 query. As output, the attachment
1388 * list that was submitted in the DRI2 query that
1389 * obtained the current buffer list, as returned in the
1390 * output parameter \c buffers. (Note: If no new query
1391 * was made, then the list remains unaltered).
1392 *
1393 * \param count [out] Number of buffers in the current buffer list, as
1394 * returned in the output parameter \c buffers.
1395 *
1396 * \see enum intel_dri2_has_hiz
1397 * \see struct intel_screen::dri2_has_hiz
1398 * \see intel_update_renderbuffers
1399 */
1400 static void
1401 intel_verify_dri2_has_hiz(struct intel_context *intel,
1402 __DRIdrawable *drawable,
1403 __DRIbuffer **buffers,
1404 unsigned **attachments,
1405 int *count)
1406 {
1407 assert(intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN);
1408
1409 struct gl_framebuffer *fb = drawable->driverPrivate;
1410 struct intel_renderbuffer *stencil_rb =
1411 intel_get_renderbuffer(fb, BUFFER_STENCIL);
1412
1413 if (stencil_rb) {
1414 /*
1415 * We requested a DRI2BufferStencil without knowing if the X driver
1416 * supports it. Now, check if X handled the request correctly and clean
1417 * up if it did not. (See comments for 'enum intel_dri2_has_hiz').
1418 */
1419 struct intel_renderbuffer *depth_rb =
1420 intel_get_renderbuffer(fb, BUFFER_DEPTH);
1421 assert(stencil_rb->Base.Format == MESA_FORMAT_S8);
1422 assert(depth_rb && depth_rb->Base.Format == MESA_FORMAT_X8_Z24);
1423
1424 if (stencil_rb->region->tiling == I915_TILING_NONE) {
1425 /*
1426 * The stencil buffer is actually W tiled. The region's tiling is
1427 * I915_TILING_NONE, however, because the GTT is incapable of W
1428 * fencing.
1429 */
1430 intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_TRUE;
1431 return;
1432 } else {
1433 /*
1434 * Oops... the screen doesn't support separate stencil. Discard the
1435 * separate depth and stencil buffers and replace them with
1436 * a combined depth/stencil buffer. Discard the hiz buffer too.
1437 */
1438 intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_FALSE;
1439 if (intel->must_use_separate_stencil) {
1440 _mesa_problem(&intel->ctx,
1441 "intel_context requires separate stencil, but the "
1442 "DRIscreen does not support it. You may need to "
1443 "upgrade the Intel X driver to 2.16.0");
1444 abort();
1445 }
1446
1447 /* 1. Discard depth and stencil renderbuffers. */
1448 _mesa_remove_renderbuffer(fb, BUFFER_DEPTH);
1449 depth_rb = NULL;
1450 _mesa_remove_renderbuffer(fb, BUFFER_STENCIL);
1451 stencil_rb = NULL;
1452
1453 /* 2. Create new depth/stencil renderbuffer. */
1454 struct intel_renderbuffer *depth_stencil_rb =
1455 intel_create_renderbuffer(MESA_FORMAT_S8_Z24);
1456 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depth_stencil_rb->Base);
1457 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &depth_stencil_rb->Base);
1458
1459 /* 3. Append DRI2BufferDepthStencil to attachment list. */
1460 int old_count = *count;
1461 unsigned int *old_attachments = *attachments;
1462 *count = old_count + 1;
1463 *attachments = malloc(2 * (*count) * sizeof(unsigned));
1464 memcpy(*attachments, old_attachments, 2 * old_count * sizeof(unsigned));
1465 free(old_attachments);
1466 (*attachments)[2 * old_count + 0] = __DRI_BUFFER_DEPTH_STENCIL;
1467 (*attachments)[2 * old_count + 1] = intel_bits_per_pixel(depth_stencil_rb);
1468
1469 /* 4. Request new set of DRI2 attachments. */
1470 __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1471 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1472 &drawable->w,
1473 &drawable->h,
1474 *attachments,
1475 *count,
1476 count,
1477 drawable->loaderPrivate);
1478 if (!*buffers)
1479 return;
1480
1481 /*
1482 * I don't know how to recover from the failure assertion below.
1483 * Rather than fail gradually and unexpectedly, we should just die
1484 * now.
1485 */
1486 assert(*count == old_count + 1);
1487
1488 /* 5. Assign the DRI buffer's DRM region to the its renderbuffers. */
1489 __DRIbuffer *depth_stencil_buffer = NULL;
1490 for (int i = 0; i < *count; ++i) {
1491 if ((*buffers)[i].attachment == __DRI_BUFFER_DEPTH_STENCIL) {
1492 depth_stencil_buffer = &(*buffers)[i];
1493 break;
1494 }
1495 }
1496 struct intel_region *region =
1497 intel_region_alloc_for_handle(intel->intelScreen,
1498 depth_stencil_buffer->cpp,
1499 drawable->w,
1500 drawable->h,
1501 depth_stencil_buffer->pitch
1502 / depth_stencil_buffer->cpp,
1503 depth_stencil_buffer->name,
1504 "dri2 depth / stencil buffer");
1505 intel_region_reference(&intel_get_renderbuffer(fb, BUFFER_DEPTH)->region,
1506 region);
1507 intel_region_reference(&intel_get_renderbuffer(fb, BUFFER_STENCIL)->region,
1508 region);
1509 intel_region_release(&region);
1510 }
1511 }
1512
1513 if (intel_framebuffer_has_hiz(fb)) {
1514 /*
1515 * In the future, the driver may advertise a GL config with hiz
1516 * compatible depth bits and 0 stencil bits (for example, when the
1517 * driver gains support for float32 depth buffers). When that day comes,
1518 * here we need to verify that the X driver does in fact support hiz and
1519 * clean up if it doesn't.
1520 *
1521 * Presently, however, no verification or clean up is necessary, and
1522 * execution should not reach here. If the framebuffer still has a hiz
1523 * region, then we have already set dri2_has_hiz to true after
1524 * confirming above that the stencil buffer is W tiled.
1525 */
1526 assert(0);
1527 }
1528 }