1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/extensions.h"
32 #include "main/fbobject.h"
33 #include "main/framebuffer.h"
34 #include "main/imports.h"
35 #include "main/points.h"
36 #include "main/renderbuffer.h"
38 #include "swrast/swrast.h"
39 #include "swrast_setup/swrast_setup.h"
41 #include "drivers/common/driverfuncs.h"
42 #include "drivers/common/meta.h"
44 #include "intel_chipset.h"
45 #include "intel_buffers.h"
46 #include "intel_tex.h"
47 #include "intel_batchbuffer.h"
48 #include "intel_clear.h"
49 #include "intel_extensions.h"
50 #include "intel_pixel.h"
51 #include "intel_regions.h"
52 #include "intel_buffer_objects.h"
53 #include "intel_fbo.h"
54 #include "intel_bufmgr.h"
55 #include "intel_screen.h"
56 #include "intel_mipmap_tree.h"
59 #include "../glsl/ralloc.h"
62 int INTEL_DEBUG
= (0);
66 static const GLubyte
*
67 intelGetString(struct gl_context
* ctx
, GLenum name
)
69 const struct intel_context
*const intel
= intel_context(ctx
);
71 static char buffer
[128];
75 return (GLubyte
*) "Intel Open Source Technology Center";
79 switch (intel
->intelScreen
->deviceID
) {
81 chipset
= "Intel(R) 845G";
84 chipset
= "Intel(R) 830M";
86 case PCI_CHIP_I855_GM
:
87 chipset
= "Intel(R) 852GM/855GM";
90 chipset
= "Intel(R) 865G";
93 chipset
= "Intel(R) 915G";
95 case PCI_CHIP_E7221_G
:
96 chipset
= "Intel (R) E7221G (i915)";
98 case PCI_CHIP_I915_GM
:
99 chipset
= "Intel(R) 915GM";
101 case PCI_CHIP_I945_G
:
102 chipset
= "Intel(R) 945G";
104 case PCI_CHIP_I945_GM
:
105 chipset
= "Intel(R) 945GM";
107 case PCI_CHIP_I945_GME
:
108 chipset
= "Intel(R) 945GME";
111 chipset
= "Intel(R) G33";
114 chipset
= "Intel(R) Q35";
117 chipset
= "Intel(R) Q33";
119 case PCI_CHIP_IGD_GM
:
121 chipset
= "Intel(R) IGD";
123 case PCI_CHIP_I965_Q
:
124 chipset
= "Intel(R) 965Q";
126 case PCI_CHIP_I965_G
:
127 case PCI_CHIP_I965_G_1
:
128 chipset
= "Intel(R) 965G";
130 case PCI_CHIP_I946_GZ
:
131 chipset
= "Intel(R) 946GZ";
133 case PCI_CHIP_I965_GM
:
134 chipset
= "Intel(R) 965GM";
136 case PCI_CHIP_I965_GME
:
137 chipset
= "Intel(R) 965GME/GLE";
139 case PCI_CHIP_GM45_GM
:
140 chipset
= "Mobile IntelĀ® GM45 Express Chipset";
142 case PCI_CHIP_IGD_E_G
:
143 chipset
= "Intel(R) Integrated Graphics Device";
146 chipset
= "Intel(R) G45/G43";
149 chipset
= "Intel(R) Q45/Q43";
152 chipset
= "Intel(R) G41";
155 case PCI_CHIP_B43_G1
:
156 chipset
= "Intel(R) B43";
159 chipset
= "Intel(R) Ironlake Desktop";
162 chipset
= "Intel(R) Ironlake Mobile";
164 case PCI_CHIP_SANDYBRIDGE_GT1
:
165 case PCI_CHIP_SANDYBRIDGE_GT2
:
166 case PCI_CHIP_SANDYBRIDGE_GT2_PLUS
:
167 chipset
= "Intel(R) Sandybridge Desktop";
169 case PCI_CHIP_SANDYBRIDGE_M_GT1
:
170 case PCI_CHIP_SANDYBRIDGE_M_GT2
:
171 case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS
:
172 chipset
= "Intel(R) Sandybridge Mobile";
174 case PCI_CHIP_SANDYBRIDGE_S
:
175 chipset
= "Intel(R) Sandybridge Server";
177 case PCI_CHIP_IVYBRIDGE_GT1
:
178 case PCI_CHIP_IVYBRIDGE_GT2
:
179 chipset
= "Intel(R) Ivybridge Desktop";
181 case PCI_CHIP_IVYBRIDGE_M_GT1
:
182 case PCI_CHIP_IVYBRIDGE_M_GT2
:
183 chipset
= "Intel(R) Ivybridge Mobile";
185 case PCI_CHIP_IVYBRIDGE_S_GT1
:
186 case PCI_CHIP_IVYBRIDGE_S_GT2
:
187 chipset
= "Intel(R) Ivybridge Server";
189 case PCI_CHIP_BAYTRAIL_M_1
:
190 case PCI_CHIP_BAYTRAIL_M_2
:
191 case PCI_CHIP_BAYTRAIL_M_3
:
192 case PCI_CHIP_BAYTRAIL_M_4
:
193 case PCI_CHIP_BAYTRAIL_D
:
194 chipset
= "Intel(R) Bay Trail";
196 case PCI_CHIP_HASWELL_GT1
:
197 case PCI_CHIP_HASWELL_GT2
:
198 case PCI_CHIP_HASWELL_GT3
:
199 case PCI_CHIP_HASWELL_SDV_GT1
:
200 case PCI_CHIP_HASWELL_SDV_GT2
:
201 case PCI_CHIP_HASWELL_SDV_GT3
:
202 case PCI_CHIP_HASWELL_ULT_GT1
:
203 case PCI_CHIP_HASWELL_ULT_GT2
:
204 case PCI_CHIP_HASWELL_ULT_GT3
:
205 case PCI_CHIP_HASWELL_CRW_GT1
:
206 case PCI_CHIP_HASWELL_CRW_GT2
:
207 case PCI_CHIP_HASWELL_CRW_GT3
:
208 chipset
= "Intel(R) Haswell Desktop";
210 case PCI_CHIP_HASWELL_M_GT1
:
211 case PCI_CHIP_HASWELL_M_GT2
:
212 case PCI_CHIP_HASWELL_M_GT3
:
213 case PCI_CHIP_HASWELL_SDV_M_GT1
:
214 case PCI_CHIP_HASWELL_SDV_M_GT2
:
215 case PCI_CHIP_HASWELL_SDV_M_GT3
:
216 case PCI_CHIP_HASWELL_ULT_M_GT1
:
217 case PCI_CHIP_HASWELL_ULT_M_GT2
:
218 case PCI_CHIP_HASWELL_ULT_M_GT3
:
219 case PCI_CHIP_HASWELL_CRW_M_GT1
:
220 case PCI_CHIP_HASWELL_CRW_M_GT2
:
221 case PCI_CHIP_HASWELL_CRW_M_GT3
:
222 chipset
= "Intel(R) Haswell Mobile";
224 case PCI_CHIP_HASWELL_S_GT1
:
225 case PCI_CHIP_HASWELL_S_GT2
:
226 case PCI_CHIP_HASWELL_S_GT3
:
227 case PCI_CHIP_HASWELL_SDV_S_GT1
:
228 case PCI_CHIP_HASWELL_SDV_S_GT2
:
229 case PCI_CHIP_HASWELL_SDV_S_GT3
:
230 case PCI_CHIP_HASWELL_ULT_S_GT1
:
231 case PCI_CHIP_HASWELL_ULT_S_GT2
:
232 case PCI_CHIP_HASWELL_ULT_S_GT3
:
233 case PCI_CHIP_HASWELL_CRW_S_GT1
:
234 case PCI_CHIP_HASWELL_CRW_S_GT2
:
235 case PCI_CHIP_HASWELL_CRW_S_GT3
:
236 chipset
= "Intel(R) Haswell Server";
239 chipset
= "Unknown Intel Chipset";
243 (void) driGetRendererString(buffer
, chipset
, 0);
244 return (GLubyte
*) buffer
;
252 intel_downsample_for_dri2_flush(struct intel_context
*intel
,
253 __DRIdrawable
*drawable
)
255 if (intel
->gen
< 6) {
256 /* MSAA is not supported, so don't waste time checking for
257 * a multisample buffer.
262 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
263 struct intel_renderbuffer
*rb
;
265 /* Usually, only the back buffer will need to be downsampled. However,
266 * the front buffer will also need it if the user has rendered into it.
268 static const gl_buffer_index buffers
[2] = {
273 for (int i
= 0; i
< 2; ++i
) {
274 rb
= intel_get_renderbuffer(fb
, buffers
[i
]);
275 if (rb
== NULL
|| rb
->mt
== NULL
)
277 intel_miptree_downsample(intel
, rb
->mt
);
282 intel_flush_front(struct gl_context
*ctx
)
284 struct intel_context
*intel
= intel_context(ctx
);
285 __DRIcontext
*driContext
= intel
->driContext
;
286 __DRIdrawable
*driDrawable
= driContext
->driDrawablePriv
;
287 __DRIscreen
*const screen
= intel
->intelScreen
->driScrnPriv
;
289 if (_mesa_is_winsys_fbo(ctx
->DrawBuffer
) && intel
->front_buffer_dirty
) {
290 if (screen
->dri2
.loader
->flushFrontBuffer
!= NULL
&&
292 driDrawable
->loaderPrivate
) {
294 /* Downsample before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
296 * This potentially downsamples both front and back buffer. It
297 * is unnecessary to downsample the back, but harms nothing except
298 * performance. And no one cares about front-buffer render
301 intel_downsample_for_dri2_flush(intel
, driDrawable
);
303 screen
->dri2
.loader
->flushFrontBuffer(driDrawable
,
304 driDrawable
->loaderPrivate
);
306 /* We set the dirty bit in intel_prepare_render() if we're
307 * front buffer rendering once we get there.
309 intel
->front_buffer_dirty
= false;
315 intel_bits_per_pixel(const struct intel_renderbuffer
*rb
)
317 return _mesa_get_format_bytes(intel_rb_format(rb
)) * 8;
321 intel_query_dri2_buffers(struct intel_context
*intel
,
322 __DRIdrawable
*drawable
,
323 __DRIbuffer
**buffers
,
327 intel_process_dri2_buffer(struct intel_context
*intel
,
328 __DRIdrawable
*drawable
,
330 struct intel_renderbuffer
*rb
,
331 const char *buffer_name
);
334 intel_update_renderbuffers(__DRIcontext
*context
, __DRIdrawable
*drawable
)
336 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
337 struct intel_renderbuffer
*rb
;
338 struct intel_context
*intel
= context
->driverPrivate
;
339 __DRIbuffer
*buffers
= NULL
;
341 const char *region_name
;
343 /* If we're rendering to the fake front buffer, make sure all the
344 * pending drawing has landed on the real front buffer. Otherwise
345 * when we eventually get to DRI2GetBuffersWithFormat the stale
346 * real front buffer contents will get copied to the new fake front
349 if (intel
->is_front_buffer_rendering
) {
350 intel_flush(&intel
->ctx
);
351 intel_flush_front(&intel
->ctx
);
354 /* Set this up front, so that in case our buffers get invalidated
355 * while we're getting new buffers, we don't clobber the stamp and
356 * thus ignore the invalidate. */
357 drawable
->lastStamp
= drawable
->dri2
.stamp
;
359 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
))
360 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
362 intel_query_dri2_buffers(intel
, drawable
, &buffers
, &count
);
367 for (i
= 0; i
< count
; i
++) {
368 switch (buffers
[i
].attachment
) {
369 case __DRI_BUFFER_FRONT_LEFT
:
370 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
371 region_name
= "dri2 front buffer";
374 case __DRI_BUFFER_FAKE_FRONT_LEFT
:
375 rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
376 region_name
= "dri2 fake front buffer";
379 case __DRI_BUFFER_BACK_LEFT
:
380 rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
381 region_name
= "dri2 back buffer";
384 case __DRI_BUFFER_DEPTH
:
385 case __DRI_BUFFER_HIZ
:
386 case __DRI_BUFFER_DEPTH_STENCIL
:
387 case __DRI_BUFFER_STENCIL
:
388 case __DRI_BUFFER_ACCUM
:
391 "unhandled buffer attach event, attachment type %d\n",
392 buffers
[i
].attachment
);
396 intel_process_dri2_buffer(intel
, drawable
, &buffers
[i
], rb
, region_name
);
399 driUpdateFramebufferSize(&intel
->ctx
, drawable
);
403 * intel_prepare_render should be called anywhere that curent read/drawbuffer
407 intel_prepare_render(struct intel_context
*intel
)
409 __DRIcontext
*driContext
= intel
->driContext
;
410 __DRIdrawable
*drawable
;
412 drawable
= driContext
->driDrawablePriv
;
413 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.draw_stamp
) {
414 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
415 intel_update_renderbuffers(driContext
, drawable
);
416 intel_draw_buffer(&intel
->ctx
);
417 driContext
->dri2
.draw_stamp
= drawable
->dri2
.stamp
;
420 drawable
= driContext
->driReadablePriv
;
421 if (drawable
&& drawable
->dri2
.stamp
!= driContext
->dri2
.read_stamp
) {
422 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
423 intel_update_renderbuffers(driContext
, drawable
);
424 driContext
->dri2
.read_stamp
= drawable
->dri2
.stamp
;
427 /* If we're currently rendering to the front buffer, the rendering
428 * that will happen next will probably dirty the front buffer. So
429 * mark it as dirty here.
431 if (intel
->is_front_buffer_rendering
)
432 intel
->front_buffer_dirty
= true;
434 /* Wait for the swapbuffers before the one we just emitted, so we
435 * don't get too many swaps outstanding for apps that are GPU-heavy
438 * We're using intelDRI2Flush (called from the loader before
439 * swapbuffer) and glFlush (for front buffer rendering) as the
440 * indicator that a frame is done and then throttle when we get
441 * here as we prepare to render the next frame. At this point for
442 * round trips for swap/copy and getting new buffers are done and
443 * we'll spend less time waiting on the GPU.
445 * Unfortunately, we don't have a handle to the batch containing
446 * the swap, and getting our hands on that doesn't seem worth it,
447 * so we just us the first batch we emitted after the last swap.
449 if (intel
->need_throttle
&& intel
->first_post_swapbuffers_batch
) {
450 if (!intel
->disable_throttling
)
451 drm_intel_bo_wait_rendering(intel
->first_post_swapbuffers_batch
);
452 drm_intel_bo_unreference(intel
->first_post_swapbuffers_batch
);
453 intel
->first_post_swapbuffers_batch
= NULL
;
454 intel
->need_throttle
= false;
459 intel_viewport(struct gl_context
*ctx
, GLint x
, GLint y
, GLsizei w
, GLsizei h
)
461 struct intel_context
*intel
= intel_context(ctx
);
462 __DRIcontext
*driContext
= intel
->driContext
;
464 if (intel
->saved_viewport
)
465 intel
->saved_viewport(ctx
, x
, y
, w
, h
);
467 if (_mesa_is_winsys_fbo(ctx
->DrawBuffer
)) {
468 dri2InvalidateDrawable(driContext
->driDrawablePriv
);
469 dri2InvalidateDrawable(driContext
->driReadablePriv
);
473 static const struct dri_debug_control debug_control
[] = {
474 { "tex", DEBUG_TEXTURE
},
475 { "state", DEBUG_STATE
},
476 { "ioctl", DEBUG_IOCTL
},
477 { "blit", DEBUG_BLIT
},
478 { "mip", DEBUG_MIPTREE
},
479 { "fall", DEBUG_PERF
},
480 { "perf", DEBUG_PERF
},
481 { "bat", DEBUG_BATCH
},
482 { "pix", DEBUG_PIXEL
},
483 { "buf", DEBUG_BUFMGR
},
484 { "reg", DEBUG_REGION
},
488 { "sync", DEBUG_SYNC
},
489 { "prim", DEBUG_PRIMS
},
490 { "vert", DEBUG_VERTS
},
491 { "dri", DEBUG_DRI
},
493 { "stats", DEBUG_STATS
},
495 { "urb", DEBUG_URB
},
497 { "clip", DEBUG_CLIP
},
498 { "aub", DEBUG_AUB
},
499 { "shader_time", DEBUG_SHADER_TIME
},
500 { "no16", DEBUG_NO16
},
501 { "blorp", DEBUG_BLORP
},
507 intelInvalidateState(struct gl_context
* ctx
, GLuint new_state
)
509 struct intel_context
*intel
= intel_context(ctx
);
511 if (ctx
->swrast_context
)
512 _swrast_InvalidateState(ctx
, new_state
);
513 _vbo_InvalidateState(ctx
, new_state
);
515 intel
->NewGLState
|= new_state
;
517 if (intel
->vtbl
.invalidate_state
)
518 intel
->vtbl
.invalidate_state( intel
, new_state
);
522 intel_flush_rendering_to_batch(struct gl_context
*ctx
)
524 struct intel_context
*intel
= intel_context(ctx
);
530 INTEL_FIREVERTICES(intel
);
534 _intel_flush(struct gl_context
*ctx
, const char *file
, int line
)
536 struct intel_context
*intel
= intel_context(ctx
);
538 intel_flush_rendering_to_batch(ctx
);
540 if (intel
->batch
.used
)
541 _intel_batchbuffer_flush(intel
, file
, line
);
545 intel_glFlush(struct gl_context
*ctx
)
547 struct intel_context
*intel
= intel_context(ctx
);
550 intel_flush_front(ctx
);
551 if (intel
->is_front_buffer_rendering
)
552 intel
->need_throttle
= true;
556 intelFinish(struct gl_context
* ctx
)
558 struct intel_context
*intel
= intel_context(ctx
);
561 intel_flush_front(ctx
);
563 if (intel
->batch
.last_bo
)
564 drm_intel_bo_wait_rendering(intel
->batch
.last_bo
);
568 intelInitDriverFunctions(struct dd_function_table
*functions
)
570 _mesa_init_driver_functions(functions
);
572 functions
->Flush
= intel_glFlush
;
573 functions
->Finish
= intelFinish
;
574 functions
->GetString
= intelGetString
;
575 functions
->UpdateState
= intelInvalidateState
;
577 intelInitTextureFuncs(functions
);
578 intelInitTextureImageFuncs(functions
);
579 intelInitTextureSubImageFuncs(functions
);
580 intelInitTextureCopyImageFuncs(functions
);
581 intelInitClearFuncs(functions
);
582 intelInitBufferFuncs(functions
);
583 intelInitPixelFuncs(functions
);
584 intelInitBufferObjectFuncs(functions
);
585 intel_init_syncobj_functions(functions
);
589 validate_context_version(struct intel_screen
*screen
,
591 unsigned major_version
,
592 unsigned minor_version
,
593 unsigned *dri_ctx_error
)
595 unsigned req_version
= 10 * major_version
+ minor_version
;
596 unsigned max_version
= 0;
599 case API_OPENGL_COMPAT
:
600 max_version
= screen
->max_gl_compat_version
;
602 case API_OPENGL_CORE
:
603 max_version
= screen
->max_gl_core_version
;
606 max_version
= screen
->max_gl_es1_version
;
609 max_version
= screen
->max_gl_es2_version
;
616 if (max_version
== 0) {
617 *dri_ctx_error
= __DRI_CTX_ERROR_BAD_API
;
619 } else if (req_version
> max_version
) {
620 *dri_ctx_error
= __DRI_CTX_ERROR_BAD_VERSION
;
628 intelInitContext(struct intel_context
*intel
,
630 unsigned major_version
,
631 unsigned minor_version
,
632 const struct gl_config
* mesaVis
,
633 __DRIcontext
* driContextPriv
,
634 void *sharedContextPrivate
,
635 struct dd_function_table
*functions
,
636 unsigned *dri_ctx_error
)
638 struct gl_context
*ctx
= &intel
->ctx
;
639 struct gl_context
*shareCtx
= (struct gl_context
*) sharedContextPrivate
;
640 __DRIscreen
*sPriv
= driContextPriv
->driScreenPriv
;
641 struct intel_screen
*intelScreen
= sPriv
->driverPrivate
;
643 struct gl_config visual
;
645 /* we can't do anything without a connection to the device */
646 if (intelScreen
->bufmgr
== NULL
) {
647 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
651 if (!validate_context_version(intelScreen
,
652 api
, major_version
, minor_version
,
656 /* Can't rely on invalidate events, fall back to glViewport hack */
657 if (!driContextPriv
->driScreenPriv
->dri2
.useInvalidate
) {
658 intel
->saved_viewport
= functions
->Viewport
;
659 functions
->Viewport
= intel_viewport
;
662 if (mesaVis
== NULL
) {
663 memset(&visual
, 0, sizeof visual
);
667 intel
->intelScreen
= intelScreen
;
669 if (!_mesa_initialize_context(&intel
->ctx
, api
, mesaVis
, shareCtx
,
671 *dri_ctx_error
= __DRI_CTX_ERROR_NO_MEMORY
;
672 printf("%s: failed to init mesa context\n", __FUNCTION__
);
676 driContextPriv
->driverPrivate
= intel
;
677 intel
->driContext
= driContextPriv
;
678 intel
->driFd
= sPriv
->fd
;
680 intel
->gen
= intelScreen
->gen
;
682 const int devID
= intelScreen
->deviceID
;
683 if (IS_SNB_GT1(devID
) || IS_IVB_GT1(devID
) || IS_HSW_GT1(devID
))
685 else if (IS_SNB_GT2(devID
) || IS_IVB_GT2(devID
) || IS_HSW_GT2(devID
))
687 else if (IS_HSW_GT3(devID
))
692 if (IS_HASWELL(devID
)) {
693 intel
->is_haswell
= true;
694 } else if (IS_BAYTRAIL(devID
)) {
695 intel
->is_baytrail
= true;
697 } else if (IS_G4X(devID
)) {
698 intel
->is_g4x
= true;
699 } else if (IS_945(devID
)) {
700 intel
->is_945
= true;
703 if (intel
->gen
>= 5) {
704 intel
->needs_ff_sync
= true;
707 intel
->has_separate_stencil
= intel
->intelScreen
->hw_has_separate_stencil
;
708 intel
->must_use_separate_stencil
= intel
->intelScreen
->hw_must_use_separate_stencil
;
709 intel
->has_hiz
= intel
->gen
>= 6;
710 intel
->has_llc
= intel
->intelScreen
->hw_has_llc
;
711 intel
->has_swizzling
= intel
->intelScreen
->hw_has_swizzling
;
713 memset(&ctx
->TextureFormatSupported
,
714 0, sizeof(ctx
->TextureFormatSupported
));
716 driParseConfigFiles(&intel
->optionCache
, &intelScreen
->optionCache
,
717 sPriv
->myNum
, (intel
->gen
>= 4) ? "i965" : "i915");
719 intel
->maxBatchSize
= 4096;
721 intel
->maxBatchSize
= BATCH_SZ
;
723 /* Estimate the size of the mappable aperture into the GTT. There's an
724 * ioctl to get the whole GTT size, but not one to get the mappable subset.
725 * It turns out it's basically always 256MB, though some ancient hardware
728 uint32_t gtt_size
= 256 * 1024 * 1024;
730 gtt_size
= 128 * 1024 * 1024;
732 /* We don't want to map two objects such that a memcpy between them would
733 * just fault one mapping in and then the other over and over forever. So
734 * we would need to divide the GTT size by 2. Additionally, some GTT is
735 * taken up by things like the framebuffer and the ringbuffer and such, so
736 * be more conservative.
738 intel
->max_gtt_map_object_size
= gtt_size
/ 4;
740 intel
->bufmgr
= intelScreen
->bufmgr
;
742 bo_reuse_mode
= driQueryOptioni(&intel
->optionCache
, "bo_reuse");
743 switch (bo_reuse_mode
) {
744 case DRI_CONF_BO_REUSE_DISABLED
:
746 case DRI_CONF_BO_REUSE_ALL
:
747 intel_bufmgr_gem_enable_reuse(intel
->bufmgr
);
751 ctx
->Const
.MinLineWidth
= 1.0;
752 ctx
->Const
.MinLineWidthAA
= 1.0;
753 ctx
->Const
.MaxLineWidth
= 5.0;
754 ctx
->Const
.MaxLineWidthAA
= 5.0;
755 ctx
->Const
.LineWidthGranularity
= 0.5;
757 ctx
->Const
.MinPointSize
= 1.0;
758 ctx
->Const
.MinPointSizeAA
= 1.0;
759 ctx
->Const
.MaxPointSize
= 255.0;
760 ctx
->Const
.MaxPointSizeAA
= 3.0;
761 ctx
->Const
.PointSizeGranularity
= 1.0;
764 ctx
->Const
.MaxClipPlanes
= 8;
766 ctx
->Const
.StripTextureBorder
= GL_TRUE
;
768 /* reinitialize the context point state.
769 * It depend on constants in __struct gl_contextRec::Const
771 _mesa_init_point(ctx
);
773 if (intel
->gen
>= 4) {
774 ctx
->Const
.MaxRenderbufferSize
= 8192;
776 ctx
->Const
.MaxRenderbufferSize
= 2048;
779 /* Initialize the software rasterizer and helper modules.
781 * As of GL 3.1 core, the gen4+ driver doesn't need the swrast context for
782 * software fallbacks (which we have to support on legacy GL to do weird
783 * glDrawPixels(), glBitmap(), and other functions).
785 if (intel
->gen
<= 3 || api
!= API_OPENGL_CORE
) {
786 _swrast_CreateContext(ctx
);
789 _vbo_CreateContext(ctx
);
790 if (ctx
->swrast_context
) {
791 _tnl_CreateContext(ctx
);
792 _swsetup_CreateContext(ctx
);
794 /* Configure swrast to match hardware characteristics: */
795 _swrast_allow_pixel_fog(ctx
, false);
796 _swrast_allow_vertex_fog(ctx
, true);
799 _mesa_meta_init(ctx
);
801 intel
->hw_stencil
= mesaVis
->stencilBits
&& mesaVis
->depthBits
== 24;
802 intel
->hw_stipple
= 1;
804 /* XXX FBO: this doesn't seem to be used anywhere */
805 switch (mesaVis
->depthBits
) {
806 case 0: /* what to do in this case? */
808 intel
->polygon_offset_scale
= 1.0;
811 intel
->polygon_offset_scale
= 2.0; /* req'd to pass glean */
819 intel
->polygon_offset_scale
/= 0xffff;
821 intel
->RenderIndex
= ~0;
823 intelInitExtensions(ctx
);
825 INTEL_DEBUG
= driParseDebugString(getenv("INTEL_DEBUG"), debug_control
);
826 if (INTEL_DEBUG
& DEBUG_BUFMGR
)
827 dri_bufmgr_set_debug(intel
->bufmgr
, true);
828 if ((INTEL_DEBUG
& DEBUG_SHADER_TIME
) && intel
->gen
< 7) {
830 "shader_time debugging requires gen7 (Ivybridge) or better.\n");
831 INTEL_DEBUG
&= ~DEBUG_SHADER_TIME
;
833 if (INTEL_DEBUG
& DEBUG_PERF
)
834 intel
->perf_debug
= true;
836 if (INTEL_DEBUG
& DEBUG_AUB
)
837 drm_intel_bufmgr_gem_set_aub_dump(intel
->bufmgr
, true);
839 intel_batchbuffer_init(intel
);
841 intel_fbo_init(intel
);
843 intel
->use_early_z
= driQueryOptionb(&intel
->optionCache
, "early_z");
845 if (!driQueryOptionb(&intel
->optionCache
, "hiz")) {
846 intel
->has_hiz
= false;
847 /* On gen6, you can only do separate stencil with HIZ. */
849 intel
->has_separate_stencil
= false;
852 intel
->prim
.primitive
= ~0;
854 /* Force all software fallbacks */
856 if (driQueryOptionb(&intel
->optionCache
, "no_rast")) {
857 fprintf(stderr
, "disabling 3D rasterization\n");
862 if (driQueryOptionb(&intel
->optionCache
, "always_flush_batch")) {
863 fprintf(stderr
, "flushing batchbuffer before/after each draw call\n");
864 intel
->always_flush_batch
= 1;
867 if (driQueryOptionb(&intel
->optionCache
, "always_flush_cache")) {
868 fprintf(stderr
, "flushing GPU caches before/after each draw call\n");
869 intel
->always_flush_cache
= 1;
872 if (driQueryOptionb(&intel
->optionCache
, "disable_throttling")) {
873 fprintf(stderr
, "disabling flush throttling\n");
874 intel
->disable_throttling
= 1;
881 intelDestroyContext(__DRIcontext
* driContextPriv
)
883 struct intel_context
*intel
=
884 (struct intel_context
*) driContextPriv
->driverPrivate
;
885 struct gl_context
*ctx
= &intel
->ctx
;
887 assert(intel
); /* should never be null */
889 INTEL_FIREVERTICES(intel
);
891 /* Dump a final BMP in case the application doesn't call SwapBuffers */
892 if (INTEL_DEBUG
& DEBUG_AUB
) {
893 intel_batchbuffer_flush(intel
);
894 aub_dump_bmp(&intel
->ctx
);
897 _mesa_meta_free(&intel
->ctx
);
899 intel
->vtbl
.destroy(intel
);
901 if (ctx
->swrast_context
) {
902 _swsetup_DestroyContext(&intel
->ctx
);
903 _tnl_DestroyContext(&intel
->ctx
);
905 _vbo_DestroyContext(&intel
->ctx
);
907 if (ctx
->swrast_context
)
908 _swrast_DestroyContext(&intel
->ctx
);
909 intel
->Fallback
= 0x0; /* don't call _swrast_Flush later */
911 intel_batchbuffer_free(intel
);
913 free(intel
->prim
.vb
);
914 intel
->prim
.vb
= NULL
;
915 drm_intel_bo_unreference(intel
->prim
.vb_bo
);
916 intel
->prim
.vb_bo
= NULL
;
917 drm_intel_bo_unreference(intel
->first_post_swapbuffers_batch
);
918 intel
->first_post_swapbuffers_batch
= NULL
;
920 driDestroyOptionCache(&intel
->optionCache
);
922 /* free the Mesa context */
923 _mesa_free_context_data(&intel
->ctx
);
925 _math_matrix_dtr(&intel
->ViewportMatrix
);
928 driContextPriv
->driverPrivate
= NULL
;
933 intelUnbindContext(__DRIcontext
* driContextPriv
)
935 /* Unset current context and dispath table */
936 _mesa_make_current(NULL
, NULL
, NULL
);
942 * Fixes up the context for GLES23 with our default-to-sRGB-capable behavior
943 * on window system framebuffers.
945 * Desktop GL is fairly reasonable in its handling of sRGB: You can ask if
946 * your renderbuffer can do sRGB encode, and you can flip a switch that does
947 * sRGB encode if the renderbuffer can handle it. You can ask specifically
948 * for a visual where you're guaranteed to be capable, but it turns out that
949 * everyone just makes all their ARGB8888 visuals capable and doesn't offer
950 * incapable ones, becuase there's no difference between the two in resources
951 * used. Applications thus get built that accidentally rely on the default
952 * visual choice being sRGB, so we make ours sRGB capable. Everything sounds
955 * But for GLES2/3, they decided that it was silly to not turn on sRGB encode
956 * for sRGB renderbuffers you made with the GL_EXT_texture_sRGB equivalent.
957 * So they removed the enable knob and made it "if the renderbuffer is sRGB
958 * capable, do sRGB encode". Then, for your window system renderbuffers, you
959 * can ask for sRGB visuals and get sRGB encode, or not ask for sRGB visuals
960 * and get no sRGB encode (assuming that both kinds of visual are available).
961 * Thus our choice to support sRGB by default on our visuals for desktop would
962 * result in broken rendering of GLES apps that aren't expecting sRGB encode.
964 * Unfortunately, renderbuffer setup happens before a context is created. So
965 * in intel_screen.c we always set up sRGB, and here, if you're a GLES2/3
966 * context (without an sRGB visual, though we don't have sRGB visuals exposed
967 * yet), we go turn that back off before anyone finds out.
970 intel_gles3_srgb_workaround(struct intel_context
*intel
,
971 struct gl_framebuffer
*fb
)
973 struct gl_context
*ctx
= &intel
->ctx
;
975 if (_mesa_is_desktop_gl(ctx
) || !fb
->Visual
.sRGBCapable
)
978 /* Some day when we support the sRGB capable bit on visuals available for
979 * GLES, we'll need to respect that and not disable things here.
981 fb
->Visual
.sRGBCapable
= false;
982 for (int i
= 0; i
< BUFFER_COUNT
; i
++) {
983 if (fb
->Attachment
[i
].Renderbuffer
&&
984 fb
->Attachment
[i
].Renderbuffer
->Format
== MESA_FORMAT_SARGB8
) {
985 fb
->Attachment
[i
].Renderbuffer
->Format
= MESA_FORMAT_ARGB8888
;
991 intelMakeCurrent(__DRIcontext
* driContextPriv
,
992 __DRIdrawable
* driDrawPriv
,
993 __DRIdrawable
* driReadPriv
)
995 struct intel_context
*intel
;
996 GET_CURRENT_CONTEXT(curCtx
);
999 intel
= (struct intel_context
*) driContextPriv
->driverPrivate
;
1003 /* According to the glXMakeCurrent() man page: "Pending commands to
1004 * the previous context, if any, are flushed before it is released."
1005 * But only flush if we're actually changing contexts.
1007 if (intel_context(curCtx
) && intel_context(curCtx
) != intel
) {
1008 _mesa_flush(curCtx
);
1011 if (driContextPriv
) {
1012 struct gl_context
*ctx
= &intel
->ctx
;
1013 struct gl_framebuffer
*fb
, *readFb
;
1015 if (driDrawPriv
== NULL
&& driReadPriv
== NULL
) {
1016 fb
= _mesa_get_incomplete_framebuffer();
1017 readFb
= _mesa_get_incomplete_framebuffer();
1019 fb
= driDrawPriv
->driverPrivate
;
1020 readFb
= driReadPriv
->driverPrivate
;
1021 driContextPriv
->dri2
.draw_stamp
= driDrawPriv
->dri2
.stamp
- 1;
1022 driContextPriv
->dri2
.read_stamp
= driReadPriv
->dri2
.stamp
- 1;
1025 intel_prepare_render(intel
);
1026 _mesa_make_current(ctx
, fb
, readFb
);
1028 intel_gles3_srgb_workaround(intel
, ctx
->WinSysDrawBuffer
);
1029 intel_gles3_srgb_workaround(intel
, ctx
->WinSysReadBuffer
);
1031 /* We do this in intel_prepare_render() too, but intel->ctx.DrawBuffer
1032 * is NULL at that point. We can't call _mesa_makecurrent()
1033 * first, since we need the buffer size for the initial
1034 * viewport. So just call intel_draw_buffer() again here. */
1035 intel_draw_buffer(ctx
);
1038 _mesa_make_current(NULL
, NULL
, NULL
);
1045 * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1047 * To determine which DRI buffers to request, examine the renderbuffers
1048 * attached to the drawable's framebuffer. Then request the buffers with
1049 * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
1051 * This is called from intel_update_renderbuffers().
1053 * \param drawable Drawable whose buffers are queried.
1054 * \param buffers [out] List of buffers returned by DRI2 query.
1055 * \param buffer_count [out] Number of buffers returned.
1057 * \see intel_update_renderbuffers()
1058 * \see DRI2GetBuffers()
1059 * \see DRI2GetBuffersWithFormat()
1062 intel_query_dri2_buffers(struct intel_context
*intel
,
1063 __DRIdrawable
*drawable
,
1064 __DRIbuffer
**buffers
,
1067 __DRIscreen
*screen
= intel
->intelScreen
->driScrnPriv
;
1068 struct gl_framebuffer
*fb
= drawable
->driverPrivate
;
1070 unsigned attachments
[8];
1072 struct intel_renderbuffer
*front_rb
;
1073 struct intel_renderbuffer
*back_rb
;
1075 front_rb
= intel_get_renderbuffer(fb
, BUFFER_FRONT_LEFT
);
1076 back_rb
= intel_get_renderbuffer(fb
, BUFFER_BACK_LEFT
);
1078 memset(attachments
, 0, sizeof(attachments
));
1079 if ((intel
->is_front_buffer_rendering
||
1080 intel
->is_front_buffer_reading
||
1081 !back_rb
) && front_rb
) {
1082 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
1083 attachments
[i
++] = intel_bits_per_pixel(front_rb
);
1087 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
1088 attachments
[i
++] = intel_bits_per_pixel(back_rb
);
1091 assert(i
<= ARRAY_SIZE(attachments
));
1093 *buffers
= screen
->dri2
.loader
->getBuffersWithFormat(drawable
,
1098 drawable
->loaderPrivate
);
1102 * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1104 * This is called from intel_update_renderbuffers().
1107 * DRI buffers whose attachment point is DRI2BufferStencil or
1108 * DRI2BufferDepthStencil are handled as special cases.
1110 * \param buffer_name is a human readable name, such as "dri2 front buffer",
1111 * that is passed to intel_region_alloc_for_handle().
1113 * \see intel_update_renderbuffers()
1114 * \see intel_region_alloc_for_handle()
1117 intel_process_dri2_buffer(struct intel_context
*intel
,
1118 __DRIdrawable
*drawable
,
1119 __DRIbuffer
*buffer
,
1120 struct intel_renderbuffer
*rb
,
1121 const char *buffer_name
)
1123 struct intel_region
*region
= NULL
;
1128 unsigned num_samples
= rb
->Base
.Base
.NumSamples
;
1130 /* We try to avoid closing and reopening the same BO name, because the first
1131 * use of a mapping of the buffer involves a bunch of page faulting which is
1132 * moderately expensive.
1134 if (num_samples
== 0) {
1137 rb
->mt
->region
->name
== buffer
->name
)
1141 rb
->mt
->singlesample_mt
&&
1142 rb
->mt
->singlesample_mt
->region
&&
1143 rb
->mt
->singlesample_mt
->region
->name
== buffer
->name
)
1147 if (unlikely(INTEL_DEBUG
& DEBUG_DRI
)) {
1149 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1150 buffer
->name
, buffer
->attachment
,
1151 buffer
->cpp
, buffer
->pitch
);
1154 intel_miptree_release(&rb
->mt
);
1155 region
= intel_region_alloc_for_handle(intel
->intelScreen
,
1165 rb
->mt
= intel_miptree_create_for_dri2_buffer(intel
,
1167 intel_rb_format(rb
),
1170 intel_region_release(®ion
);