b3f6fc02dff1e8c42ed75e837f987dea65ffeaed
[mesa.git] / src / mesa / drivers / dri / intel / intel_context.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/extensions.h"
32 #include "main/framebuffer.h"
33 #include "main/imports.h"
34 #include "main/points.h"
35
36 #include "swrast/swrast.h"
37 #include "swrast_setup/swrast_setup.h"
38 #include "tnl/tnl.h"
39 #include "drivers/common/driverfuncs.h"
40
41 #include "i830_dri.h"
42
43 #include "intel_chipset.h"
44 #include "intel_buffers.h"
45 #include "intel_tex.h"
46 #include "intel_batchbuffer.h"
47 #include "intel_clear.h"
48 #include "intel_extensions.h"
49 #include "intel_pixel.h"
50 #include "intel_regions.h"
51 #include "intel_buffer_objects.h"
52 #include "intel_fbo.h"
53 #include "intel_decode.h"
54 #include "intel_bufmgr.h"
55 #include "intel_screen.h"
56 #include "intel_swapbuffers.h"
57
58 #include "drirenderbuffer.h"
59 #include "vblank.h"
60 #include "utils.h"
61 #include "xmlpool.h" /* for symbolic values of enum-type options */
62
63
64 #ifndef INTEL_DEBUG
65 int INTEL_DEBUG = (0);
66 #endif
67
68
69 #define DRIVER_DATE "20090114"
70 #define DRIVER_DATE_GEM "GEM " DRIVER_DATE
71
72
73 static const GLubyte *
74 intelGetString(GLcontext * ctx, GLenum name)
75 {
76 const struct intel_context *const intel = intel_context(ctx);
77 const char *chipset;
78 static char buffer[128];
79
80 switch (name) {
81 case GL_VENDOR:
82 return (GLubyte *) "Tungsten Graphics, Inc";
83 break;
84
85 case GL_RENDERER:
86 switch (intel->intelScreen->deviceID) {
87 case PCI_CHIP_845_G:
88 chipset = "Intel(R) 845G";
89 break;
90 case PCI_CHIP_I830_M:
91 chipset = "Intel(R) 830M";
92 break;
93 case PCI_CHIP_I855_GM:
94 chipset = "Intel(R) 852GM/855GM";
95 break;
96 case PCI_CHIP_I865_G:
97 chipset = "Intel(R) 865G";
98 break;
99 case PCI_CHIP_I915_G:
100 chipset = "Intel(R) 915G";
101 break;
102 case PCI_CHIP_E7221_G:
103 chipset = "Intel (R) E7221G (i915)";
104 break;
105 case PCI_CHIP_I915_GM:
106 chipset = "Intel(R) 915GM";
107 break;
108 case PCI_CHIP_I945_G:
109 chipset = "Intel(R) 945G";
110 break;
111 case PCI_CHIP_I945_GM:
112 chipset = "Intel(R) 945GM";
113 break;
114 case PCI_CHIP_I945_GME:
115 chipset = "Intel(R) 945GME";
116 break;
117 case PCI_CHIP_G33_G:
118 chipset = "Intel(R) G33";
119 break;
120 case PCI_CHIP_Q35_G:
121 chipset = "Intel(R) Q35";
122 break;
123 case PCI_CHIP_Q33_G:
124 chipset = "Intel(R) Q33";
125 break;
126 case PCI_CHIP_IGD_GM:
127 case PCI_CHIP_IGD_G:
128 chipset = "Intel(R) IGD";
129 break;
130 case PCI_CHIP_I965_Q:
131 chipset = "Intel(R) 965Q";
132 break;
133 case PCI_CHIP_I965_G:
134 case PCI_CHIP_I965_G_1:
135 chipset = "Intel(R) 965G";
136 break;
137 case PCI_CHIP_I946_GZ:
138 chipset = "Intel(R) 946GZ";
139 break;
140 case PCI_CHIP_I965_GM:
141 chipset = "Intel(R) 965GM";
142 break;
143 case PCI_CHIP_I965_GME:
144 chipset = "Intel(R) 965GME/GLE";
145 break;
146 case PCI_CHIP_GM45_GM:
147 chipset = "Mobile IntelĀ® GM45 Express Chipset";
148 break;
149 case PCI_CHIP_IGD_E_G:
150 chipset = "Intel(R) Integrated Graphics Device";
151 break;
152 case PCI_CHIP_G45_G:
153 chipset = "Intel(R) G45/G43";
154 break;
155 case PCI_CHIP_Q45_G:
156 chipset = "Intel(R) Q45/Q43";
157 break;
158 case PCI_CHIP_G41_G:
159 chipset = "Intel(R) G41";
160 break;
161 default:
162 chipset = "Unknown Intel Chipset";
163 break;
164 }
165
166 (void) driGetRendererString(buffer, chipset,
167 (intel->ttm) ? DRIVER_DATE_GEM : DRIVER_DATE,
168 0);
169 return (GLubyte *) buffer;
170
171 default:
172 return NULL;
173 }
174 }
175
176 void
177 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
178 {
179 struct intel_framebuffer *intel_fb = drawable->driverPrivate;
180 struct intel_renderbuffer *rb;
181 struct intel_region *region, *depth_region;
182 struct intel_context *intel = context->driverPrivate;
183 __DRIbuffer *buffers;
184 __DRIscreen *screen;
185 int i, count;
186 unsigned int attachments[10];
187 uint32_t name;
188 const char *region_name;
189
190 if (INTEL_DEBUG & DEBUG_DRI)
191 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
192
193 screen = intel->intelScreen->driScrnPriv;
194
195 i = 0;
196 if (intel_fb->color_rb[0])
197 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
198 if (intel_fb->color_rb[1])
199 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
200 if (intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH))
201 attachments[i++] = __DRI_BUFFER_DEPTH;
202 if (intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL))
203 attachments[i++] = __DRI_BUFFER_STENCIL;
204
205 buffers = (*screen->dri2.loader->getBuffers)(drawable,
206 &drawable->w,
207 &drawable->h,
208 attachments, i,
209 &count,
210 drawable->loaderPrivate);
211
212 if (buffers == NULL)
213 return;
214
215 drawable->x = 0;
216 drawable->y = 0;
217 drawable->backX = 0;
218 drawable->backY = 0;
219 drawable->numClipRects = 1;
220 drawable->pClipRects[0].x1 = 0;
221 drawable->pClipRects[0].y1 = 0;
222 drawable->pClipRects[0].x2 = drawable->w;
223 drawable->pClipRects[0].y2 = drawable->h;
224 drawable->numBackClipRects = 1;
225 drawable->pBackClipRects[0].x1 = 0;
226 drawable->pBackClipRects[0].y1 = 0;
227 drawable->pBackClipRects[0].x2 = drawable->w;
228 drawable->pBackClipRects[0].y2 = drawable->h;
229
230 depth_region = NULL;
231 for (i = 0; i < count; i++) {
232 switch (buffers[i].attachment) {
233 case __DRI_BUFFER_FRONT_LEFT:
234 rb = intel_fb->color_rb[0];
235 region_name = "dri2 front buffer";
236 break;
237
238 case __DRI_BUFFER_BACK_LEFT:
239 rb = intel_fb->color_rb[1];
240 region_name = "dri2 back buffer";
241 break;
242
243 case __DRI_BUFFER_DEPTH:
244 rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH);
245 region_name = "dri2 depth buffer";
246 break;
247
248 case __DRI_BUFFER_STENCIL:
249 rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL);
250 region_name = "dri2 stencil buffer";
251 break;
252
253 case __DRI_BUFFER_ACCUM:
254 default:
255 fprintf(stderr,
256 "unhandled buffer attach event, attacment type %d\n",
257 buffers[i].attachment);
258 return;
259 }
260
261 if (rb == NULL)
262 continue;
263
264 if (rb->region) {
265 dri_bo_flink(rb->region->buffer, &name);
266 if (name == buffers[i].name)
267 continue;
268 }
269
270 if (INTEL_DEBUG & DEBUG_DRI)
271 fprintf(stderr,
272 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
273 buffers[i].name, buffers[i].attachment,
274 buffers[i].cpp, buffers[i].pitch);
275
276 if (buffers[i].attachment == __DRI_BUFFER_STENCIL && depth_region) {
277 if (INTEL_DEBUG & DEBUG_DRI)
278 fprintf(stderr, "(reusing depth buffer as stencil)\n");
279 intel_region_reference(&region, depth_region);
280 }
281 else
282 region = intel_region_alloc_for_handle(intel, buffers[i].cpp,
283 drawable->w,
284 drawable->h,
285 buffers[i].pitch / buffers[i].cpp,
286 buffers[i].name,
287 region_name);
288
289 if (buffers[i].attachment == __DRI_BUFFER_DEPTH)
290 depth_region = region;
291
292 intel_renderbuffer_set_region(rb, region);
293 intel_region_release(&region);
294 }
295
296 driUpdateFramebufferSize(&intel->ctx, drawable);
297 }
298
299 void
300 intel_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
301 {
302 struct intel_context *intel = intel_context(ctx);
303 __DRIcontext *driContext = intel->driContext;
304 void (*old_viewport)(GLcontext *ctx, GLint x, GLint y,
305 GLsizei w, GLsizei h);
306
307 if (!driContext->driScreenPriv->dri2.enabled)
308 return;
309
310 intel_update_renderbuffers(driContext, driContext->driDrawablePriv);
311 if (driContext->driDrawablePriv != driContext->driReadablePriv)
312 intel_update_renderbuffers(driContext, driContext->driReadablePriv);
313
314 old_viewport = ctx->Driver.Viewport;
315 ctx->Driver.Viewport = NULL;
316 intel->driDrawable = driContext->driDrawablePriv;
317 intelWindowMoved(intel);
318 intel_draw_buffer(ctx, intel->ctx.DrawBuffer);
319 ctx->Driver.Viewport = old_viewport;
320 }
321
322
323 static const struct dri_debug_control debug_control[] = {
324 { "tex", DEBUG_TEXTURE},
325 { "state", DEBUG_STATE},
326 { "ioctl", DEBUG_IOCTL},
327 { "blit", DEBUG_BLIT},
328 { "mip", DEBUG_MIPTREE},
329 { "fall", DEBUG_FALLBACKS},
330 { "verb", DEBUG_VERBOSE},
331 { "bat", DEBUG_BATCH},
332 { "pix", DEBUG_PIXEL},
333 { "buf", DEBUG_BUFMGR},
334 { "reg", DEBUG_REGION},
335 { "fbo", DEBUG_FBO},
336 { "lock", DEBUG_LOCK},
337 { "sync", DEBUG_SYNC},
338 { "prim", DEBUG_PRIMS },
339 { "vert", DEBUG_VERTS },
340 { "dri", DEBUG_DRI },
341 { "dma", DEBUG_DMA },
342 { "san", DEBUG_SANITY },
343 { "sleep", DEBUG_SLEEP },
344 { "stats", DEBUG_STATS },
345 { "tile", DEBUG_TILE },
346 { "sing", DEBUG_SINGLE_THREAD },
347 { "thre", DEBUG_SINGLE_THREAD },
348 { "wm", DEBUG_WM },
349 { "urb", DEBUG_URB },
350 { "vs", DEBUG_VS },
351 { NULL, 0 }
352 };
353
354
355 static void
356 intelInvalidateState(GLcontext * ctx, GLuint new_state)
357 {
358 struct intel_context *intel = intel_context(ctx);
359
360 _swrast_InvalidateState(ctx, new_state);
361 _swsetup_InvalidateState(ctx, new_state);
362 _vbo_InvalidateState(ctx, new_state);
363 _tnl_InvalidateState(ctx, new_state);
364 _tnl_invalidate_vertex_state(ctx, new_state);
365
366 intel->NewGLState |= new_state;
367
368 if (intel->vtbl.invalidate_state)
369 intel->vtbl.invalidate_state( intel, new_state );
370 }
371
372 static void
373 intel_flush(GLcontext *ctx, GLboolean needs_mi_flush)
374 {
375 struct intel_context *intel = intel_context(ctx);
376
377 if (intel->Fallback)
378 _swrast_flush(ctx);
379
380 if (!IS_965(intel->intelScreen->deviceID))
381 INTEL_FIREVERTICES(intel);
382
383 /* Emit a flush so that any frontbuffer rendering that might have occurred
384 * lands onscreen in a timely manner, even if the X Server doesn't trigger
385 * a flush for us.
386 */
387 if (needs_mi_flush)
388 intel_batchbuffer_emit_mi_flush(intel->batch);
389
390 if (intel->batch->map != intel->batch->ptr)
391 intel_batchbuffer_flush(intel->batch);
392 }
393
394 void
395 intelFlush(GLcontext * ctx)
396 {
397 intel_flush(ctx, GL_FALSE);
398 }
399
400 static void
401 intel_glFlush(GLcontext *ctx)
402 {
403 intel_flush(ctx, GL_TRUE);
404 }
405
406 void
407 intelFinish(GLcontext * ctx)
408 {
409 struct gl_framebuffer *fb = ctx->DrawBuffer;
410 int i;
411
412 intelFlush(ctx);
413
414 for (i = 0; i < fb->_NumColorDrawBuffers; i++) {
415 struct intel_renderbuffer *irb;
416
417 irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]);
418
419 if (irb->region)
420 dri_bo_wait_rendering(irb->region->buffer);
421 }
422 if (fb->_DepthBuffer) {
423 /* XXX: Wait on buffer idle */
424 }
425 }
426
427 void
428 intelInitDriverFunctions(struct dd_function_table *functions)
429 {
430 _mesa_init_driver_functions(functions);
431
432 functions->Flush = intel_glFlush;
433 functions->Finish = intelFinish;
434 functions->GetString = intelGetString;
435 functions->UpdateState = intelInvalidateState;
436
437 functions->CopyColorTable = _swrast_CopyColorTable;
438 functions->CopyColorSubTable = _swrast_CopyColorSubTable;
439 functions->CopyConvolutionFilter1D = _swrast_CopyConvolutionFilter1D;
440 functions->CopyConvolutionFilter2D = _swrast_CopyConvolutionFilter2D;
441
442 intelInitTextureFuncs(functions);
443 intelInitStateFuncs(functions);
444 intelInitClearFuncs(functions);
445 intelInitBufferFuncs(functions);
446 intelInitPixelFuncs(functions);
447 }
448
449
450 GLboolean
451 intelInitContext(struct intel_context *intel,
452 const __GLcontextModes * mesaVis,
453 __DRIcontextPrivate * driContextPriv,
454 void *sharedContextPrivate,
455 struct dd_function_table *functions)
456 {
457 GLcontext *ctx = &intel->ctx;
458 GLcontext *shareCtx = (GLcontext *) sharedContextPrivate;
459 __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
460 intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
461 int fthrottle_mode;
462
463 if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx,
464 functions, (void *) intel)) {
465 _mesa_printf("%s: failed to init mesa context\n", __FUNCTION__);
466 return GL_FALSE;
467 }
468
469 driContextPriv->driverPrivate = intel;
470 intel->intelScreen = intelScreen;
471 intel->driScreen = sPriv;
472 intel->sarea = intelScreen->sarea;
473 intel->driContext = driContextPriv;
474
475 /* Dri stuff */
476 intel->hHWContext = driContextPriv->hHWContext;
477 intel->driFd = sPriv->fd;
478 intel->driHwLock = sPriv->lock;
479
480 driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
481 intel->driScreen->myNum,
482 IS_965(intelScreen->deviceID) ? "i965" : "i915");
483 if (intelScreen->deviceID == PCI_CHIP_I865_G)
484 intel->maxBatchSize = 4096;
485 else
486 intel->maxBatchSize = BATCH_SZ;
487
488 intel->bufmgr = intelScreen->bufmgr;
489 intel->ttm = intelScreen->ttm;
490 if (intel->ttm) {
491 int bo_reuse_mode;
492
493 bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
494 switch (bo_reuse_mode) {
495 case DRI_CONF_BO_REUSE_DISABLED:
496 break;
497 case DRI_CONF_BO_REUSE_ALL:
498 intel_bufmgr_gem_enable_reuse(intel->bufmgr);
499 break;
500 }
501 }
502
503 ctx->Const.MaxTextureMaxAnisotropy = 2.0;
504
505 /* This doesn't yet catch all non-conformant rendering, but it's a
506 * start.
507 */
508 if (getenv("INTEL_STRICT_CONFORMANCE")) {
509 intel->strict_conformance = 1;
510 }
511
512 if (intel->strict_conformance) {
513 ctx->Const.MinLineWidth = 1.0;
514 ctx->Const.MinLineWidthAA = 1.0;
515 ctx->Const.MaxLineWidth = 1.0;
516 ctx->Const.MaxLineWidthAA = 1.0;
517 ctx->Const.LineWidthGranularity = 1.0;
518 }
519 else {
520 ctx->Const.MinLineWidth = 1.0;
521 ctx->Const.MinLineWidthAA = 1.0;
522 ctx->Const.MaxLineWidth = 5.0;
523 ctx->Const.MaxLineWidthAA = 5.0;
524 ctx->Const.LineWidthGranularity = 0.5;
525 }
526
527 ctx->Const.MinPointSize = 1.0;
528 ctx->Const.MinPointSizeAA = 1.0;
529 ctx->Const.MaxPointSize = 255.0;
530 ctx->Const.MaxPointSizeAA = 3.0;
531 ctx->Const.PointSizeGranularity = 1.0;
532
533 /* reinitialize the context point state.
534 * It depend on constants in __GLcontextRec::Const
535 */
536 _mesa_init_point(ctx);
537
538 ctx->Const.MaxColorAttachments = 4; /* XXX FBO: review this */
539
540 /* Initialize the software rasterizer and helper modules. */
541 _swrast_CreateContext(ctx);
542 _vbo_CreateContext(ctx);
543 _tnl_CreateContext(ctx);
544 _swsetup_CreateContext(ctx);
545
546 /* Configure swrast to match hardware characteristics: */
547 _swrast_allow_pixel_fog(ctx, GL_FALSE);
548 _swrast_allow_vertex_fog(ctx, GL_TRUE);
549
550 intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
551 intel->hw_stipple = 1;
552
553 /* XXX FBO: this doesn't seem to be used anywhere */
554 switch (mesaVis->depthBits) {
555 case 0: /* what to do in this case? */
556 case 16:
557 intel->polygon_offset_scale = 1.0;
558 break;
559 case 24:
560 intel->polygon_offset_scale = 2.0; /* req'd to pass glean */
561 break;
562 default:
563 assert(0);
564 break;
565 }
566
567 if (IS_965(intelScreen->deviceID))
568 intel->polygon_offset_scale /= 0xffff;
569
570 intel->RenderIndex = ~0;
571
572 fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode");
573 intel->irqsEmitted = 0;
574
575 intel->do_irqs = (intel->intelScreen->irq_active &&
576 fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
577
578 intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
579
580 if (IS_965(intelScreen->deviceID) && !intel->intelScreen->irq_active) {
581 _mesa_printf("IRQs not active. Exiting\n");
582 exit(1);
583 }
584
585 intelInitExtensions(ctx, GL_FALSE);
586
587 INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
588 if (INTEL_DEBUG & DEBUG_BUFMGR)
589 dri_bufmgr_set_debug(intel->bufmgr, GL_TRUE);
590
591 if (!sPriv->dri2.enabled)
592 intel_recreate_static_regions(intel);
593
594 intel->batch = intel_batchbuffer_alloc(intel);
595
596 intel_bufferobj_init(intel);
597 intel_fbo_init(intel);
598
599 if (intel->ctx.Mesa_DXTn) {
600 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
601 _mesa_enable_extension(ctx, "GL_S3_s3tc");
602 }
603 else if (driQueryOptionb(&intel->optionCache, "force_s3tc_enable")) {
604 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
605 }
606
607 intel->prim.primitive = ~0;
608
609 /* Force all software fallbacks */
610 if (driQueryOptionb(&intel->optionCache, "no_rast")) {
611 fprintf(stderr, "disabling 3D rasterization\n");
612 intel->no_rast = 1;
613 }
614
615 /* Disable all hardware rendering (skip emitting batches and fences/waits
616 * to the kernel)
617 */
618 intel->no_hw = getenv("INTEL_NO_HW") != NULL;
619
620 return GL_TRUE;
621 }
622
623 void
624 intelDestroyContext(__DRIcontextPrivate * driContextPriv)
625 {
626 struct intel_context *intel =
627 (struct intel_context *) driContextPriv->driverPrivate;
628
629 assert(intel); /* should never be null */
630 if (intel) {
631 GLboolean release_texture_heaps;
632
633 INTEL_FIREVERTICES(intel);
634
635 intel->vtbl.destroy(intel);
636
637 release_texture_heaps = (intel->ctx.Shared->RefCount == 1);
638 _swsetup_DestroyContext(&intel->ctx);
639 _tnl_DestroyContext(&intel->ctx);
640 _vbo_DestroyContext(&intel->ctx);
641
642 _swrast_DestroyContext(&intel->ctx);
643 intel->Fallback = 0; /* don't call _swrast_Flush later */
644
645 intel_batchbuffer_free(intel->batch);
646 intel->batch = NULL;
647
648 free(intel->prim.vb);
649 intel->prim.vb = NULL;
650 dri_bo_unreference(intel->prim.vb_bo);
651 intel->prim.vb_bo = NULL;
652
653 if (release_texture_heaps) {
654 /* This share group is about to go away, free our private
655 * texture object data.
656 */
657 if (INTEL_DEBUG & DEBUG_TEXTURE)
658 fprintf(stderr, "do something to free texture heaps\n");
659 }
660
661 intel_region_release(&intel->front_region);
662 intel_region_release(&intel->back_region);
663 intel_region_release(&intel->depth_region);
664
665 driDestroyOptionCache(&intel->optionCache);
666
667 /* free the Mesa context */
668 _mesa_free_context_data(&intel->ctx);
669 }
670 }
671
672 GLboolean
673 intelUnbindContext(__DRIcontextPrivate * driContextPriv)
674 {
675 return GL_TRUE;
676 }
677
678 GLboolean
679 intelMakeCurrent(__DRIcontextPrivate * driContextPriv,
680 __DRIdrawablePrivate * driDrawPriv,
681 __DRIdrawablePrivate * driReadPriv)
682 {
683 __DRIscreenPrivate *psp = driDrawPriv->driScreenPriv;
684
685 if (driContextPriv) {
686 struct intel_context *intel =
687 (struct intel_context *) driContextPriv->driverPrivate;
688 struct intel_framebuffer *intel_fb =
689 (struct intel_framebuffer *) driDrawPriv->driverPrivate;
690 GLframebuffer *readFb = (GLframebuffer *) driReadPriv->driverPrivate;
691
692 if (driContextPriv->driScreenPriv->dri2.enabled) {
693 intel_update_renderbuffers(driContextPriv, driDrawPriv);
694 if (driDrawPriv != driReadPriv)
695 intel_update_renderbuffers(driContextPriv, driReadPriv);
696 } else {
697 /* XXX FBO temporary fix-ups! */
698 /* if the renderbuffers don't have regions, init them from the context */
699 struct intel_renderbuffer *irbDepth
700 = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH);
701 struct intel_renderbuffer *irbStencil
702 = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL);
703
704 if (intel_fb->color_rb[0]) {
705 intel_renderbuffer_set_region(intel_fb->color_rb[0],
706 intel->front_region);
707 }
708 if (intel_fb->color_rb[1]) {
709 intel_renderbuffer_set_region(intel_fb->color_rb[1],
710 intel->back_region);
711 }
712
713 if (irbDepth) {
714 intel_renderbuffer_set_region(irbDepth, intel->depth_region);
715 }
716 if (irbStencil) {
717 intel_renderbuffer_set_region(irbStencil, intel->depth_region);
718 }
719 }
720
721 /* set GLframebuffer size to match window, if needed */
722 driUpdateFramebufferSize(&intel->ctx, driDrawPriv);
723
724 if (driReadPriv != driDrawPriv) {
725 driUpdateFramebufferSize(&intel->ctx, driReadPriv);
726 }
727
728 _mesa_make_current(&intel->ctx, &intel_fb->Base, readFb);
729
730 /* The drawbuffer won't always be updated by _mesa_make_current:
731 */
732 if (intel->ctx.DrawBuffer == &intel_fb->Base) {
733
734 if (intel->driReadDrawable != driReadPriv)
735 intel->driReadDrawable = driReadPriv;
736
737 if (intel->driDrawable != driDrawPriv) {
738 if (driDrawPriv->swap_interval == (unsigned)-1) {
739 int i;
740
741 driDrawPriv->vblFlags = (intel->intelScreen->irq_active != 0)
742 ? driGetDefaultVBlankFlags(&intel->optionCache)
743 : VBLANK_FLAG_NO_IRQ;
744
745 /* Prevent error printf if one crtc is disabled, this will
746 * be properly calculated in intelWindowMoved() next.
747 */
748 driDrawPriv->vblFlags = intelFixupVblank(intel, driDrawPriv);
749
750 (*psp->systemTime->getUST) (&intel_fb->swap_ust);
751 driDrawableInitVBlank(driDrawPriv);
752 intel_fb->vbl_waited = driDrawPriv->vblSeq;
753
754 for (i = 0; i < 2; i++) {
755 if (intel_fb->color_rb[i])
756 intel_fb->color_rb[i]->vbl_pending = driDrawPriv->vblSeq;
757 }
758 }
759 intel->driDrawable = driDrawPriv;
760 intelWindowMoved(intel);
761 }
762
763 intel_draw_buffer(&intel->ctx, &intel_fb->Base);
764 }
765 }
766 else {
767 _mesa_make_current(NULL, NULL, NULL);
768 }
769
770 return GL_TRUE;
771 }
772
773 static void
774 intelContendedLock(struct intel_context *intel, GLuint flags)
775 {
776 __DRIdrawablePrivate *dPriv = intel->driDrawable;
777 __DRIscreenPrivate *sPriv = intel->driScreen;
778 volatile drm_i915_sarea_t *sarea = intel->sarea;
779 int me = intel->hHWContext;
780
781 drmGetLock(intel->driFd, intel->hHWContext, flags);
782 intel->locked = 1;
783
784 if (INTEL_DEBUG & DEBUG_LOCK)
785 _mesa_printf("%s - got contended lock\n", __progname);
786
787 /* If the window moved, may need to set a new cliprect now.
788 *
789 * NOTE: This releases and regains the hw lock, so all state
790 * checking must be done *after* this call:
791 */
792 if (dPriv)
793 DRI_VALIDATE_DRAWABLE_INFO(sPriv, dPriv);
794
795 if (sarea && sarea->ctxOwner != me) {
796 if (INTEL_DEBUG & DEBUG_BUFMGR) {
797 fprintf(stderr, "Lost Context: sarea->ctxOwner %x me %x\n",
798 sarea->ctxOwner, me);
799 }
800 sarea->ctxOwner = me;
801 }
802
803 /* If the last consumer of the texture memory wasn't us, notify the fake
804 * bufmgr and record the new owner. We should have the memory shared
805 * between contexts of a single fake bufmgr, but this will at least make
806 * things correct for now.
807 */
808 if (!intel->ttm && sarea->texAge != intel->hHWContext) {
809 sarea->texAge = intel->hHWContext;
810 intel_bufmgr_fake_contended_lock_take(intel->bufmgr);
811 if (INTEL_DEBUG & DEBUG_BATCH)
812 intel_decode_context_reset();
813 if (INTEL_DEBUG & DEBUG_BUFMGR)
814 fprintf(stderr, "Lost Textures: sarea->texAge %x hw context %x\n",
815 sarea->ctxOwner, intel->hHWContext);
816 }
817
818 /* Drawable changed?
819 */
820 if (dPriv && intel->lastStamp != dPriv->lastStamp) {
821 intelWindowMoved(intel);
822 intel->lastStamp = dPriv->lastStamp;
823 }
824 }
825
826
827 _glthread_DECLARE_STATIC_MUTEX(lockMutex);
828
829 /* Lock the hardware and validate our state.
830 */
831 void LOCK_HARDWARE( struct intel_context *intel )
832 {
833 __DRIdrawable *dPriv = intel->driDrawable;
834 __DRIscreen *sPriv = intel->driScreen;
835 char __ret = 0;
836 struct intel_framebuffer *intel_fb = NULL;
837 struct intel_renderbuffer *intel_rb = NULL;
838
839 _glthread_LOCK_MUTEX(lockMutex);
840 assert(!intel->locked);
841 intel->locked = 1;
842
843 if (intel->driDrawable) {
844 intel_fb = intel->driDrawable->driverPrivate;
845
846 if (intel_fb)
847 intel_rb =
848 intel_get_renderbuffer(&intel_fb->Base,
849 intel_fb->Base._ColorDrawBufferIndexes[0]);
850 }
851
852 if (intel_rb && dPriv->vblFlags &&
853 !(dPriv->vblFlags & VBLANK_FLAG_NO_IRQ) &&
854 (intel_fb->vbl_waited - intel_rb->vbl_pending) > (1<<23)) {
855 drmVBlank vbl;
856
857 vbl.request.type = DRM_VBLANK_ABSOLUTE;
858
859 if ( dPriv->vblFlags & VBLANK_FLAG_SECONDARY ) {
860 vbl.request.type |= DRM_VBLANK_SECONDARY;
861 }
862
863 vbl.request.sequence = intel_rb->vbl_pending;
864 drmWaitVBlank(intel->driFd, &vbl);
865 intel_fb->vbl_waited = vbl.reply.sequence;
866 }
867
868 if (!sPriv->dri2.enabled) {
869 DRM_CAS(intel->driHwLock, intel->hHWContext,
870 (DRM_LOCK_HELD|intel->hHWContext), __ret);
871
872 if (__ret)
873 intelContendedLock( intel, 0 );
874 }
875
876
877 if (INTEL_DEBUG & DEBUG_LOCK)
878 _mesa_printf("%s - locked\n", __progname);
879 }
880
881
882 /* Unlock the hardware using the global current context
883 */
884 void UNLOCK_HARDWARE( struct intel_context *intel )
885 {
886 __DRIscreen *sPriv = intel->driScreen;
887
888 intel->vtbl.note_unlock( intel );
889 intel->locked = 0;
890
891 if (!sPriv->dri2.enabled)
892 DRM_UNLOCK(intel->driFd, intel->driHwLock, intel->hHWContext);
893
894 _glthread_UNLOCK_MUTEX(lockMutex);
895
896 if (INTEL_DEBUG & DEBUG_LOCK)
897 _mesa_printf("%s - unlocked\n", __progname);
898
899 /**
900 * Nothing should be left in batch outside of LOCK/UNLOCK which references
901 * cliprects.
902 */
903 if (intel->batch->cliprect_mode == REFERENCES_CLIPRECTS)
904 intel_batchbuffer_flush(intel->batch);
905 }
906