radeon/r200/r300: cleanup some of the renderbuffer code
[mesa.git] / src / mesa / drivers / dri / intel / intel_context.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/extensions.h"
32 #include "main/framebuffer.h"
33 #include "main/imports.h"
34 #include "main/points.h"
35
36 #include "swrast/swrast.h"
37 #include "swrast_setup/swrast_setup.h"
38 #include "tnl/tnl.h"
39 #include "drivers/common/driverfuncs.h"
40
41 #include "i830_dri.h"
42
43 #include "intel_chipset.h"
44 #include "intel_buffers.h"
45 #include "intel_tex.h"
46 #include "intel_batchbuffer.h"
47 #include "intel_clear.h"
48 #include "intel_extensions.h"
49 #include "intel_pixel.h"
50 #include "intel_regions.h"
51 #include "intel_buffer_objects.h"
52 #include "intel_fbo.h"
53 #include "intel_decode.h"
54 #include "intel_bufmgr.h"
55 #include "intel_screen.h"
56 #include "intel_swapbuffers.h"
57
58 #include "drirenderbuffer.h"
59 #include "vblank.h"
60 #include "utils.h"
61 #include "xmlpool.h" /* for symbolic values of enum-type options */
62
63
64 #ifndef INTEL_DEBUG
65 int INTEL_DEBUG = (0);
66 #endif
67
68
69 #define DRIVER_DATE "20090114"
70 #define DRIVER_DATE_GEM "GEM " DRIVER_DATE
71
72
73 static const GLubyte *
74 intelGetString(GLcontext * ctx, GLenum name)
75 {
76 const struct intel_context *const intel = intel_context(ctx);
77 const char *chipset;
78 static char buffer[128];
79
80 switch (name) {
81 case GL_VENDOR:
82 return (GLubyte *) "Tungsten Graphics, Inc";
83 break;
84
85 case GL_RENDERER:
86 switch (intel->intelScreen->deviceID) {
87 case PCI_CHIP_845_G:
88 chipset = "Intel(R) 845G";
89 break;
90 case PCI_CHIP_I830_M:
91 chipset = "Intel(R) 830M";
92 break;
93 case PCI_CHIP_I855_GM:
94 chipset = "Intel(R) 852GM/855GM";
95 break;
96 case PCI_CHIP_I865_G:
97 chipset = "Intel(R) 865G";
98 break;
99 case PCI_CHIP_I915_G:
100 chipset = "Intel(R) 915G";
101 break;
102 case PCI_CHIP_E7221_G:
103 chipset = "Intel (R) E7221G (i915)";
104 break;
105 case PCI_CHIP_I915_GM:
106 chipset = "Intel(R) 915GM";
107 break;
108 case PCI_CHIP_I945_G:
109 chipset = "Intel(R) 945G";
110 break;
111 case PCI_CHIP_I945_GM:
112 chipset = "Intel(R) 945GM";
113 break;
114 case PCI_CHIP_I945_GME:
115 chipset = "Intel(R) 945GME";
116 break;
117 case PCI_CHIP_G33_G:
118 chipset = "Intel(R) G33";
119 break;
120 case PCI_CHIP_Q35_G:
121 chipset = "Intel(R) Q35";
122 break;
123 case PCI_CHIP_Q33_G:
124 chipset = "Intel(R) Q33";
125 break;
126 case PCI_CHIP_I965_Q:
127 chipset = "Intel(R) 965Q";
128 break;
129 case PCI_CHIP_I965_G:
130 case PCI_CHIP_I965_G_1:
131 chipset = "Intel(R) 965G";
132 break;
133 case PCI_CHIP_I946_GZ:
134 chipset = "Intel(R) 946GZ";
135 break;
136 case PCI_CHIP_I965_GM:
137 chipset = "Intel(R) 965GM";
138 break;
139 case PCI_CHIP_I965_GME:
140 chipset = "Intel(R) 965GME/GLE";
141 break;
142 case PCI_CHIP_GM45_GM:
143 chipset = "Mobile IntelĀ® GM45 Express Chipset";
144 break;
145 case PCI_CHIP_IGD_E_G:
146 chipset = "Intel(R) Integrated Graphics Device";
147 break;
148 case PCI_CHIP_G45_G:
149 chipset = "Intel(R) G45/G43";
150 break;
151 case PCI_CHIP_Q45_G:
152 chipset = "Intel(R) Q45/Q43";
153 break;
154 case PCI_CHIP_G41_G:
155 chipset = "Intel(R) G41";
156 break;
157 default:
158 chipset = "Unknown Intel Chipset";
159 break;
160 }
161
162 (void) driGetRendererString(buffer, chipset,
163 (intel->ttm) ? DRIVER_DATE_GEM : DRIVER_DATE,
164 0);
165 return (GLubyte *) buffer;
166
167 default:
168 return NULL;
169 }
170 }
171
172 void
173 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
174 {
175 struct intel_framebuffer *intel_fb = drawable->driverPrivate;
176 struct intel_renderbuffer *rb;
177 struct intel_region *region, *depth_region;
178 struct intel_context *intel = context->driverPrivate;
179 __DRIbuffer *buffers;
180 __DRIscreen *screen;
181 int i, count;
182 unsigned int attachments[10];
183 uint32_t name;
184 const char *region_name;
185
186 if (INTEL_DEBUG & DEBUG_DRI)
187 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
188
189 screen = intel->intelScreen->driScrnPriv;
190
191 i = 0;
192 if (intel_fb->color_rb[0])
193 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
194 if (intel_fb->color_rb[1])
195 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
196 if (intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH))
197 attachments[i++] = __DRI_BUFFER_DEPTH;
198 if (intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL))
199 attachments[i++] = __DRI_BUFFER_STENCIL;
200
201 buffers = (*screen->dri2.loader->getBuffers)(drawable,
202 &drawable->w,
203 &drawable->h,
204 attachments, i,
205 &count,
206 drawable->loaderPrivate);
207
208 if (buffers == NULL)
209 return;
210
211 drawable->x = 0;
212 drawable->y = 0;
213 drawable->backX = 0;
214 drawable->backY = 0;
215 drawable->numClipRects = 1;
216 drawable->pClipRects[0].x1 = 0;
217 drawable->pClipRects[0].y1 = 0;
218 drawable->pClipRects[0].x2 = drawable->w;
219 drawable->pClipRects[0].y2 = drawable->h;
220 drawable->numBackClipRects = 1;
221 drawable->pBackClipRects[0].x1 = 0;
222 drawable->pBackClipRects[0].y1 = 0;
223 drawable->pBackClipRects[0].x2 = drawable->w;
224 drawable->pBackClipRects[0].y2 = drawable->h;
225
226 depth_region = NULL;
227 for (i = 0; i < count; i++) {
228 switch (buffers[i].attachment) {
229 case __DRI_BUFFER_FRONT_LEFT:
230 rb = intel_fb->color_rb[0];
231 region_name = "dri2 front buffer";
232 break;
233
234 case __DRI_BUFFER_BACK_LEFT:
235 rb = intel_fb->color_rb[1];
236 region_name = "dri2 back buffer";
237 break;
238
239 case __DRI_BUFFER_DEPTH:
240 rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH);
241 region_name = "dri2 depth buffer";
242 break;
243
244 case __DRI_BUFFER_STENCIL:
245 rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL);
246 region_name = "dri2 stencil buffer";
247 break;
248
249 case __DRI_BUFFER_ACCUM:
250 default:
251 fprintf(stderr,
252 "unhandled buffer attach event, attacment type %d\n",
253 buffers[i].attachment);
254 return;
255 }
256
257 if (rb == NULL)
258 continue;
259
260 if (rb->region) {
261 dri_bo_flink(rb->region->buffer, &name);
262 if (name == buffers[i].name)
263 continue;
264 }
265
266 if (INTEL_DEBUG & DEBUG_DRI)
267 fprintf(stderr,
268 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
269 buffers[i].name, buffers[i].attachment,
270 buffers[i].cpp, buffers[i].pitch);
271
272 if (buffers[i].attachment == __DRI_BUFFER_STENCIL && depth_region) {
273 if (INTEL_DEBUG & DEBUG_DRI)
274 fprintf(stderr, "(reusing depth buffer as stencil)\n");
275 intel_region_reference(&region, depth_region);
276 }
277 else
278 region = intel_region_alloc_for_handle(intel, buffers[i].cpp,
279 drawable->w,
280 drawable->h,
281 buffers[i].pitch / buffers[i].cpp,
282 buffers[i].name,
283 region_name);
284
285 if (buffers[i].attachment == __DRI_BUFFER_DEPTH)
286 depth_region = region;
287
288 intel_renderbuffer_set_region(rb, region);
289 intel_region_release(&region);
290 }
291
292 driUpdateFramebufferSize(&intel->ctx, drawable);
293 }
294
295 void
296 intel_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
297 {
298 struct intel_context *intel = intel_context(ctx);
299 __DRIcontext *driContext = intel->driContext;
300 void (*old_viewport)(GLcontext *ctx, GLint x, GLint y,
301 GLsizei w, GLsizei h);
302
303 if (!driContext->driScreenPriv->dri2.enabled)
304 return;
305
306 intel_update_renderbuffers(driContext, driContext->driDrawablePriv);
307 if (driContext->driDrawablePriv != driContext->driReadablePriv)
308 intel_update_renderbuffers(driContext, driContext->driReadablePriv);
309
310 old_viewport = ctx->Driver.Viewport;
311 ctx->Driver.Viewport = NULL;
312 intel->driDrawable = driContext->driDrawablePriv;
313 intelWindowMoved(intel);
314 intel_draw_buffer(ctx, intel->ctx.DrawBuffer);
315 ctx->Driver.Viewport = old_viewport;
316 }
317
318
319 static const struct dri_debug_control debug_control[] = {
320 { "tex", DEBUG_TEXTURE},
321 { "state", DEBUG_STATE},
322 { "ioctl", DEBUG_IOCTL},
323 { "blit", DEBUG_BLIT},
324 { "mip", DEBUG_MIPTREE},
325 { "fall", DEBUG_FALLBACKS},
326 { "verb", DEBUG_VERBOSE},
327 { "bat", DEBUG_BATCH},
328 { "pix", DEBUG_PIXEL},
329 { "buf", DEBUG_BUFMGR},
330 { "reg", DEBUG_REGION},
331 { "fbo", DEBUG_FBO},
332 { "lock", DEBUG_LOCK},
333 { "sync", DEBUG_SYNC},
334 { "prim", DEBUG_PRIMS },
335 { "vert", DEBUG_VERTS },
336 { "dri", DEBUG_DRI },
337 { "dma", DEBUG_DMA },
338 { "san", DEBUG_SANITY },
339 { "sleep", DEBUG_SLEEP },
340 { "stats", DEBUG_STATS },
341 { "tile", DEBUG_TILE },
342 { "sing", DEBUG_SINGLE_THREAD },
343 { "thre", DEBUG_SINGLE_THREAD },
344 { "wm", DEBUG_WM },
345 { "urb", DEBUG_URB },
346 { "vs", DEBUG_VS },
347 { NULL, 0 }
348 };
349
350
351 static void
352 intelInvalidateState(GLcontext * ctx, GLuint new_state)
353 {
354 struct intel_context *intel = intel_context(ctx);
355
356 _swrast_InvalidateState(ctx, new_state);
357 _swsetup_InvalidateState(ctx, new_state);
358 _vbo_InvalidateState(ctx, new_state);
359 _tnl_InvalidateState(ctx, new_state);
360 _tnl_invalidate_vertex_state(ctx, new_state);
361
362 intel->NewGLState |= new_state;
363
364 if (intel->vtbl.invalidate_state)
365 intel->vtbl.invalidate_state( intel, new_state );
366 }
367
368 static void
369 intel_flush(GLcontext *ctx, GLboolean needs_mi_flush)
370 {
371 struct intel_context *intel = intel_context(ctx);
372
373 if (intel->Fallback)
374 _swrast_flush(ctx);
375
376 if (!IS_965(intel->intelScreen->deviceID))
377 INTEL_FIREVERTICES(intel);
378
379 /* Emit a flush so that any frontbuffer rendering that might have occurred
380 * lands onscreen in a timely manner, even if the X Server doesn't trigger
381 * a flush for us.
382 */
383 if (needs_mi_flush)
384 intel_batchbuffer_emit_mi_flush(intel->batch);
385
386 if (intel->batch->map != intel->batch->ptr)
387 intel_batchbuffer_flush(intel->batch);
388 }
389
390 void
391 intelFlush(GLcontext * ctx)
392 {
393 intel_flush(ctx, GL_FALSE);
394 }
395
396 static void
397 intel_glFlush(GLcontext *ctx)
398 {
399 intel_flush(ctx, GL_TRUE);
400 }
401
402 void
403 intelFinish(GLcontext * ctx)
404 {
405 struct gl_framebuffer *fb = ctx->DrawBuffer;
406 int i;
407
408 intelFlush(ctx);
409
410 for (i = 0; i < fb->_NumColorDrawBuffers; i++) {
411 struct intel_renderbuffer *irb;
412
413 irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]);
414
415 if (irb->region)
416 dri_bo_wait_rendering(irb->region->buffer);
417 }
418 if (fb->_DepthBuffer) {
419 /* XXX: Wait on buffer idle */
420 }
421 }
422
423 void
424 intelInitDriverFunctions(struct dd_function_table *functions)
425 {
426 _mesa_init_driver_functions(functions);
427
428 functions->Flush = intel_glFlush;
429 functions->Finish = intelFinish;
430 functions->GetString = intelGetString;
431 functions->UpdateState = intelInvalidateState;
432
433 functions->CopyColorTable = _swrast_CopyColorTable;
434 functions->CopyColorSubTable = _swrast_CopyColorSubTable;
435 functions->CopyConvolutionFilter1D = _swrast_CopyConvolutionFilter1D;
436 functions->CopyConvolutionFilter2D = _swrast_CopyConvolutionFilter2D;
437
438 intelInitTextureFuncs(functions);
439 intelInitStateFuncs(functions);
440 intelInitClearFuncs(functions);
441 intelInitBufferFuncs(functions);
442 intelInitPixelFuncs(functions);
443 }
444
445
446 GLboolean
447 intelInitContext(struct intel_context *intel,
448 const __GLcontextModes * mesaVis,
449 __DRIcontextPrivate * driContextPriv,
450 void *sharedContextPrivate,
451 struct dd_function_table *functions)
452 {
453 GLcontext *ctx = &intel->ctx;
454 GLcontext *shareCtx = (GLcontext *) sharedContextPrivate;
455 __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
456 intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
457 int fthrottle_mode;
458
459 if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx,
460 functions, (void *) intel)) {
461 _mesa_printf("%s: failed to init mesa context\n", __FUNCTION__);
462 return GL_FALSE;
463 }
464
465 driContextPriv->driverPrivate = intel;
466 intel->intelScreen = intelScreen;
467 intel->driScreen = sPriv;
468 intel->sarea = intelScreen->sarea;
469 intel->driContext = driContextPriv;
470
471 /* Dri stuff */
472 intel->hHWContext = driContextPriv->hHWContext;
473 intel->driFd = sPriv->fd;
474 intel->driHwLock = sPriv->lock;
475
476 driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
477 intel->driScreen->myNum,
478 IS_965(intelScreen->deviceID) ? "i965" : "i915");
479 if (intelScreen->deviceID == PCI_CHIP_I865_G)
480 intel->maxBatchSize = 4096;
481 else
482 intel->maxBatchSize = BATCH_SZ;
483
484 intel->bufmgr = intelScreen->bufmgr;
485 intel->ttm = intelScreen->ttm;
486 if (intel->ttm) {
487 int bo_reuse_mode;
488
489 bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
490 switch (bo_reuse_mode) {
491 case DRI_CONF_BO_REUSE_DISABLED:
492 break;
493 case DRI_CONF_BO_REUSE_ALL:
494 intel_bufmgr_gem_enable_reuse(intel->bufmgr);
495 break;
496 }
497 }
498
499 ctx->Const.MaxTextureMaxAnisotropy = 2.0;
500
501 /* This doesn't yet catch all non-conformant rendering, but it's a
502 * start.
503 */
504 if (getenv("INTEL_STRICT_CONFORMANCE")) {
505 intel->strict_conformance = 1;
506 }
507
508 if (intel->strict_conformance) {
509 ctx->Const.MinLineWidth = 1.0;
510 ctx->Const.MinLineWidthAA = 1.0;
511 ctx->Const.MaxLineWidth = 1.0;
512 ctx->Const.MaxLineWidthAA = 1.0;
513 ctx->Const.LineWidthGranularity = 1.0;
514 }
515 else {
516 ctx->Const.MinLineWidth = 1.0;
517 ctx->Const.MinLineWidthAA = 1.0;
518 ctx->Const.MaxLineWidth = 5.0;
519 ctx->Const.MaxLineWidthAA = 5.0;
520 ctx->Const.LineWidthGranularity = 0.5;
521 }
522
523 ctx->Const.MinPointSize = 1.0;
524 ctx->Const.MinPointSizeAA = 1.0;
525 ctx->Const.MaxPointSize = 255.0;
526 ctx->Const.MaxPointSizeAA = 3.0;
527 ctx->Const.PointSizeGranularity = 1.0;
528
529 /* reinitialize the context point state.
530 * It depend on constants in __GLcontextRec::Const
531 */
532 _mesa_init_point(ctx);
533
534 ctx->Const.MaxColorAttachments = 4; /* XXX FBO: review this */
535
536 /* Initialize the software rasterizer and helper modules. */
537 _swrast_CreateContext(ctx);
538 _vbo_CreateContext(ctx);
539 _tnl_CreateContext(ctx);
540 _swsetup_CreateContext(ctx);
541
542 /* Configure swrast to match hardware characteristics: */
543 _swrast_allow_pixel_fog(ctx, GL_FALSE);
544 _swrast_allow_vertex_fog(ctx, GL_TRUE);
545
546 intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
547 intel->hw_stipple = 1;
548
549 /* XXX FBO: this doesn't seem to be used anywhere */
550 switch (mesaVis->depthBits) {
551 case 0: /* what to do in this case? */
552 case 16:
553 intel->polygon_offset_scale = 1.0;
554 break;
555 case 24:
556 intel->polygon_offset_scale = 2.0; /* req'd to pass glean */
557 break;
558 default:
559 assert(0);
560 break;
561 }
562
563 if (IS_965(intelScreen->deviceID))
564 intel->polygon_offset_scale /= 0xffff;
565
566 intel->RenderIndex = ~0;
567
568 fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode");
569 intel->irqsEmitted = 0;
570
571 intel->do_irqs = (intel->intelScreen->irq_active &&
572 fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
573
574 intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
575
576 _math_matrix_ctr(&intel->ViewportMatrix);
577
578 if (IS_965(intelScreen->deviceID) && !intel->intelScreen->irq_active) {
579 _mesa_printf("IRQs not active. Exiting\n");
580 exit(1);
581 }
582
583 intelInitExtensions(ctx, GL_FALSE);
584
585 INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
586 if (INTEL_DEBUG & DEBUG_BUFMGR)
587 dri_bufmgr_set_debug(intel->bufmgr, GL_TRUE);
588
589 if (!sPriv->dri2.enabled)
590 intel_recreate_static_regions(intel);
591
592 intel->batch = intel_batchbuffer_alloc(intel);
593
594 intel_bufferobj_init(intel);
595 intel_fbo_init(intel);
596
597 if (intel->ctx.Mesa_DXTn) {
598 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
599 _mesa_enable_extension(ctx, "GL_S3_s3tc");
600 }
601 else if (driQueryOptionb(&intel->optionCache, "force_s3tc_enable")) {
602 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
603 }
604
605 intel->prim.primitive = ~0;
606
607 /* Force all software fallbacks */
608 if (driQueryOptionb(&intel->optionCache, "no_rast")) {
609 fprintf(stderr, "disabling 3D rasterization\n");
610 intel->no_rast = 1;
611 }
612
613 /* Disable all hardware rendering (skip emitting batches and fences/waits
614 * to the kernel)
615 */
616 intel->no_hw = getenv("INTEL_NO_HW") != NULL;
617
618 return GL_TRUE;
619 }
620
621 void
622 intelDestroyContext(__DRIcontextPrivate * driContextPriv)
623 {
624 struct intel_context *intel =
625 (struct intel_context *) driContextPriv->driverPrivate;
626
627 assert(intel); /* should never be null */
628 if (intel) {
629 GLboolean release_texture_heaps;
630
631 INTEL_FIREVERTICES(intel);
632
633 intel->vtbl.destroy(intel);
634
635 release_texture_heaps = (intel->ctx.Shared->RefCount == 1);
636 _swsetup_DestroyContext(&intel->ctx);
637 _tnl_DestroyContext(&intel->ctx);
638 _vbo_DestroyContext(&intel->ctx);
639
640 _swrast_DestroyContext(&intel->ctx);
641 intel->Fallback = 0; /* don't call _swrast_Flush later */
642
643 intel_batchbuffer_free(intel->batch);
644 intel->batch = NULL;
645
646 free(intel->prim.vb);
647 intel->prim.vb = NULL;
648 dri_bo_unreference(intel->prim.vb_bo);
649 intel->prim.vb_bo = NULL;
650
651 if (release_texture_heaps) {
652 /* This share group is about to go away, free our private
653 * texture object data.
654 */
655 if (INTEL_DEBUG & DEBUG_TEXTURE)
656 fprintf(stderr, "do something to free texture heaps\n");
657 }
658
659 intel_region_release(&intel->front_region);
660 intel_region_release(&intel->back_region);
661 intel_region_release(&intel->depth_region);
662
663 driDestroyOptionCache(&intel->optionCache);
664
665 /* free the Mesa context */
666 _mesa_free_context_data(&intel->ctx);
667 }
668 }
669
670 GLboolean
671 intelUnbindContext(__DRIcontextPrivate * driContextPriv)
672 {
673 return GL_TRUE;
674 }
675
676 GLboolean
677 intelMakeCurrent(__DRIcontextPrivate * driContextPriv,
678 __DRIdrawablePrivate * driDrawPriv,
679 __DRIdrawablePrivate * driReadPriv)
680 {
681 __DRIscreenPrivate *psp = driDrawPriv->driScreenPriv;
682
683 if (driContextPriv) {
684 struct intel_context *intel =
685 (struct intel_context *) driContextPriv->driverPrivate;
686 struct intel_framebuffer *intel_fb =
687 (struct intel_framebuffer *) driDrawPriv->driverPrivate;
688 GLframebuffer *readFb = (GLframebuffer *) driReadPriv->driverPrivate;
689
690 if (driContextPriv->driScreenPriv->dri2.enabled) {
691 intel_update_renderbuffers(driContextPriv, driDrawPriv);
692 if (driDrawPriv != driReadPriv)
693 intel_update_renderbuffers(driContextPriv, driReadPriv);
694 } else {
695 /* XXX FBO temporary fix-ups! */
696 /* if the renderbuffers don't have regions, init them from the context */
697 struct intel_renderbuffer *irbDepth
698 = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH);
699 struct intel_renderbuffer *irbStencil
700 = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL);
701
702 if (intel_fb->color_rb[0]) {
703 intel_renderbuffer_set_region(intel_fb->color_rb[0],
704 intel->front_region);
705 }
706 if (intel_fb->color_rb[1]) {
707 intel_renderbuffer_set_region(intel_fb->color_rb[1],
708 intel->back_region);
709 }
710
711 if (irbDepth) {
712 intel_renderbuffer_set_region(irbDepth, intel->depth_region);
713 }
714 if (irbStencil) {
715 intel_renderbuffer_set_region(irbStencil, intel->depth_region);
716 }
717 }
718
719 /* set GLframebuffer size to match window, if needed */
720 driUpdateFramebufferSize(&intel->ctx, driDrawPriv);
721
722 if (driReadPriv != driDrawPriv) {
723 driUpdateFramebufferSize(&intel->ctx, driReadPriv);
724 }
725
726 _mesa_make_current(&intel->ctx, &intel_fb->Base, readFb);
727
728 /* The drawbuffer won't always be updated by _mesa_make_current:
729 */
730 if (intel->ctx.DrawBuffer == &intel_fb->Base) {
731
732 if (intel->driReadDrawable != driReadPriv)
733 intel->driReadDrawable = driReadPriv;
734
735 if (intel->driDrawable != driDrawPriv) {
736 if (driDrawPriv->swap_interval == (unsigned)-1) {
737 int i;
738
739 driDrawPriv->vblFlags = (intel->intelScreen->irq_active != 0)
740 ? driGetDefaultVBlankFlags(&intel->optionCache)
741 : VBLANK_FLAG_NO_IRQ;
742
743 /* Prevent error printf if one crtc is disabled, this will
744 * be properly calculated in intelWindowMoved() next.
745 */
746 driDrawPriv->vblFlags = intelFixupVblank(intel, driDrawPriv);
747
748 (*psp->systemTime->getUST) (&intel_fb->swap_ust);
749 driDrawableInitVBlank(driDrawPriv);
750 intel_fb->vbl_waited = driDrawPriv->vblSeq;
751
752 for (i = 0; i < 2; i++) {
753 if (intel_fb->color_rb[i])
754 intel_fb->color_rb[i]->vbl_pending = driDrawPriv->vblSeq;
755 }
756 }
757 intel->driDrawable = driDrawPriv;
758 intelWindowMoved(intel);
759 }
760
761 intel_draw_buffer(&intel->ctx, &intel_fb->Base);
762 }
763 }
764 else {
765 _mesa_make_current(NULL, NULL, NULL);
766 }
767
768 return GL_TRUE;
769 }
770
771 static void
772 intelContendedLock(struct intel_context *intel, GLuint flags)
773 {
774 __DRIdrawablePrivate *dPriv = intel->driDrawable;
775 __DRIscreenPrivate *sPriv = intel->driScreen;
776 volatile drm_i915_sarea_t *sarea = intel->sarea;
777 int me = intel->hHWContext;
778
779 drmGetLock(intel->driFd, intel->hHWContext, flags);
780 intel->locked = 1;
781
782 if (INTEL_DEBUG & DEBUG_LOCK)
783 _mesa_printf("%s - got contended lock\n", __progname);
784
785 /* If the window moved, may need to set a new cliprect now.
786 *
787 * NOTE: This releases and regains the hw lock, so all state
788 * checking must be done *after* this call:
789 */
790 if (dPriv)
791 DRI_VALIDATE_DRAWABLE_INFO(sPriv, dPriv);
792
793 if (sarea && sarea->ctxOwner != me) {
794 if (INTEL_DEBUG & DEBUG_BUFMGR) {
795 fprintf(stderr, "Lost Context: sarea->ctxOwner %x me %x\n",
796 sarea->ctxOwner, me);
797 }
798 sarea->ctxOwner = me;
799 }
800
801 /* If the last consumer of the texture memory wasn't us, notify the fake
802 * bufmgr and record the new owner. We should have the memory shared
803 * between contexts of a single fake bufmgr, but this will at least make
804 * things correct for now.
805 */
806 if (!intel->ttm && sarea->texAge != intel->hHWContext) {
807 sarea->texAge = intel->hHWContext;
808 intel_bufmgr_fake_contended_lock_take(intel->bufmgr);
809 if (INTEL_DEBUG & DEBUG_BATCH)
810 intel_decode_context_reset();
811 if (INTEL_DEBUG & DEBUG_BUFMGR)
812 fprintf(stderr, "Lost Textures: sarea->texAge %x hw context %x\n",
813 sarea->ctxOwner, intel->hHWContext);
814 }
815
816 /* Drawable changed?
817 */
818 if (dPriv && intel->lastStamp != dPriv->lastStamp) {
819 intelWindowMoved(intel);
820 intel->lastStamp = dPriv->lastStamp;
821 }
822 }
823
824
825 _glthread_DECLARE_STATIC_MUTEX(lockMutex);
826
827 /* Lock the hardware and validate our state.
828 */
829 void LOCK_HARDWARE( struct intel_context *intel )
830 {
831 __DRIdrawable *dPriv = intel->driDrawable;
832 __DRIscreen *sPriv = intel->driScreen;
833 char __ret = 0;
834 struct intel_framebuffer *intel_fb = NULL;
835 struct intel_renderbuffer *intel_rb = NULL;
836
837 _glthread_LOCK_MUTEX(lockMutex);
838 assert(!intel->locked);
839 intel->locked = 1;
840
841 if (intel->driDrawable) {
842 intel_fb = intel->driDrawable->driverPrivate;
843
844 if (intel_fb)
845 intel_rb =
846 intel_get_renderbuffer(&intel_fb->Base,
847 intel_fb->Base._ColorDrawBufferIndexes[0]);
848 }
849
850 if (intel_rb && dPriv->vblFlags &&
851 !(dPriv->vblFlags & VBLANK_FLAG_NO_IRQ) &&
852 (intel_fb->vbl_waited - intel_rb->vbl_pending) > (1<<23)) {
853 drmVBlank vbl;
854
855 vbl.request.type = DRM_VBLANK_ABSOLUTE;
856
857 if ( dPriv->vblFlags & VBLANK_FLAG_SECONDARY ) {
858 vbl.request.type |= DRM_VBLANK_SECONDARY;
859 }
860
861 vbl.request.sequence = intel_rb->vbl_pending;
862 drmWaitVBlank(intel->driFd, &vbl);
863 intel_fb->vbl_waited = vbl.reply.sequence;
864 }
865
866 if (!sPriv->dri2.enabled) {
867 DRM_CAS(intel->driHwLock, intel->hHWContext,
868 (DRM_LOCK_HELD|intel->hHWContext), __ret);
869
870 if (__ret)
871 intelContendedLock( intel, 0 );
872 }
873
874
875 if (INTEL_DEBUG & DEBUG_LOCK)
876 _mesa_printf("%s - locked\n", __progname);
877 }
878
879
880 /* Unlock the hardware using the global current context
881 */
882 void UNLOCK_HARDWARE( struct intel_context *intel )
883 {
884 __DRIscreen *sPriv = intel->driScreen;
885
886 intel->vtbl.note_unlock( intel );
887 intel->locked = 0;
888
889 if (!sPriv->dri2.enabled)
890 DRM_UNLOCK(intel->driFd, intel->driHwLock, intel->hHWContext);
891
892 _glthread_UNLOCK_MUTEX(lockMutex);
893
894 if (INTEL_DEBUG & DEBUG_LOCK)
895 _mesa_printf("%s - unlocked\n", __progname);
896
897 /**
898 * Nothing should be left in batch outside of LOCK/UNLOCK which references
899 * cliprects.
900 */
901 if (intel->batch->cliprect_mode == REFERENCES_CLIPRECTS)
902 intel_batchbuffer_flush(intel->batch);
903 }
904