1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
32 #include "simple_list.h"
33 #include "extensions.h"
34 #include "framebuffer.h"
38 #include "swrast/swrast.h"
39 #include "swrast_setup/swrast_setup.h"
42 #include "tnl/t_pipeline.h"
43 #include "tnl/t_vertex.h"
45 #include "drivers/common/driverfuncs.h"
47 #include "intel_screen.h"
51 #include "intel_chipset.h"
52 #include "intel_buffers.h"
53 #include "intel_tex.h"
54 #include "intel_ioctl.h"
55 #include "intel_batchbuffer.h"
56 #include "intel_blit.h"
57 #include "intel_pixel.h"
58 #include "intel_regions.h"
59 #include "intel_buffer_objects.h"
60 #include "intel_fbo.h"
61 #include "intel_decode.h"
62 #include "intel_bufmgr_fake.h"
63 #include "intel_bufmgr_gem.h"
65 #include "drirenderbuffer.h"
68 #include "xmlpool.h" /* for symbolic values of enum-type options */
70 int INTEL_DEBUG
= (0);
73 #define need_GL_NV_point_sprite
74 #define need_GL_ARB_multisample
75 #define need_GL_ARB_point_parameters
76 #define need_GL_ARB_texture_compression
77 #define need_GL_ARB_vertex_buffer_object
78 #define need_GL_ARB_vertex_program
79 #define need_GL_ARB_window_pos
80 #define need_GL_ARB_occlusion_query
81 #define need_GL_EXT_blend_color
82 #define need_GL_EXT_blend_equation_separate
83 #define need_GL_EXT_blend_func_separate
84 #define need_GL_EXT_blend_minmax
85 #define need_GL_EXT_cull_vertex
86 #define need_GL_EXT_fog_coord
87 #define need_GL_EXT_framebuffer_object
88 #define need_GL_EXT_multi_draw_arrays
89 #define need_GL_EXT_secondary_color
90 #define need_GL_NV_vertex_program
91 #define need_GL_ATI_separate_stencil
92 #define need_GL_EXT_point_parameters
93 #define need_GL_VERSION_2_0
94 #define need_GL_VERSION_2_1
95 #define need_GL_ARB_shader_objects
96 #define need_GL_ARB_vertex_shader
98 #include "extension_helper.h"
100 #define DRIVER_DATE "20061102"
102 static const GLubyte
*
103 intelGetString(GLcontext
* ctx
, GLenum name
)
106 static char buffer
[128];
110 return (GLubyte
*) "Tungsten Graphics, Inc";
114 switch (intel_context(ctx
)->intelScreen
->deviceID
) {
116 chipset
= "Intel(R) 845G";
118 case PCI_CHIP_I830_M
:
119 chipset
= "Intel(R) 830M";
121 case PCI_CHIP_I855_GM
:
122 chipset
= "Intel(R) 852GM/855GM";
124 case PCI_CHIP_I865_G
:
125 chipset
= "Intel(R) 865G";
127 case PCI_CHIP_I915_G
:
128 chipset
= "Intel(R) 915G";
130 case PCI_CHIP_E7221_G
:
131 chipset
= "Intel (R) E7221G (i915)";
133 case PCI_CHIP_I915_GM
:
134 chipset
= "Intel(R) 915GM";
136 case PCI_CHIP_I945_G
:
137 chipset
= "Intel(R) 945G";
139 case PCI_CHIP_I945_GM
:
140 chipset
= "Intel(R) 945GM";
142 case PCI_CHIP_I945_GME
:
143 chipset
= "Intel(R) 945GME";
146 chipset
= "Intel(R) G33";
149 chipset
= "Intel(R) Q35";
152 chipset
= "Intel(R) Q33";
154 case PCI_CHIP_I965_Q
:
155 chipset
= "Intel(R) 965Q";
157 case PCI_CHIP_I965_G
:
158 case PCI_CHIP_I965_G_1
:
159 chipset
= "Intel(R) 965G";
161 case PCI_CHIP_I946_GZ
:
162 chipset
= "Intel(R) 946GZ";
164 case PCI_CHIP_I965_GM
:
165 chipset
= "Intel(R) 965GM";
167 case PCI_CHIP_I965_GME
:
168 chipset
= "Intel(R) 965GME/GLE";
170 case PCI_CHIP_IGD_GM
:
171 chipset
= "Intel(R) Integrated Graphics Device";
174 chipset
= "Unknown Intel Chipset";
178 (void) driGetRendererString(buffer
, chipset
, DRIVER_DATE
, 0);
179 return (GLubyte
*) buffer
;
187 * Extension strings exported by the intel driver.
190 * It appears that ARB_texture_env_crossbar has "disappeared" compared to the
191 * old i830-specific driver.
193 static const struct dri_extension card_extensions
[] = {
194 {"GL_ARB_multisample", GL_ARB_multisample_functions
},
195 {"GL_ARB_multitexture", NULL
},
196 {"GL_ARB_point_parameters", GL_ARB_point_parameters_functions
},
197 {"GL_NV_point_sprite", GL_NV_point_sprite_functions
},
198 {"GL_ARB_texture_border_clamp", NULL
},
199 {"GL_ARB_texture_compression", GL_ARB_texture_compression_functions
},
200 {"GL_ARB_texture_cube_map", NULL
},
201 {"GL_ARB_texture_env_add", NULL
},
202 {"GL_ARB_texture_env_combine", NULL
},
203 {"GL_ARB_texture_env_dot3", NULL
},
204 {"GL_ARB_texture_mirrored_repeat", NULL
},
205 {"GL_ARB_texture_non_power_of_two", NULL
},
206 {"GL_ARB_texture_rectangle", NULL
},
207 {"GL_NV_texture_rectangle", NULL
},
208 {"GL_EXT_texture_rectangle", NULL
},
209 {"GL_ARB_point_parameters", NULL
},
210 {"GL_ARB_vertex_buffer_object", GL_ARB_vertex_buffer_object_functions
},
211 {"GL_ARB_vertex_program", GL_ARB_vertex_program_functions
},
212 {"GL_ARB_window_pos", GL_ARB_window_pos_functions
},
213 {"GL_EXT_blend_color", GL_EXT_blend_color_functions
},
214 {"GL_EXT_blend_equation_separate",
215 GL_EXT_blend_equation_separate_functions
},
216 {"GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions
},
217 {"GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions
},
218 {"GL_EXT_blend_logic_op", NULL
},
219 {"GL_EXT_blend_subtract", NULL
},
220 {"GL_EXT_cull_vertex", GL_EXT_cull_vertex_functions
},
221 {"GL_EXT_fog_coord", GL_EXT_fog_coord_functions
},
222 {"GL_EXT_multi_draw_arrays", GL_EXT_multi_draw_arrays_functions
},
223 {"GL_ATI_separate_stencil", GL_ATI_separate_stencil_functions
},
224 #if 1 /* XXX FBO temporary? */
225 {"GL_EXT_packed_depth_stencil", NULL
},
227 {"GL_EXT_secondary_color", GL_EXT_secondary_color_functions
},
228 {"GL_EXT_stencil_wrap", NULL
},
229 {"GL_EXT_texture_edge_clamp", NULL
},
230 {"GL_EXT_texture_env_combine", NULL
},
231 {"GL_EXT_texture_env_dot3", NULL
},
232 {"GL_EXT_texture_filter_anisotropic", NULL
},
233 {"GL_EXT_texture_lod_bias", NULL
},
234 {"GL_3DFX_texture_compression_FXT1", NULL
},
235 {"GL_APPLE_client_storage", NULL
},
236 {"GL_MESA_pack_invert", NULL
},
237 {"GL_MESA_ycbcr_texture", NULL
},
238 {"GL_NV_blend_square", NULL
},
239 {"GL_NV_vertex_program", GL_NV_vertex_program_functions
},
240 {"GL_NV_vertex_program1_1", NULL
},
241 { "GL_SGIS_generate_mipmap", NULL
},
245 static const struct dri_extension brw_extensions
[] = {
246 { "GL_ARB_shading_language_100", GL_VERSION_2_0_functions
},
247 { "GL_ARB_shading_language_120", GL_VERSION_2_1_functions
},
248 { "GL_ARB_shader_objects", GL_ARB_shader_objects_functions
},
249 { "GL_ARB_vertex_shader", GL_ARB_vertex_shader_functions
},
250 { "GL_ARB_point_sprite", NULL
},
251 { "GL_ARB_fragment_shader", NULL
},
252 { "GL_ARB_draw_buffers", NULL
},
253 { "GL_ARB_depth_texture", NULL
},
254 { "GL_ARB_fragment_program", NULL
},
255 { "GL_ARB_shadow", NULL
},
256 { "GL_EXT_shadow_funcs", NULL
},
257 /* ARB extn won't work if not enabled */
258 { "GL_SGIX_depth_texture", NULL
},
259 { "GL_ARB_texture_env_crossbar", NULL
},
260 { "GL_EXT_texture_sRGB", NULL
},
264 static const struct dri_extension arb_oc_extensions
[] = {
265 {"GL_ARB_occlusion_query", GL_ARB_occlusion_query_functions
},
269 static const struct dri_extension ttm_extensions
[] = {
270 {"GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions
},
271 {"GL_ARB_pixel_buffer_object", NULL
},
276 * Initializes potential list of extensions if ctx == NULL, or actually enables
277 * extensions for a context.
279 void intelInitExtensions(GLcontext
*ctx
, GLboolean enable_imaging
)
281 struct intel_context
*intel
= ctx
?intel_context(ctx
):NULL
;
283 /* Disable imaging extension until convolution is working in teximage paths.
285 enable_imaging
= GL_FALSE
;
287 driInitExtensions(ctx
, card_extensions
, enable_imaging
);
289 if (intel
== NULL
|| intel
->ttm
)
290 driInitExtensions(ctx
, ttm_extensions
, GL_FALSE
);
293 (IS_965(intel
->intelScreen
->deviceID
) &&
294 intel
->intelScreen
->drmMinor
>= 8))
295 driInitExtensions(ctx
, arb_oc_extensions
, GL_FALSE
);
297 if (intel
== NULL
|| IS_965(intel
->intelScreen
->deviceID
))
298 driInitExtensions(ctx
, brw_extensions
, GL_FALSE
);
301 static const struct dri_debug_control debug_control
[] = {
302 { "tex", DEBUG_TEXTURE
},
303 { "state", DEBUG_STATE
},
304 { "ioctl", DEBUG_IOCTL
},
305 { "blit", DEBUG_BLIT
},
306 { "mip", DEBUG_MIPTREE
},
307 { "fall", DEBUG_FALLBACKS
},
308 { "verb", DEBUG_VERBOSE
},
309 { "bat", DEBUG_BATCH
},
310 { "pix", DEBUG_PIXEL
},
311 { "buf", DEBUG_BUFMGR
},
312 { "reg", DEBUG_REGION
},
314 { "lock", DEBUG_LOCK
},
315 { "sync", DEBUG_SYNC
},
316 { "prim", DEBUG_PRIMS
},
317 { "vert", DEBUG_VERTS
},
318 { "dri", DEBUG_DRI
},
319 { "dma", DEBUG_DMA
},
320 { "san", DEBUG_SANITY
},
321 { "sleep", DEBUG_SLEEP
},
322 { "stats", DEBUG_STATS
},
323 { "tile", DEBUG_TILE
},
324 { "sing", DEBUG_SINGLE_THREAD
},
325 { "thre", DEBUG_SINGLE_THREAD
},
327 { "urb", DEBUG_URB
},
334 intelInvalidateState(GLcontext
* ctx
, GLuint new_state
)
336 struct intel_context
*intel
= intel_context(ctx
);
338 _swrast_InvalidateState(ctx
, new_state
);
339 _swsetup_InvalidateState(ctx
, new_state
);
340 _vbo_InvalidateState(ctx
, new_state
);
341 _tnl_InvalidateState(ctx
, new_state
);
342 _tnl_invalidate_vertex_state(ctx
, new_state
);
344 intel
->NewGLState
|= new_state
;
346 if (intel
->vtbl
.invalidate_state
)
347 intel
->vtbl
.invalidate_state( intel
, new_state
);
352 intelFlush(GLcontext
* ctx
)
354 struct intel_context
*intel
= intel_context(ctx
);
359 if (!IS_965(intel
->intelScreen
->deviceID
))
360 INTEL_FIREVERTICES(intel
);
362 if (intel
->batch
->map
!= intel
->batch
->ptr
)
363 intel_batchbuffer_flush(intel
->batch
);
367 intelFinish(GLcontext
* ctx
)
369 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
374 for (i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
375 struct intel_renderbuffer
*irb
;
377 irb
= intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
380 dri_bo_wait_rendering(irb
->region
->buffer
);
382 if (fb
->_DepthBuffer
) {
383 /* XXX: Wait on buffer idle */
388 intelBeginQuery(GLcontext
*ctx
, GLenum target
, struct gl_query_object
*q
)
390 struct intel_context
*intel
= intel_context( ctx
);
391 struct drm_i915_mmio io
= {
392 .read_write
= I915_MMIO_READ
,
393 .reg
= MMIO_REGS_PS_DEPTH_COUNT
,
397 intelFinish(&intel
->ctx
);
398 drmCommandWrite(intel
->driFd
, DRM_I915_MMIO
, &io
, sizeof(io
));
402 intelEndQuery(GLcontext
*ctx
, GLenum target
, struct gl_query_object
*q
)
404 struct intel_context
*intel
= intel_context( ctx
);
406 struct drm_i915_mmio io
= {
407 .read_write
= I915_MMIO_READ
,
408 .reg
= MMIO_REGS_PS_DEPTH_COUNT
,
411 intelFinish(&intel
->ctx
);
412 drmCommandWrite(intel
->driFd
, DRM_I915_MMIO
, &io
, sizeof(io
));
413 q
->Result
= tmp
- q
->Result
;
418 /** Driver-specific fence emit implementation for the fake memory manager. */
420 intel_fence_emit(void *private)
422 struct intel_context
*intel
= (struct intel_context
*)private;
425 /* XXX: Need to emit a flush, if we haven't already (at least with the
426 * current batchbuffer implementation, we have).
429 fence
= intelEmitIrqLocked(intel
);
434 /** Driver-specific fence wait implementation for the fake memory manager. */
436 intel_fence_wait(void *private, unsigned int cookie
)
438 struct intel_context
*intel
= (struct intel_context
*)private;
440 intelWaitIrq(intel
, cookie
);
446 intel_init_bufmgr(struct intel_context
*intel
)
448 intelScreenPrivate
*intelScreen
= intel
->intelScreen
;
449 GLboolean gem_disable
= getenv("INTEL_NO_GEM") != NULL
;
450 GLboolean gem_supported
;
452 /* If we've got a new enough DDX that's initializing GEM and giving us
453 * object handles for the shared buffers, use that.
455 intel
->ttm
= GL_FALSE
;
456 if (intel
->intelScreen
->driScrnPriv
->dri2
.enabled
)
457 gem_supported
= GL_TRUE
;
458 else if (intel
->intelScreen
->driScrnPriv
->ddx_version
.minor
>= 9 &&
459 intel
->intelScreen
->drmMinor
>= 11 &&
460 intel
->intelScreen
->front
.bo_handle
!= -1)
461 gem_supported
= GL_TRUE
;
463 gem_supported
= GL_FALSE
;
465 if (!gem_disable
&& gem_supported
) {
467 intel
->bufmgr
= intel_bufmgr_gem_init(intel
->driFd
,
469 if (intel
->bufmgr
!= NULL
)
470 intel
->ttm
= GL_TRUE
;
472 bo_reuse_mode
= driQueryOptioni(&intel
->optionCache
, "bo_reuse");
473 switch (bo_reuse_mode
) {
474 case DRI_CONF_BO_REUSE_DISABLED
:
476 case DRI_CONF_BO_REUSE_ALL
:
477 intel_gem_enable_bo_reuse(intel
->bufmgr
);
481 /* Otherwise, use the classic buffer manager. */
482 if (intel
->bufmgr
== NULL
) {
484 fprintf(stderr
, "GEM disabled. Using classic.\n");
486 fprintf(stderr
, "Failed to initialize GEM. "
487 "Falling back to classic.\n");
490 if (intelScreen
->tex
.size
== 0) {
491 fprintf(stderr
, "[%s:%u] Error initializing buffer manager.\n",
496 intel
->bufmgr
= dri_bufmgr_fake_init(intelScreen
->tex
.offset
,
497 intelScreen
->tex
.map
,
498 intelScreen
->tex
.size
,
504 /* XXX bufmgr should be per-screen, not per-context */
505 intelScreen
->ttm
= intel
->ttm
;
511 intelInitDriverFunctions(struct dd_function_table
*functions
)
513 _mesa_init_driver_functions(functions
);
515 functions
->Flush
= intelFlush
;
516 functions
->Finish
= intelFinish
;
517 functions
->GetString
= intelGetString
;
518 functions
->UpdateState
= intelInvalidateState
;
520 functions
->CopyColorTable
= _swrast_CopyColorTable
;
521 functions
->CopyColorSubTable
= _swrast_CopyColorSubTable
;
522 functions
->CopyConvolutionFilter1D
= _swrast_CopyConvolutionFilter1D
;
523 functions
->CopyConvolutionFilter2D
= _swrast_CopyConvolutionFilter2D
;
525 functions
->BeginQuery
= intelBeginQuery
;
526 functions
->EndQuery
= intelEndQuery
;
528 intelInitTextureFuncs(functions
);
529 intelInitStateFuncs(functions
);
530 intelInitBufferFuncs(functions
);
535 intelInitContext(struct intel_context
*intel
,
536 const __GLcontextModes
* mesaVis
,
537 __DRIcontextPrivate
* driContextPriv
,
538 void *sharedContextPrivate
,
539 struct dd_function_table
*functions
)
541 GLcontext
*ctx
= &intel
->ctx
;
542 GLcontext
*shareCtx
= (GLcontext
*) sharedContextPrivate
;
543 __DRIscreenPrivate
*sPriv
= driContextPriv
->driScreenPriv
;
544 intelScreenPrivate
*intelScreen
= (intelScreenPrivate
*) sPriv
->private;
545 volatile struct drm_i915_sarea
*saPriv
= (struct drm_i915_sarea
*)
546 (((GLubyte
*) sPriv
->pSAREA
) + intelScreen
->sarea_priv_offset
);
549 if (!_mesa_initialize_context(&intel
->ctx
, mesaVis
, shareCtx
,
550 functions
, (void *) intel
)) {
551 _mesa_printf("%s: failed to init mesa context\n", __FUNCTION__
);
555 driContextPriv
->driverPrivate
= intel
;
556 intel
->intelScreen
= intelScreen
;
557 intel
->driScreen
= sPriv
;
558 intel
->sarea
= saPriv
;
561 intel
->hHWContext
= driContextPriv
->hHWContext
;
562 intel
->driFd
= sPriv
->fd
;
563 intel
->driHwLock
= sPriv
->lock
;
565 intel
->width
= intelScreen
->width
;
566 intel
->height
= intelScreen
->height
;
568 driParseConfigFiles(&intel
->optionCache
, &intelScreen
->optionCache
,
569 intel
->driScreen
->myNum
,
570 IS_965(intelScreen
->deviceID
) ? "i965" : "i915");
571 if (intelScreen
->deviceID
== PCI_CHIP_I865_G
)
572 intel
->maxBatchSize
= 4096;
574 intel
->maxBatchSize
= BATCH_SZ
;
576 if (!intel_init_bufmgr(intel
))
579 ctx
->Const
.MaxTextureMaxAnisotropy
= 2.0;
581 /* This doesn't yet catch all non-conformant rendering, but it's a
584 if (getenv("INTEL_STRICT_CONFORMANCE")) {
585 intel
->strict_conformance
= 1;
588 if (intel
->strict_conformance
) {
589 ctx
->Const
.MinLineWidth
= 1.0;
590 ctx
->Const
.MinLineWidthAA
= 1.0;
591 ctx
->Const
.MaxLineWidth
= 1.0;
592 ctx
->Const
.MaxLineWidthAA
= 1.0;
593 ctx
->Const
.LineWidthGranularity
= 1.0;
596 ctx
->Const
.MinLineWidth
= 1.0;
597 ctx
->Const
.MinLineWidthAA
= 1.0;
598 ctx
->Const
.MaxLineWidth
= 5.0;
599 ctx
->Const
.MaxLineWidthAA
= 5.0;
600 ctx
->Const
.LineWidthGranularity
= 0.5;
603 ctx
->Const
.MinPointSize
= 1.0;
604 ctx
->Const
.MinPointSizeAA
= 1.0;
605 ctx
->Const
.MaxPointSize
= 255.0;
606 ctx
->Const
.MaxPointSizeAA
= 3.0;
607 ctx
->Const
.PointSizeGranularity
= 1.0;
609 /* reinitialize the context point state.
610 * It depend on constants in __GLcontextRec::Const
612 _mesa_init_point(ctx
);
614 ctx
->Const
.MaxColorAttachments
= 4; /* XXX FBO: review this */
616 /* Initialize the software rasterizer and helper modules. */
617 _swrast_CreateContext(ctx
);
618 _vbo_CreateContext(ctx
);
619 _tnl_CreateContext(ctx
);
620 _swsetup_CreateContext(ctx
);
622 /* Configure swrast to match hardware characteristics: */
623 _swrast_allow_pixel_fog(ctx
, GL_FALSE
);
624 _swrast_allow_vertex_fog(ctx
, GL_TRUE
);
626 intel
->hw_stencil
= mesaVis
->stencilBits
&& mesaVis
->depthBits
== 24;
627 intel
->hw_stipple
= 1;
629 /* XXX FBO: this doesn't seem to be used anywhere */
630 switch (mesaVis
->depthBits
) {
631 case 0: /* what to do in this case? */
633 intel
->polygon_offset_scale
= 1.0;
636 intel
->polygon_offset_scale
= 2.0; /* req'd to pass glean */
643 if (IS_965(intelScreen
->deviceID
))
644 intel
->polygon_offset_scale
/= 0xffff;
646 intel
->RenderIndex
= ~0;
648 fthrottle_mode
= driQueryOptioni(&intel
->optionCache
, "fthrottle_mode");
649 intel
->irqsEmitted
= 0;
651 intel
->do_irqs
= (intel
->intelScreen
->irq_active
&&
652 fthrottle_mode
== DRI_CONF_FTHROTTLE_IRQS
);
654 intel
->do_usleeps
= (fthrottle_mode
== DRI_CONF_FTHROTTLE_USLEEPS
);
656 _math_matrix_ctr(&intel
->ViewportMatrix
);
658 if (IS_965(intelScreen
->deviceID
) && !intel
->intelScreen
->irq_active
) {
659 _mesa_printf("IRQs not active. Exiting\n");
663 intelInitExtensions(ctx
, GL_FALSE
);
665 INTEL_DEBUG
= driParseDebugString(getenv("INTEL_DEBUG"), debug_control
);
666 if (INTEL_DEBUG
& DEBUG_BUFMGR
)
667 dri_bufmgr_set_debug(intel
->bufmgr
, GL_TRUE
);
669 if (!sPriv
->dri2
.enabled
)
670 intel_recreate_static_regions(intel
);
672 intel
->batch
= intel_batchbuffer_alloc(intel
);
674 intel_bufferobj_init(intel
);
675 intel_fbo_init(intel
);
677 if (intel
->ctx
.Mesa_DXTn
) {
678 _mesa_enable_extension(ctx
, "GL_EXT_texture_compression_s3tc");
679 _mesa_enable_extension(ctx
, "GL_S3_s3tc");
681 else if (driQueryOptionb(&intel
->optionCache
, "force_s3tc_enable")) {
682 _mesa_enable_extension(ctx
, "GL_EXT_texture_compression_s3tc");
685 intel
->prim
.primitive
= ~0;
687 /* Force all software fallbacks */
688 if (driQueryOptionb(&intel
->optionCache
, "no_rast")) {
689 fprintf(stderr
, "disabling 3D rasterization\n");
690 FALLBACK(intel
, INTEL_FALLBACK_USER
, 1);
694 /* Disable all hardware rendering (skip emitting batches and fences/waits
697 intel
->no_hw
= getenv("INTEL_NO_HW") != NULL
;
703 intelDestroyContext(__DRIcontextPrivate
* driContextPriv
)
705 struct intel_context
*intel
=
706 (struct intel_context
*) driContextPriv
->driverPrivate
;
708 assert(intel
); /* should never be null */
710 GLboolean release_texture_heaps
;
712 INTEL_FIREVERTICES(intel
);
714 intel
->vtbl
.destroy(intel
);
716 release_texture_heaps
= (intel
->ctx
.Shared
->RefCount
== 1);
717 _swsetup_DestroyContext(&intel
->ctx
);
718 _tnl_DestroyContext(&intel
->ctx
);
719 _vbo_DestroyContext(&intel
->ctx
);
721 _swrast_DestroyContext(&intel
->ctx
);
722 intel
->Fallback
= 0; /* don't call _swrast_Flush later */
724 intel_batchbuffer_free(intel
->batch
);
726 if (release_texture_heaps
) {
727 /* This share group is about to go away, free our private
728 * texture object data.
730 if (INTEL_DEBUG
& DEBUG_TEXTURE
)
731 fprintf(stderr
, "do something to free texture heaps\n");
734 /* free the Mesa context */
735 _mesa_free_context_data(&intel
->ctx
);
737 dri_bufmgr_destroy(intel
->bufmgr
);
742 intelUnbindContext(__DRIcontextPrivate
* driContextPriv
)
748 intelMakeCurrent(__DRIcontextPrivate
* driContextPriv
,
749 __DRIdrawablePrivate
* driDrawPriv
,
750 __DRIdrawablePrivate
* driReadPriv
)
752 __DRIscreenPrivate
*psp
= driDrawPriv
->driScreenPriv
;
754 if (driContextPriv
) {
755 struct intel_context
*intel
=
756 (struct intel_context
*) driContextPriv
->driverPrivate
;
757 struct intel_framebuffer
*intel_fb
=
758 (struct intel_framebuffer
*) driDrawPriv
->driverPrivate
;
759 GLframebuffer
*readFb
= (GLframebuffer
*) driReadPriv
->driverPrivate
;
762 /* XXX FBO temporary fix-ups! */
763 /* if the renderbuffers don't have regions, init them from the context */
764 if (!driContextPriv
->driScreenPriv
->dri2
.enabled
) {
765 struct intel_renderbuffer
*irbDepth
766 = intel_get_renderbuffer(&intel_fb
->Base
, BUFFER_DEPTH
);
767 struct intel_renderbuffer
*irbStencil
768 = intel_get_renderbuffer(&intel_fb
->Base
, BUFFER_STENCIL
);
770 if (intel_fb
->color_rb
[0]) {
771 intel_renderbuffer_set_region(intel_fb
->color_rb
[0],
772 intel
->front_region
);
774 if (intel_fb
->color_rb
[1]) {
775 intel_renderbuffer_set_region(intel_fb
->color_rb
[1],
779 if (intel_fb
->color_rb
[2]) {
780 intel_renderbuffer_set_region(intel_fb
->color_rb
[2],
781 intel
->third_region
);
785 intel_renderbuffer_set_region(irbDepth
, intel
->depth_region
);
788 intel_renderbuffer_set_region(irbStencil
, intel
->depth_region
);
792 /* set GLframebuffer size to match window, if needed */
793 driUpdateFramebufferSize(&intel
->ctx
, driDrawPriv
);
795 if (driReadPriv
!= driDrawPriv
) {
796 driUpdateFramebufferSize(&intel
->ctx
, driReadPriv
);
799 _mesa_make_current(&intel
->ctx
, &intel_fb
->Base
, readFb
);
801 /* The drawbuffer won't always be updated by _mesa_make_current:
803 if (intel
->ctx
.DrawBuffer
== &intel_fb
->Base
) {
805 if (intel
->driReadDrawable
!= driReadPriv
)
806 intel
->driReadDrawable
= driReadPriv
;
808 if (intel
->driDrawable
!= driDrawPriv
) {
809 if (driDrawPriv
->swap_interval
== (unsigned)-1) {
812 driDrawPriv
->vblFlags
= (intel
->intelScreen
->irq_active
!= 0)
813 ? driGetDefaultVBlankFlags(&intel
->optionCache
)
814 : VBLANK_FLAG_NO_IRQ
;
816 (*psp
->systemTime
->getUST
) (&intel_fb
->swap_ust
);
817 driDrawableInitVBlank(driDrawPriv
);
818 intel_fb
->vbl_waited
= driDrawPriv
->vblSeq
;
820 for (i
= 0; i
< (intel
->intelScreen
->third
.handle
? 3 : 2); i
++) {
821 if (intel_fb
->color_rb
[i
])
822 intel_fb
->color_rb
[i
]->vbl_pending
= driDrawPriv
->vblSeq
;
825 intel
->driDrawable
= driDrawPriv
;
826 intelWindowMoved(intel
);
829 intel_draw_buffer(&intel
->ctx
, &intel_fb
->Base
);
833 _mesa_make_current(NULL
, NULL
, NULL
);
840 intelContendedLock(struct intel_context
*intel
, GLuint flags
)
842 __DRIdrawablePrivate
*dPriv
= intel
->driDrawable
;
843 __DRIscreenPrivate
*sPriv
= intel
->driScreen
;
844 volatile struct drm_i915_sarea
*sarea
= intel
->sarea
;
845 int me
= intel
->hHWContext
;
847 drmGetLock(intel
->driFd
, intel
->hHWContext
, flags
);
850 if (INTEL_DEBUG
& DEBUG_LOCK
)
851 _mesa_printf("%s - got contended lock\n", __progname
);
853 /* If the window moved, may need to set a new cliprect now.
855 * NOTE: This releases and regains the hw lock, so all state
856 * checking must be done *after* this call:
859 DRI_VALIDATE_DRAWABLE_INFO(sPriv
, dPriv
);
861 if (sarea
&& sarea
->ctxOwner
!= me
) {
862 if (INTEL_DEBUG
& DEBUG_BUFMGR
) {
863 fprintf(stderr
, "Lost Context: sarea->ctxOwner %x me %x\n",
864 sarea
->ctxOwner
, me
);
866 sarea
->ctxOwner
= me
;
869 /* If the last consumer of the texture memory wasn't us, notify the fake
870 * bufmgr and record the new owner. We should have the memory shared
871 * between contexts of a single fake bufmgr, but this will at least make
872 * things correct for now.
874 if (!intel
->ttm
&& sarea
->texAge
!= intel
->hHWContext
) {
875 sarea
->texAge
= intel
->hHWContext
;
876 dri_bufmgr_fake_contended_lock_take(intel
->bufmgr
);
877 if (INTEL_DEBUG
& DEBUG_BATCH
)
878 intel_decode_context_reset();
879 if (INTEL_DEBUG
& DEBUG_BUFMGR
)
880 fprintf(stderr
, "Lost Textures: sarea->texAge %x hw context %x\n",
881 sarea
->ctxOwner
, intel
->hHWContext
);
884 if (sarea
->width
!= intel
->width
|| sarea
->height
!= intel
->height
) {
885 int numClipRects
= intel
->numClipRects
;
888 * FIXME: Really only need to do this when drawing to a
889 * common back- or front buffer.
893 * This will essentially drop the outstanding batchbuffer on
896 intel
->numClipRects
= 0;
899 _swrast_flush(&intel
->ctx
);
901 if (!IS_965(intel
->intelScreen
->deviceID
))
902 INTEL_FIREVERTICES(intel
);
904 if (intel
->batch
->map
!= intel
->batch
->ptr
)
905 intel_batchbuffer_flush(intel
->batch
);
907 intel
->numClipRects
= numClipRects
;
909 /* force window update */
910 intel
->lastStamp
= 0;
912 intel
->width
= sarea
->width
;
913 intel
->height
= sarea
->height
;
918 if (dPriv
&& intel
->lastStamp
!= dPriv
->lastStamp
) {
919 intelWindowMoved(intel
);
920 intel
->lastStamp
= dPriv
->lastStamp
;
925 _glthread_DECLARE_STATIC_MUTEX(lockMutex
);
927 /* Lock the hardware and validate our state.
929 void LOCK_HARDWARE( struct intel_context
*intel
)
931 __DRIdrawable
*dPriv
= intel
->driDrawable
;
932 __DRIscreen
*sPriv
= intel
->driScreen
;
934 struct intel_framebuffer
*intel_fb
= NULL
;
935 struct intel_renderbuffer
*intel_rb
= NULL
;
937 _glthread_LOCK_MUTEX(lockMutex
);
938 assert(!intel
->locked
);
941 if (intel
->driDrawable
) {
942 intel_fb
= intel
->driDrawable
->driverPrivate
;
946 intel_get_renderbuffer(&intel_fb
->Base
,
947 intel_fb
->Base
._ColorDrawBufferIndexes
[0]);
950 if (intel_rb
&& dPriv
->vblFlags
&&
951 !(dPriv
->vblFlags
& VBLANK_FLAG_NO_IRQ
) &&
952 (intel_fb
->vbl_waited
- intel_rb
->vbl_pending
) > (1<<23)) {
955 vbl
.request
.type
= DRM_VBLANK_ABSOLUTE
;
957 if ( dPriv
->vblFlags
& VBLANK_FLAG_SECONDARY
) {
958 vbl
.request
.type
|= DRM_VBLANK_SECONDARY
;
961 vbl
.request
.sequence
= intel_rb
->vbl_pending
;
962 drmWaitVBlank(intel
->driFd
, &vbl
);
963 intel_fb
->vbl_waited
= vbl
.reply
.sequence
;
966 DRM_CAS(intel
->driHwLock
, intel
->hHWContext
,
967 (DRM_LOCK_HELD
|intel
->hHWContext
), __ret
);
969 if (sPriv
->dri2
.enabled
) {
971 drmGetLock(intel
->driFd
, intel
->hHWContext
, 0);
972 if (__driParseEvents(dPriv
->driContextPriv
, dPriv
)) {
973 intelWindowMoved(intel
);
974 intel_draw_buffer(&intel
->ctx
, intel
->ctx
.DrawBuffer
);
977 intelContendedLock( intel
, 0 );
981 if (INTEL_DEBUG
& DEBUG_LOCK
)
982 _mesa_printf("%s - locked\n", __progname
);
986 /* Unlock the hardware using the global current context
988 void UNLOCK_HARDWARE( struct intel_context
*intel
)
990 intel
->vtbl
.note_unlock( intel
);
993 DRM_UNLOCK(intel
->driFd
, intel
->driHwLock
, intel
->hHWContext
);
995 _glthread_UNLOCK_MUTEX(lockMutex
);
997 if (INTEL_DEBUG
& DEBUG_LOCK
)
998 _mesa_printf("%s - unlocked\n", __progname
);
1001 * Nothing should be left in batch outside of LOCK/UNLOCK which references
1004 assert(intel
->batch
->cliprect_mode
!= REFERENCES_CLIPRECTS
);