src/mesa/drivers/dri/intel/intel_context.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/glheader.h"
  30 #include "main/context.h"
  31 #include "main/arrayobj.h"
  32 #include "main/extensions.h"
  33 #include "main/framebuffer.h"
  34 #include "main/imports.h"
  35 #include "main/points.h"
  36
  37 #include "swrast/swrast.h"
  38 #include "swrast_setup/swrast_setup.h"
  39 #include "tnl/tnl.h"
  40 #include "drivers/common/driverfuncs.h"
  41 #include "drivers/common/meta.h"
  42
  43 #include "i830_dri.h"
  44
  45 #include "intel_chipset.h"
  46 #include "intel_buffers.h"
  47 #include "intel_tex.h"
  48 #include "intel_batchbuffer.h"
  49 #include "intel_clear.h"
  50 #include "intel_extensions.h"
  51 #include "intel_pixel.h"
  52 #include "intel_regions.h"
  53 #include "intel_buffer_objects.h"
  54 #include "intel_fbo.h"
  55 #include "intel_decode.h"
  56 #include "intel_bufmgr.h"
  57 #include "intel_screen.h"
  58 #include "intel_swapbuffers.h"
  59
  60 #include "drirenderbuffer.h"
  61 #include "vblank.h"
  62 #include "utils.h"
  63 #include "xmlpool.h"            /* for symbolic values of enum-type options */
  64
  65
  66 #ifndef INTEL_DEBUG
  67 int INTEL_DEBUG = (0);
  68 #endif
  69
  70
  71 #define DRIVER_DATE                     "20091221 DEVELOPMENT"
  72 #define DRIVER_DATE_GEM                 "GEM " DRIVER_DATE
  73
  74
  75 static void intel_flush(GLcontext *ctx, GLboolean needs_mi_flush);
  76
  77 static const GLubyte *
  78 intelGetString(GLcontext * ctx, GLenum name)
  79 {
  80    const struct intel_context *const intel = intel_context(ctx);
  81    const char *chipset;
  82    static char buffer[128];
  83
  84    switch (name) {
  85    case GL_VENDOR:
  86       return (GLubyte *) "Tungsten Graphics, Inc";
  87       break;
  88
  89    case GL_RENDERER:
  90       switch (intel->intelScreen->deviceID) {
  91       case PCI_CHIP_845_G:
  92          chipset = "Intel(R) 845G";
  93          break;
  94       case PCI_CHIP_I830_M:
  95          chipset = "Intel(R) 830M";
  96          break;
  97       case PCI_CHIP_I855_GM:
  98          chipset = "Intel(R) 852GM/855GM";
  99          break;
 100       case PCI_CHIP_I865_G:
 101          chipset = "Intel(R) 865G";
 102          break;
 103       case PCI_CHIP_I915_G:
 104          chipset = "Intel(R) 915G";
 105          break;
 106       case PCI_CHIP_E7221_G:
 107          chipset = "Intel (R) E7221G (i915)";
 108          break;
 109       case PCI_CHIP_I915_GM:
 110          chipset = "Intel(R) 915GM";
 111          break;
 112       case PCI_CHIP_I945_G:
 113          chipset = "Intel(R) 945G";
 114          break;
 115       case PCI_CHIP_I945_GM:
 116          chipset = "Intel(R) 945GM";
 117          break;
 118       case PCI_CHIP_I945_GME:
 119          chipset = "Intel(R) 945GME";
 120          break;
 121       case PCI_CHIP_G33_G:
 122          chipset = "Intel(R) G33";
 123          break;
 124       case PCI_CHIP_Q35_G:
 125          chipset = "Intel(R) Q35";
 126          break;
 127       case PCI_CHIP_Q33_G:
 128          chipset = "Intel(R) Q33";
 129          break;
 130       case PCI_CHIP_IGD_GM:
 131       case PCI_CHIP_IGD_G:
 132          chipset = "Intel(R) IGD";
 133          break;
 134       case PCI_CHIP_I965_Q:
 135          chipset = "Intel(R) 965Q";
 136          break;
 137       case PCI_CHIP_I965_G:
 138       case PCI_CHIP_I965_G_1:
 139          chipset = "Intel(R) 965G";
 140          break;
 141       case PCI_CHIP_I946_GZ:
 142          chipset = "Intel(R) 946GZ";
 143          break;
 144       case PCI_CHIP_I965_GM:
 145          chipset = "Intel(R) 965GM";
 146          break;
 147       case PCI_CHIP_I965_GME:
 148          chipset = "Intel(R) 965GME/GLE";
 149          break;
 150       case PCI_CHIP_GM45_GM:
 151          chipset = "Mobile Intel® GM45 Express Chipset";
 152          break;
 153       case PCI_CHIP_IGD_E_G:
 154          chipset = "Intel(R) Integrated Graphics Device";
 155          break;
 156       case PCI_CHIP_G45_G:
 157          chipset = "Intel(R) G45/G43";
 158          break;
 159       case PCI_CHIP_Q45_G:
 160          chipset = "Intel(R) Q45/Q43";
 161          break;
 162       case PCI_CHIP_G41_G:
 163          chipset = "Intel(R) G41";
 164          break;
 165       case PCI_CHIP_B43_G:
 166          chipset = "Intel(R) B43";
 167          break;
 168       case PCI_CHIP_ILD_G:
 169          chipset = "Intel(R) IGDNG_D";
 170          break;
 171       case PCI_CHIP_ILM_G:
 172          chipset = "Intel(R) IGDNG_M";
 173          break;
 174       default:
 175          chipset = "Unknown Intel Chipset";
 176          break;
 177       }
 178
 179       (void) driGetRendererString(buffer, chipset, DRIVER_DATE_GEM, 0);
 180       return (GLubyte *) buffer;
 181
 182    default:
 183       return NULL;
 184    }
 185 }
 186
 187 static unsigned
 188 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
 189 {
 190    return _mesa_get_format_bytes(rb->Base.Format) * 8;
 191 }
 192
 193 void
 194 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
 195 {
 196    struct intel_framebuffer *intel_fb = drawable->driverPrivate;
 197    struct intel_renderbuffer *rb;
 198    struct intel_region *region, *depth_region;
 199    struct intel_context *intel = context->driverPrivate;
 200    __DRIbuffer *buffers = NULL;
 201    __DRIscreen *screen;
 202    int i, count;
 203    unsigned int attachments[10];
 204    uint32_t name;
 205    const char *region_name;
 206
 207    if (INTEL_DEBUG & DEBUG_DRI)
 208       fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
 209
 210    screen = intel->intelScreen->driScrnPriv;
 211
 212    if (screen->dri2.loader
 213        && (screen->dri2.loader->base.version > 2)
 214        && (screen->dri2.loader->getBuffersWithFormat != NULL)) {
 215       struct intel_renderbuffer *depth_rb;
 216       struct intel_renderbuffer *stencil_rb;
 217
 218       i = 0;
 219       if ((intel->is_front_buffer_rendering ||
 220            intel->is_front_buffer_reading ||
 221            !intel_fb->color_rb[1])
 222            && intel_fb->color_rb[0]) {
 223          attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
 224          attachments[i++] = intel_bits_per_pixel(intel_fb->color_rb[0]);
 225       }
 226
 227       if (intel_fb->color_rb[1]) {
 228          attachments[i++] = __DRI_BUFFER_BACK_LEFT;
 229          attachments[i++] = intel_bits_per_pixel(intel_fb->color_rb[1]);
 230       }
 231
 232       depth_rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH);
 233       stencil_rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL);
 234
 235       if ((depth_rb != NULL) && (stencil_rb != NULL)) {
 236          attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL;
 237          attachments[i++] = intel_bits_per_pixel(depth_rb);
 238       } else if (depth_rb != NULL) {
 239          attachments[i++] = __DRI_BUFFER_DEPTH;
 240          attachments[i++] = intel_bits_per_pixel(depth_rb);
 241       } else if (stencil_rb != NULL) {
 242          attachments[i++] = __DRI_BUFFER_STENCIL;
 243          attachments[i++] = intel_bits_per_pixel(stencil_rb);
 244       }
 245
 246       buffers =
 247          (*screen->dri2.loader->getBuffersWithFormat)(drawable,
 248                                                       &drawable->w,
 249                                                       &drawable->h,
 250                                                       attachments, i / 2,
 251                                                       &count,
 252                                                       drawable->loaderPrivate);
 253    } else if (screen->dri2.loader) {
 254       i = 0;
 255       if (intel_fb->color_rb[0])
 256          attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
 257       if (intel_fb->color_rb[1])
 258          attachments[i++] = __DRI_BUFFER_BACK_LEFT;
 259       if (intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH))
 260          attachments[i++] = __DRI_BUFFER_DEPTH;
 261       if (intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL))
 262          attachments[i++] = __DRI_BUFFER_STENCIL;
 263
 264       buffers = (*screen->dri2.loader->getBuffers)(drawable,
 265                                                    &drawable->w,
 266                                                    &drawable->h,
 267                                                    attachments, i,
 268                                                    &count,
 269                                                    drawable->loaderPrivate);
 270    }
 271
 272    if (buffers == NULL)
 273       return;
 274
 275    drawable->x = 0;
 276    drawable->y = 0;
 277    drawable->backX = 0;
 278    drawable->backY = 0;
 279    drawable->numClipRects = 1;
 280    drawable->pClipRects[0].x1 = 0;
 281    drawable->pClipRects[0].y1 = 0;
 282    drawable->pClipRects[0].x2 = drawable->w;
 283    drawable->pClipRects[0].y2 = drawable->h;
 284    drawable->numBackClipRects = 1;
 285    drawable->pBackClipRects[0].x1 = 0;
 286    drawable->pBackClipRects[0].y1 = 0;
 287    drawable->pBackClipRects[0].x2 = drawable->w;
 288    drawable->pBackClipRects[0].y2 = drawable->h;
 289
 290    depth_region = NULL;
 291    for (i = 0; i < count; i++) {
 292        switch (buffers[i].attachment) {
 293        case __DRI_BUFFER_FRONT_LEFT:
 294            rb = intel_fb->color_rb[0];
 295            region_name = "dri2 front buffer";
 296            break;
 297
 298        case __DRI_BUFFER_FAKE_FRONT_LEFT:
 299            rb = intel_fb->color_rb[0];
 300            region_name = "dri2 fake front buffer";
 301            break;
 302
 303        case __DRI_BUFFER_BACK_LEFT:
 304            rb = intel_fb->color_rb[1];
 305            region_name = "dri2 back buffer";
 306            break;
 307
 308        case __DRI_BUFFER_DEPTH:
 309            rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH);
 310            region_name = "dri2 depth buffer";
 311            break;
 312
 313        case __DRI_BUFFER_DEPTH_STENCIL:
 314            rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH);
 315            region_name = "dri2 depth / stencil buffer";
 316            break;
 317
 318        case __DRI_BUFFER_STENCIL:
 319            rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL);
 320            region_name = "dri2 stencil buffer";
 321            break;
 322
 323        case __DRI_BUFFER_ACCUM:
 324        default:
 325            fprintf(stderr,
 326                    "unhandled buffer attach event, attacment type %d\n",
 327                    buffers[i].attachment);
 328            return;
 329        }
 330
 331        if (rb == NULL)
 332           continue;
 333
 334        if (rb->region) {
 335           dri_bo_flink(rb->region->buffer, &name);
 336           if (name == buffers[i].name)
 337              continue;
 338        }
 339
 340        if (INTEL_DEBUG & DEBUG_DRI)
 341           fprintf(stderr,
 342                   "attaching buffer %d, at %d, cpp %d, pitch %d\n",
 343                   buffers[i].name, buffers[i].attachment,
 344                   buffers[i].cpp, buffers[i].pitch);
 345
 346        if (buffers[i].attachment == __DRI_BUFFER_STENCIL && depth_region) {
 347           if (INTEL_DEBUG & DEBUG_DRI)
 348              fprintf(stderr, "(reusing depth buffer as stencil)\n");
 349           intel_region_reference(&region, depth_region);
 350        }
 351        else
 352           region = intel_region_alloc_for_handle(intel, buffers[i].cpp,
 353                                                  drawable->w,
 354                                                  drawable->h,
 355                                                  buffers[i].pitch / buffers[i].cpp,
 356                                                  buffers[i].name,
 357                                                  region_name);
 358
 359        if (buffers[i].attachment == __DRI_BUFFER_DEPTH)
 360           depth_region = region;
 361
 362        intel_renderbuffer_set_region(rb, region);
 363        intel_region_release(&region);
 364
 365        if (buffers[i].attachment == __DRI_BUFFER_DEPTH_STENCIL) {
 366           rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL);
 367           if (rb != NULL) {
 368              struct intel_region *stencil_region = NULL;
 369
 370              if (rb->region) {
 371                 dri_bo_flink(rb->region->buffer, &name);
 372                 if (name == buffers[i].name)
 373                    continue;
 374              }
 375
 376              intel_region_reference(&stencil_region, region);
 377              intel_renderbuffer_set_region(rb, stencil_region);
 378              intel_region_release(&stencil_region);
 379           }
 380        }
 381    }
 382
 383    driUpdateFramebufferSize(&intel->ctx, drawable);
 384 }
 385
 386 void
 387 intel_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 388 {
 389     struct intel_context *intel = intel_context(ctx);
 390     __DRIcontext *driContext = intel->driContext;
 391     void (*old_viewport)(GLcontext *ctx, GLint x, GLint y,
 392                          GLsizei w, GLsizei h);
 393
 394     if (!driContext->driScreenPriv->dri2.enabled)
 395         return;
 396
 397     if (!intel->meta.internal_viewport_call && ctx->DrawBuffer->Name == 0) {
 398        /* If we're rendering to the fake front buffer, make sure all the pending
 399         * drawing has landed on the real front buffer.  Otherwise when we
 400         * eventually get to DRI2GetBuffersWithFormat the stale real front
 401         * buffer contents will get copied to the new fake front buffer.
 402         */
 403        if (intel->is_front_buffer_rendering) {
 404           intel_flush(ctx, GL_FALSE);
 405        }
 406
 407        intel_update_renderbuffers(driContext, driContext->driDrawablePriv);
 408        if (driContext->driDrawablePriv != driContext->driReadablePriv)
 409           intel_update_renderbuffers(driContext, driContext->driReadablePriv);
 410     }
 411
 412     old_viewport = ctx->Driver.Viewport;
 413     ctx->Driver.Viewport = NULL;
 414     intel->driDrawable = driContext->driDrawablePriv;
 415     intel_draw_buffer(ctx, intel->ctx.DrawBuffer);
 416     ctx->Driver.Viewport = old_viewport;
 417 }
 418
 419
 420 static const struct dri_debug_control debug_control[] = {
 421    { "tex",   DEBUG_TEXTURE},
 422    { "state", DEBUG_STATE},
 423    { "ioctl", DEBUG_IOCTL},
 424    { "blit",  DEBUG_BLIT},
 425    { "mip",   DEBUG_MIPTREE},
 426    { "fall",  DEBUG_FALLBACKS},
 427    { "verb",  DEBUG_VERBOSE},
 428    { "bat",   DEBUG_BATCH},
 429    { "pix",   DEBUG_PIXEL},
 430    { "buf",   DEBUG_BUFMGR},
 431    { "reg",   DEBUG_REGION},
 432    { "fbo",   DEBUG_FBO},
 433    { "lock",  DEBUG_LOCK},
 434    { "sync",  DEBUG_SYNC},
 435    { "prim",  DEBUG_PRIMS },
 436    { "vert",  DEBUG_VERTS },
 437    { "dri",   DEBUG_DRI },
 438    { "dma",   DEBUG_DMA },
 439    { "san",   DEBUG_SANITY },
 440    { "sleep", DEBUG_SLEEP },
 441    { "stats", DEBUG_STATS },
 442    { "tile",  DEBUG_TILE },
 443    { "sing",  DEBUG_SINGLE_THREAD },
 444    { "thre",  DEBUG_SINGLE_THREAD },
 445    { "wm",    DEBUG_WM },
 446    { "urb",   DEBUG_URB },
 447    { "vs",    DEBUG_VS },
 448    { NULL,    0 }
 449 };
 450
 451
 452 static void
 453 intelInvalidateState(GLcontext * ctx, GLuint new_state)
 454 {
 455     struct intel_context *intel = intel_context(ctx);
 456
 457    _swrast_InvalidateState(ctx, new_state);
 458    _swsetup_InvalidateState(ctx, new_state);
 459    _vbo_InvalidateState(ctx, new_state);
 460    _tnl_InvalidateState(ctx, new_state);
 461    _tnl_invalidate_vertex_state(ctx, new_state);
 462
 463    intel->NewGLState |= new_state;
 464
 465    if (intel->vtbl.invalidate_state)
 466       intel->vtbl.invalidate_state( intel, new_state );
 467 }
 468
 469 static void
 470 intel_flush(GLcontext *ctx, GLboolean needs_mi_flush)
 471 {
 472    struct intel_context *intel = intel_context(ctx);
 473
 474    if (intel->Fallback)
 475       _swrast_flush(ctx);
 476
 477    if (intel->gen < 4)
 478       INTEL_FIREVERTICES(intel);
 479
 480    /* Emit a flush so that any frontbuffer rendering that might have occurred
 481     * lands onscreen in a timely manner, even if the X Server doesn't trigger
 482     * a flush for us.
 483     */
 484    if (!intel->driScreen->dri2.enabled && needs_mi_flush)
 485       intel_batchbuffer_emit_mi_flush(intel->batch);
 486
 487    if (intel->batch->map != intel->batch->ptr)
 488       intel_batchbuffer_flush(intel->batch);
 489
 490    if ((ctx->DrawBuffer->Name == 0) && intel->front_buffer_dirty) {
 491       __DRIscreen *const screen = intel->intelScreen->driScrnPriv;
 492
 493       if (screen->dri2.loader &&
 494           (screen->dri2.loader->base.version >= 2)
 495           && (screen->dri2.loader->flushFrontBuffer != NULL) &&
 496           intel->driDrawable && intel->driDrawable->loaderPrivate) {
 497          (*screen->dri2.loader->flushFrontBuffer)(intel->driDrawable,
 498                                                   intel->driDrawable->loaderPrivate);
 499
 500          /* Only clear the dirty bit if front-buffer rendering is no longer
 501           * enabled.  This is done so that the dirty bit can only be set in
 502           * glDrawBuffer.  Otherwise the dirty bit would have to be set at
 503           * each of N places that do rendering.  This has worse performances,
 504           * but it is much easier to get correct.
 505           */
 506          if (!intel->is_front_buffer_rendering) {
 507             intel->front_buffer_dirty = GL_FALSE;
 508          }
 509       }
 510    }
 511 }
 512
 513 void
 514 intelFlush(GLcontext * ctx)
 515 {
 516    intel_flush(ctx, GL_FALSE);
 517 }
 518
 519 static void
 520 intel_glFlush(GLcontext *ctx)
 521 {
 522    struct intel_context *intel = intel_context(ctx);
 523
 524    intel_flush(ctx, GL_TRUE);
 525
 526    /* We're using glFlush as an indicator that a frame is done, which is
 527     * what DRI2 does before calling SwapBuffers (and means we should catch
 528     * people doing front-buffer rendering, as well)..
 529     *
 530     * Wait for the swapbuffers before the one we just emitted, so we don't
 531     * get too many swaps outstanding for apps that are GPU-heavy but not
 532     * CPU-heavy.
 533     *
 534     * Unfortunately, we don't have a handle to the batch containing the swap,
 535     * and getting our hands on that doesn't seem worth it, so we just us the
 536     * first batch we emitted after the last swap.
 537     */
 538    if (intel->first_post_swapbuffers_batch != NULL) {
 539       drm_intel_bo_wait_rendering(intel->first_post_swapbuffers_batch);
 540       drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
 541       intel->first_post_swapbuffers_batch = NULL;
 542    }
 543 }
 544
 545 void
 546 intelFinish(GLcontext * ctx)
 547 {
 548    struct gl_framebuffer *fb = ctx->DrawBuffer;
 549    int i;
 550
 551    intelFlush(ctx);
 552
 553    for (i = 0; i < fb->_NumColorDrawBuffers; i++) {
 554        struct intel_renderbuffer *irb;
 555
 556        irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]);
 557
 558        if (irb && irb->region)
 559           dri_bo_wait_rendering(irb->region->buffer);
 560    }
 561    if (fb->_DepthBuffer) {
 562       /* XXX: Wait on buffer idle */
 563    }
 564 }
 565
 566 void
 567 intelInitDriverFunctions(struct dd_function_table *functions)
 568 {
 569    _mesa_init_driver_functions(functions);
 570
 571    functions->Flush = intel_glFlush;
 572    functions->Finish = intelFinish;
 573    functions->GetString = intelGetString;
 574    functions->UpdateState = intelInvalidateState;
 575
 576    intelInitTextureFuncs(functions);
 577    intelInitTextureImageFuncs(functions);
 578    intelInitTextureSubImageFuncs(functions);
 579    intelInitTextureCopyImageFuncs(functions);
 580    intelInitStateFuncs(functions);
 581    intelInitClearFuncs(functions);
 582    intelInitBufferFuncs(functions);
 583    intelInitPixelFuncs(functions);
 584    intelInitBufferObjectFuncs(functions);
 585    intel_init_syncobj_functions(functions);
 586 }
 587
 588
 589 GLboolean
 590 intelInitContext(struct intel_context *intel,
 591                  const __GLcontextModes * mesaVis,
 592                  __DRIcontext * driContextPriv,
 593                  void *sharedContextPrivate,
 594                  struct dd_function_table *functions)
 595 {
 596    GLcontext *ctx = &intel->ctx;
 597    GLcontext *shareCtx = (GLcontext *) sharedContextPrivate;
 598    __DRIscreen *sPriv = driContextPriv->driScreenPriv;
 599    intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
 600    int bo_reuse_mode;
 601
 602    if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx,
 603                                  functions, (void *) intel)) {
 604       _mesa_printf("%s: failed to init mesa context\n", __FUNCTION__);
 605       return GL_FALSE;
 606    }
 607
 608    driContextPriv->driverPrivate = intel;
 609    intel->intelScreen = intelScreen;
 610    intel->driScreen = sPriv;
 611    intel->driContext = driContextPriv;
 612    intel->driFd = sPriv->fd;
 613
 614    if (IS_965(intel->intelScreen->deviceID)) {
 615       intel->gen = 4;
 616    } else if (IS_9XX(intel->intelScreen->deviceID)) {
 617       intel->gen = 3;
 618       if (IS_945(intel->intelScreen->deviceID)) {
 619          intel->is_945 = GL_TRUE;
 620       }
 621    } else {
 622       intel->gen = 2;
 623    }
 624
 625    if (IS_IGDNG(intel->intelScreen->deviceID)) {
 626       intel->is_ironlake = GL_TRUE;
 627       intel->needs_ff_sync = GL_TRUE;
 628       intel->has_luminance_srgb = GL_TRUE;
 629    } else if (IS_G4X(intel->intelScreen->deviceID)) {
 630       intel->has_luminance_srgb = GL_TRUE;
 631       intel->is_g4x = GL_TRUE;
 632    }
 633
 634    driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
 635                        intel->driScreen->myNum,
 636                        (intel->gen >= 4) ? "i965" : "i915");
 637    if (intelScreen->deviceID == PCI_CHIP_I865_G)
 638       intel->maxBatchSize = 4096;
 639    else
 640       intel->maxBatchSize = BATCH_SZ;
 641
 642    intel->bufmgr = intelScreen->bufmgr;
 643
 644    bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
 645    switch (bo_reuse_mode) {
 646    case DRI_CONF_BO_REUSE_DISABLED:
 647       break;
 648    case DRI_CONF_BO_REUSE_ALL:
 649       intel_bufmgr_gem_enable_reuse(intel->bufmgr);
 650       break;
 651    }
 652
 653    /* This doesn't yet catch all non-conformant rendering, but it's a
 654     * start.
 655     */
 656    if (getenv("INTEL_STRICT_CONFORMANCE")) {
 657       unsigned int value = atoi(getenv("INTEL_STRICT_CONFORMANCE"));
 658       if (value > 0) {
 659          intel->conformance_mode = value;
 660       }
 661       else {
 662          intel->conformance_mode = 1;
 663       }
 664    }
 665
 666    if (intel->conformance_mode > 0) {
 667       ctx->Const.MinLineWidth = 1.0;
 668       ctx->Const.MinLineWidthAA = 1.0;
 669       ctx->Const.MaxLineWidth = 1.0;
 670       ctx->Const.MaxLineWidthAA = 1.0;
 671       ctx->Const.LineWidthGranularity = 1.0;
 672    }
 673    else {
 674       ctx->Const.MinLineWidth = 1.0;
 675       ctx->Const.MinLineWidthAA = 1.0;
 676       ctx->Const.MaxLineWidth = 5.0;
 677       ctx->Const.MaxLineWidthAA = 5.0;
 678       ctx->Const.LineWidthGranularity = 0.5;
 679    }
 680
 681    ctx->Const.MinPointSize = 1.0;
 682    ctx->Const.MinPointSizeAA = 1.0;
 683    ctx->Const.MaxPointSize = 255.0;
 684    ctx->Const.MaxPointSizeAA = 3.0;
 685    ctx->Const.PointSizeGranularity = 1.0;
 686
 687    /* reinitialize the context point state.
 688     * It depend on constants in __GLcontextRec::Const
 689     */
 690    _mesa_init_point(ctx);
 691
 692    meta_init_metaops(ctx, &intel->meta);
 693    ctx->Const.MaxColorAttachments = 4;  /* XXX FBO: review this */
 694    if (intel->gen >= 4) {
 695       if (MAX_WIDTH > 8192)
 696          ctx->Const.MaxRenderbufferSize = 8192;
 697    } else {
 698       if (MAX_WIDTH > 2048)
 699          ctx->Const.MaxRenderbufferSize = 2048;
 700    }
 701
 702    /* Initialize the software rasterizer and helper modules. */
 703    _swrast_CreateContext(ctx);
 704    _vbo_CreateContext(ctx);
 705    _tnl_CreateContext(ctx);
 706    _swsetup_CreateContext(ctx);
 707
 708    /* Configure swrast to match hardware characteristics: */
 709    _swrast_allow_pixel_fog(ctx, GL_FALSE);
 710    _swrast_allow_vertex_fog(ctx, GL_TRUE);
 711
 712    _mesa_meta_init(ctx);
 713
 714    intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
 715    intel->hw_stipple = 1;
 716
 717    /* XXX FBO: this doesn't seem to be used anywhere */
 718    switch (mesaVis->depthBits) {
 719    case 0:                     /* what to do in this case? */
 720    case 16:
 721       intel->polygon_offset_scale = 1.0;
 722       break;
 723    case 24:
 724       intel->polygon_offset_scale = 2.0;     /* req'd to pass glean */
 725       break;
 726    default:
 727       assert(0);
 728       break;
 729    }
 730
 731    if (intel->gen >= 4)
 732       intel->polygon_offset_scale /= 0xffff;
 733
 734    intel->RenderIndex = ~0;
 735
 736    if (intel->gen >= 4 && !intel->intelScreen->irq_active) {
 737       _mesa_printf("IRQs not active.  Exiting\n");
 738       exit(1);
 739    }
 740
 741    intelInitExtensions(ctx);
 742
 743    INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
 744    if (INTEL_DEBUG & DEBUG_BUFMGR)
 745       dri_bufmgr_set_debug(intel->bufmgr, GL_TRUE);
 746
 747    intel->batch = intel_batchbuffer_alloc(intel);
 748
 749    intel_fbo_init(intel);
 750
 751    if (intel->ctx.Mesa_DXTn) {
 752       _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
 753       _mesa_enable_extension(ctx, "GL_S3_s3tc");
 754    }
 755    else if (driQueryOptionb(&intel->optionCache, "force_s3tc_enable")) {
 756       _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
 757    }
 758    intel->use_texture_tiling = driQueryOptionb(&intel->optionCache,
 759                                                "texture_tiling");
 760    if (intel->use_texture_tiling &&
 761        !intel->intelScreen->kernel_exec_fencing) {
 762       fprintf(stderr, "No kernel support for execution fencing, "
 763               "disabling texture tiling\n");
 764       intel->use_texture_tiling = GL_FALSE;
 765    }
 766    intel->use_early_z = driQueryOptionb(&intel->optionCache, "early_z");
 767
 768    intel->prim.primitive = ~0;
 769
 770    /* Force all software fallbacks */
 771    if (driQueryOptionb(&intel->optionCache, "no_rast")) {
 772       fprintf(stderr, "disabling 3D rasterization\n");
 773       intel->no_rast = 1;
 774    }
 775
 776    if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) {
 777       fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
 778       intel->always_flush_batch = 1;
 779    }
 780
 781    if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) {
 782       fprintf(stderr, "flushing GPU caches before/after each draw call\n");
 783       intel->always_flush_cache = 1;
 784    }
 785
 786    /* Disable all hardware rendering (skip emitting batches and fences/waits
 787     * to the kernel)
 788     */
 789    intel->no_hw = getenv("INTEL_NO_HW") != NULL;
 790
 791    return GL_TRUE;
 792 }
 793
 794 void
 795 intelDestroyContext(__DRIcontext * driContextPriv)
 796 {
 797    struct intel_context *intel =
 798       (struct intel_context *) driContextPriv->driverPrivate;
 799
 800    assert(intel);               /* should never be null */
 801    if (intel) {
 802       GLboolean release_texture_heaps;
 803
 804       INTEL_FIREVERTICES(intel);
 805
 806       _mesa_meta_free(&intel->ctx);
 807
 808       meta_destroy_metaops(&intel->meta);
 809
 810       intel->vtbl.destroy(intel);
 811
 812       release_texture_heaps = (intel->ctx.Shared->RefCount == 1);
 813       _swsetup_DestroyContext(&intel->ctx);
 814       _tnl_DestroyContext(&intel->ctx);
 815       _vbo_DestroyContext(&intel->ctx);
 816
 817       _swrast_DestroyContext(&intel->ctx);
 818       intel->Fallback = 0x0;      /* don't call _swrast_Flush later */
 819
 820       intel_batchbuffer_free(intel->batch);
 821       intel->batch = NULL;
 822
 823       free(intel->prim.vb);
 824       intel->prim.vb = NULL;
 825       dri_bo_unreference(intel->prim.vb_bo);
 826       intel->prim.vb_bo = NULL;
 827       dri_bo_unreference(intel->first_post_swapbuffers_batch);
 828       intel->first_post_swapbuffers_batch = NULL;
 829
 830       if (release_texture_heaps) {
 831          /* Nothing is currently done here to free texture heaps;
 832           * but we're not using the texture heap utilities, so I
 833           * rather think we shouldn't.  I've taken a look, and can't
 834           * find any private texture data hanging around anywhere, but
 835           * I'm not yet certain there isn't any at all...
 836           */
 837          /* if (INTEL_DEBUG & DEBUG_TEXTURE)
 838             fprintf(stderr, "do something to free texture heaps\n");
 839           */
 840       }
 841
 842       driDestroyOptionCache(&intel->optionCache);
 843
 844       /* free the Mesa context */
 845       _mesa_free_context_data(&intel->ctx);
 846
 847       FREE(intel);
 848       driContextPriv->driverPrivate = NULL;
 849    }
 850 }
 851
 852 GLboolean
 853 intelUnbindContext(__DRIcontext * driContextPriv)
 854 {
 855    struct intel_context *intel =
 856       (struct intel_context *) driContextPriv->driverPrivate;
 857
 858    /* Deassociate the context with the drawables.
 859     */
 860    intel->driDrawable = NULL;
 861    intel->driReadDrawable = NULL;
 862
 863    return GL_TRUE;
 864 }
 865
 866 GLboolean
 867 intelMakeCurrent(__DRIcontext * driContextPriv,
 868                  __DRIdrawable * driDrawPriv,
 869                  __DRIdrawable * driReadPriv)
 870 {
 871    __DRIscreen *psp = driDrawPriv->driScreenPriv;
 872    struct intel_context *intel;
 873    GET_CURRENT_CONTEXT(curCtx);
 874
 875    if (driContextPriv)
 876       intel = (struct intel_context *) driContextPriv->driverPrivate;
 877    else
 878       intel = NULL;
 879
 880    /* According to the glXMakeCurrent() man page: "Pending commands to
 881     * the previous context, if any, are flushed before it is released."
 882     * But only flush if we're actually changing contexts.
 883     */
 884    if (intel_context(curCtx) && intel_context(curCtx) != intel) {
 885       _mesa_flush(curCtx);
 886    }
 887
 888    if (driContextPriv) {
 889       struct intel_framebuffer *intel_fb =
 890          (struct intel_framebuffer *) driDrawPriv->driverPrivate;
 891       GLframebuffer *readFb = (GLframebuffer *) driReadPriv->driverPrivate;
 892
 893       intel_update_renderbuffers(driContextPriv, driDrawPriv);
 894       if (driDrawPriv != driReadPriv)
 895          intel_update_renderbuffers(driContextPriv, driReadPriv);
 896
 897       /* set GLframebuffer size to match window, if needed */
 898       driUpdateFramebufferSize(&intel->ctx, driDrawPriv);
 899
 900       if (driReadPriv != driDrawPriv) {
 901          driUpdateFramebufferSize(&intel->ctx, driReadPriv);
 902       }
 903
 904       _mesa_make_current(&intel->ctx, &intel_fb->Base, readFb);
 905
 906       intel->driReadDrawable = driReadPriv;
 907
 908       if (intel->driDrawable != driDrawPriv) {
 909          if (driDrawPriv->swap_interval == (unsigned)-1) {
 910             int i;
 911
 912             driDrawPriv->vblFlags = (intel->intelScreen->irq_active != 0)
 913                ? driGetDefaultVBlankFlags(&intel->optionCache)
 914                : VBLANK_FLAG_NO_IRQ;
 915
 916             /* Prevent error printf if one crtc is disabled, this will
 917              * be properly calculated in intelWindowMoved() next.
 918              */
 919             driDrawPriv->vblFlags = intelFixupVblank(intel, driDrawPriv);
 920
 921             (*psp->systemTime->getUST) (&intel_fb->swap_ust);
 922             driDrawableInitVBlank(driDrawPriv);
 923             intel_fb->vbl_waited = driDrawPriv->vblSeq;
 924
 925             for (i = 0; i < 2; i++) {
 926                if (intel_fb->color_rb[i])
 927                   intel_fb->color_rb[i]->vbl_pending = driDrawPriv->vblSeq;
 928             }
 929          }
 930          intel->driDrawable = driDrawPriv;
 931       }
 932
 933       intel_draw_buffer(&intel->ctx, &intel_fb->Base);
 934    }
 935    else {
 936       _mesa_make_current(NULL, NULL, NULL);
 937    }
 938
 939    return GL_TRUE;
 940 }