intel / DRI2: Accept fake front-buffer from loader
[mesa.git] / src / mesa / drivers / dri / intel / intel_context.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/extensions.h"
32 #include "main/framebuffer.h"
33 #include "main/imports.h"
34 #include "main/points.h"
35
36 #include "swrast/swrast.h"
37 #include "swrast_setup/swrast_setup.h"
38 #include "tnl/tnl.h"
39 #include "drivers/common/driverfuncs.h"
40
41 #include "i830_dri.h"
42
43 #include "intel_chipset.h"
44 #include "intel_buffers.h"
45 #include "intel_tex.h"
46 #include "intel_batchbuffer.h"
47 #include "intel_clear.h"
48 #include "intel_extensions.h"
49 #include "intel_pixel.h"
50 #include "intel_regions.h"
51 #include "intel_buffer_objects.h"
52 #include "intel_fbo.h"
53 #include "intel_decode.h"
54 #include "intel_bufmgr.h"
55 #include "intel_screen.h"
56 #include "intel_swapbuffers.h"
57
58 #include "drirenderbuffer.h"
59 #include "vblank.h"
60 #include "utils.h"
61 #include "xmlpool.h" /* for symbolic values of enum-type options */
62
63
64 #ifndef INTEL_DEBUG
65 int INTEL_DEBUG = (0);
66 #endif
67
68
69 #define DRIVER_DATE "20090114"
70 #define DRIVER_DATE_GEM "GEM " DRIVER_DATE
71
72
73 static const GLubyte *
74 intelGetString(GLcontext * ctx, GLenum name)
75 {
76 const struct intel_context *const intel = intel_context(ctx);
77 const char *chipset;
78 static char buffer[128];
79
80 switch (name) {
81 case GL_VENDOR:
82 return (GLubyte *) "Tungsten Graphics, Inc";
83 break;
84
85 case GL_RENDERER:
86 switch (intel->intelScreen->deviceID) {
87 case PCI_CHIP_845_G:
88 chipset = "Intel(R) 845G";
89 break;
90 case PCI_CHIP_I830_M:
91 chipset = "Intel(R) 830M";
92 break;
93 case PCI_CHIP_I855_GM:
94 chipset = "Intel(R) 852GM/855GM";
95 break;
96 case PCI_CHIP_I865_G:
97 chipset = "Intel(R) 865G";
98 break;
99 case PCI_CHIP_I915_G:
100 chipset = "Intel(R) 915G";
101 break;
102 case PCI_CHIP_E7221_G:
103 chipset = "Intel (R) E7221G (i915)";
104 break;
105 case PCI_CHIP_I915_GM:
106 chipset = "Intel(R) 915GM";
107 break;
108 case PCI_CHIP_I945_G:
109 chipset = "Intel(R) 945G";
110 break;
111 case PCI_CHIP_I945_GM:
112 chipset = "Intel(R) 945GM";
113 break;
114 case PCI_CHIP_I945_GME:
115 chipset = "Intel(R) 945GME";
116 break;
117 case PCI_CHIP_G33_G:
118 chipset = "Intel(R) G33";
119 break;
120 case PCI_CHIP_Q35_G:
121 chipset = "Intel(R) Q35";
122 break;
123 case PCI_CHIP_Q33_G:
124 chipset = "Intel(R) Q33";
125 break;
126 case PCI_CHIP_IGD_GM:
127 case PCI_CHIP_IGD_G:
128 chipset = "Intel(R) IGD";
129 break;
130 case PCI_CHIP_I965_Q:
131 chipset = "Intel(R) 965Q";
132 break;
133 case PCI_CHIP_I965_G:
134 case PCI_CHIP_I965_G_1:
135 chipset = "Intel(R) 965G";
136 break;
137 case PCI_CHIP_I946_GZ:
138 chipset = "Intel(R) 946GZ";
139 break;
140 case PCI_CHIP_I965_GM:
141 chipset = "Intel(R) 965GM";
142 break;
143 case PCI_CHIP_I965_GME:
144 chipset = "Intel(R) 965GME/GLE";
145 break;
146 case PCI_CHIP_GM45_GM:
147 chipset = "Mobile IntelĀ® GM45 Express Chipset";
148 break;
149 case PCI_CHIP_IGD_E_G:
150 chipset = "Intel(R) Integrated Graphics Device";
151 break;
152 case PCI_CHIP_G45_G:
153 chipset = "Intel(R) G45/G43";
154 break;
155 case PCI_CHIP_Q45_G:
156 chipset = "Intel(R) Q45/Q43";
157 break;
158 case PCI_CHIP_G41_G:
159 chipset = "Intel(R) G41";
160 break;
161 default:
162 chipset = "Unknown Intel Chipset";
163 break;
164 }
165
166 (void) driGetRendererString(buffer, chipset,
167 (intel->ttm) ? DRIVER_DATE_GEM : DRIVER_DATE,
168 0);
169 return (GLubyte *) buffer;
170
171 default:
172 return NULL;
173 }
174 }
175
176 void
177 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
178 {
179 struct intel_framebuffer *intel_fb = drawable->driverPrivate;
180 struct intel_renderbuffer *rb;
181 struct intel_region *region, *depth_region;
182 struct intel_context *intel = context->driverPrivate;
183 __DRIbuffer *buffers;
184 __DRIscreen *screen;
185 int i, count;
186 unsigned int attachments[10];
187 uint32_t name;
188 const char *region_name;
189
190 if (INTEL_DEBUG & DEBUG_DRI)
191 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
192
193 screen = intel->intelScreen->driScrnPriv;
194
195 i = 0;
196 if (intel_fb->color_rb[0])
197 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
198 if (intel_fb->color_rb[1])
199 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
200 if (intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH))
201 attachments[i++] = __DRI_BUFFER_DEPTH;
202 if (intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL))
203 attachments[i++] = __DRI_BUFFER_STENCIL;
204
205 buffers = (*screen->dri2.loader->getBuffers)(drawable,
206 &drawable->w,
207 &drawable->h,
208 attachments, i,
209 &count,
210 drawable->loaderPrivate);
211
212 if (buffers == NULL)
213 return;
214
215 drawable->x = 0;
216 drawable->y = 0;
217 drawable->backX = 0;
218 drawable->backY = 0;
219 drawable->numClipRects = 1;
220 drawable->pClipRects[0].x1 = 0;
221 drawable->pClipRects[0].y1 = 0;
222 drawable->pClipRects[0].x2 = drawable->w;
223 drawable->pClipRects[0].y2 = drawable->h;
224 drawable->numBackClipRects = 1;
225 drawable->pBackClipRects[0].x1 = 0;
226 drawable->pBackClipRects[0].y1 = 0;
227 drawable->pBackClipRects[0].x2 = drawable->w;
228 drawable->pBackClipRects[0].y2 = drawable->h;
229
230 depth_region = NULL;
231 for (i = 0; i < count; i++) {
232 switch (buffers[i].attachment) {
233 case __DRI_BUFFER_FRONT_LEFT:
234 rb = intel_fb->color_rb[0];
235 region_name = "dri2 front buffer";
236 break;
237
238 case __DRI_BUFFER_FAKE_FRONT_LEFT:
239 rb = intel_fb->color_rb[0];
240 region_name = "dri2 fake front buffer";
241 break;
242
243 case __DRI_BUFFER_BACK_LEFT:
244 rb = intel_fb->color_rb[1];
245 region_name = "dri2 back buffer";
246 break;
247
248 case __DRI_BUFFER_DEPTH:
249 rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH);
250 region_name = "dri2 depth buffer";
251 break;
252
253 case __DRI_BUFFER_STENCIL:
254 rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL);
255 region_name = "dri2 stencil buffer";
256 break;
257
258 case __DRI_BUFFER_ACCUM:
259 default:
260 fprintf(stderr,
261 "unhandled buffer attach event, attacment type %d\n",
262 buffers[i].attachment);
263 return;
264 }
265
266 if (rb == NULL)
267 continue;
268
269 if (rb->region) {
270 dri_bo_flink(rb->region->buffer, &name);
271 if (name == buffers[i].name)
272 continue;
273 }
274
275 if (INTEL_DEBUG & DEBUG_DRI)
276 fprintf(stderr,
277 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
278 buffers[i].name, buffers[i].attachment,
279 buffers[i].cpp, buffers[i].pitch);
280
281 if (buffers[i].attachment == __DRI_BUFFER_STENCIL && depth_region) {
282 if (INTEL_DEBUG & DEBUG_DRI)
283 fprintf(stderr, "(reusing depth buffer as stencil)\n");
284 intel_region_reference(&region, depth_region);
285 }
286 else
287 region = intel_region_alloc_for_handle(intel, buffers[i].cpp,
288 drawable->w,
289 drawable->h,
290 buffers[i].pitch / buffers[i].cpp,
291 buffers[i].name,
292 region_name);
293
294 if (buffers[i].attachment == __DRI_BUFFER_DEPTH)
295 depth_region = region;
296
297 intel_renderbuffer_set_region(rb, region);
298 intel_region_release(&region);
299 }
300
301 driUpdateFramebufferSize(&intel->ctx, drawable);
302 }
303
304 void
305 intel_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
306 {
307 struct intel_context *intel = intel_context(ctx);
308 __DRIcontext *driContext = intel->driContext;
309 void (*old_viewport)(GLcontext *ctx, GLint x, GLint y,
310 GLsizei w, GLsizei h);
311
312 if (!driContext->driScreenPriv->dri2.enabled)
313 return;
314
315 if (!intel->internal_viewport_call) {
316 intel_update_renderbuffers(driContext, driContext->driDrawablePriv);
317 if (driContext->driDrawablePriv != driContext->driReadablePriv)
318 intel_update_renderbuffers(driContext, driContext->driReadablePriv);
319 }
320
321 old_viewport = ctx->Driver.Viewport;
322 ctx->Driver.Viewport = NULL;
323 intel->driDrawable = driContext->driDrawablePriv;
324 intelWindowMoved(intel);
325 intel_draw_buffer(ctx, intel->ctx.DrawBuffer);
326 ctx->Driver.Viewport = old_viewport;
327 }
328
329
330 static const struct dri_debug_control debug_control[] = {
331 { "tex", DEBUG_TEXTURE},
332 { "state", DEBUG_STATE},
333 { "ioctl", DEBUG_IOCTL},
334 { "blit", DEBUG_BLIT},
335 { "mip", DEBUG_MIPTREE},
336 { "fall", DEBUG_FALLBACKS},
337 { "verb", DEBUG_VERBOSE},
338 { "bat", DEBUG_BATCH},
339 { "pix", DEBUG_PIXEL},
340 { "buf", DEBUG_BUFMGR},
341 { "reg", DEBUG_REGION},
342 { "fbo", DEBUG_FBO},
343 { "lock", DEBUG_LOCK},
344 { "sync", DEBUG_SYNC},
345 { "prim", DEBUG_PRIMS },
346 { "vert", DEBUG_VERTS },
347 { "dri", DEBUG_DRI },
348 { "dma", DEBUG_DMA },
349 { "san", DEBUG_SANITY },
350 { "sleep", DEBUG_SLEEP },
351 { "stats", DEBUG_STATS },
352 { "tile", DEBUG_TILE },
353 { "sing", DEBUG_SINGLE_THREAD },
354 { "thre", DEBUG_SINGLE_THREAD },
355 { "wm", DEBUG_WM },
356 { "urb", DEBUG_URB },
357 { "vs", DEBUG_VS },
358 { NULL, 0 }
359 };
360
361
362 static void
363 intelInvalidateState(GLcontext * ctx, GLuint new_state)
364 {
365 struct intel_context *intel = intel_context(ctx);
366
367 _swrast_InvalidateState(ctx, new_state);
368 _swsetup_InvalidateState(ctx, new_state);
369 _vbo_InvalidateState(ctx, new_state);
370 _tnl_InvalidateState(ctx, new_state);
371 _tnl_invalidate_vertex_state(ctx, new_state);
372
373 intel->NewGLState |= new_state;
374
375 if (intel->vtbl.invalidate_state)
376 intel->vtbl.invalidate_state( intel, new_state );
377 }
378
379 static void
380 intel_flush(GLcontext *ctx, GLboolean needs_mi_flush)
381 {
382 struct intel_context *intel = intel_context(ctx);
383
384 if (intel->Fallback)
385 _swrast_flush(ctx);
386
387 if (!IS_965(intel->intelScreen->deviceID))
388 INTEL_FIREVERTICES(intel);
389
390 /* Emit a flush so that any frontbuffer rendering that might have occurred
391 * lands onscreen in a timely manner, even if the X Server doesn't trigger
392 * a flush for us.
393 */
394 if (needs_mi_flush)
395 intel_batchbuffer_emit_mi_flush(intel->batch);
396
397 if (intel->batch->map != intel->batch->ptr)
398 intel_batchbuffer_flush(intel->batch);
399
400 if ((ctx->DrawBuffer->Name == 0) && intel->front_buffer_dirty) {
401 __DRIscreen *const screen = intel->intelScreen->driScrnPriv;
402
403 if ((screen->dri2.loader->base.version >= 2)
404 && (screen->dri2.loader->flushFrontBuffer != NULL)) {
405 (*screen->dri2.loader->flushFrontBuffer)(intel->driDrawable,
406 intel->driDrawable->loaderPrivate);
407
408 /* Only clear the dirty bit if front-buffer rendering is no longer
409 * enabled. This is done so that the dirty bit can only be set in
410 * glDrawBuffer. Otherwise the dirty bit would have to be set at
411 * each of N places that do rendering. This has worse performances,
412 * but it is much easier to get correct.
413 */
414 if (intel->is_front_buffer_rendering) {
415 intel->front_buffer_dirty = GL_FALSE;
416 }
417 }
418 }
419 }
420
421 void
422 intelFlush(GLcontext * ctx)
423 {
424 intel_flush(ctx, GL_FALSE);
425 }
426
427 static void
428 intel_glFlush(GLcontext *ctx)
429 {
430 intel_flush(ctx, GL_TRUE);
431 }
432
433 void
434 intelFinish(GLcontext * ctx)
435 {
436 struct gl_framebuffer *fb = ctx->DrawBuffer;
437 int i;
438
439 intelFlush(ctx);
440
441 for (i = 0; i < fb->_NumColorDrawBuffers; i++) {
442 struct intel_renderbuffer *irb;
443
444 irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]);
445
446 if (irb->region)
447 dri_bo_wait_rendering(irb->region->buffer);
448 }
449 if (fb->_DepthBuffer) {
450 /* XXX: Wait on buffer idle */
451 }
452 }
453
454 void
455 intelInitDriverFunctions(struct dd_function_table *functions)
456 {
457 _mesa_init_driver_functions(functions);
458
459 functions->Flush = intel_glFlush;
460 functions->Finish = intelFinish;
461 functions->GetString = intelGetString;
462 functions->UpdateState = intelInvalidateState;
463
464 functions->CopyColorTable = _swrast_CopyColorTable;
465 functions->CopyColorSubTable = _swrast_CopyColorSubTable;
466 functions->CopyConvolutionFilter1D = _swrast_CopyConvolutionFilter1D;
467 functions->CopyConvolutionFilter2D = _swrast_CopyConvolutionFilter2D;
468
469 intelInitTextureFuncs(functions);
470 intelInitStateFuncs(functions);
471 intelInitClearFuncs(functions);
472 intelInitBufferFuncs(functions);
473 intelInitPixelFuncs(functions);
474 }
475
476
477 GLboolean
478 intelInitContext(struct intel_context *intel,
479 const __GLcontextModes * mesaVis,
480 __DRIcontextPrivate * driContextPriv,
481 void *sharedContextPrivate,
482 struct dd_function_table *functions)
483 {
484 GLcontext *ctx = &intel->ctx;
485 GLcontext *shareCtx = (GLcontext *) sharedContextPrivate;
486 __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
487 intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
488 int fthrottle_mode;
489
490 if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx,
491 functions, (void *) intel)) {
492 _mesa_printf("%s: failed to init mesa context\n", __FUNCTION__);
493 return GL_FALSE;
494 }
495
496 driContextPriv->driverPrivate = intel;
497 intel->intelScreen = intelScreen;
498 intel->driScreen = sPriv;
499 intel->sarea = intelScreen->sarea;
500 intel->driContext = driContextPriv;
501
502 /* Dri stuff */
503 intel->hHWContext = driContextPriv->hHWContext;
504 intel->driFd = sPriv->fd;
505 intel->driHwLock = sPriv->lock;
506
507 driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
508 intel->driScreen->myNum,
509 IS_965(intelScreen->deviceID) ? "i965" : "i915");
510 if (intelScreen->deviceID == PCI_CHIP_I865_G)
511 intel->maxBatchSize = 4096;
512 else
513 intel->maxBatchSize = BATCH_SZ;
514
515 intel->bufmgr = intelScreen->bufmgr;
516 intel->ttm = intelScreen->ttm;
517 if (intel->ttm) {
518 int bo_reuse_mode;
519
520 bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
521 switch (bo_reuse_mode) {
522 case DRI_CONF_BO_REUSE_DISABLED:
523 break;
524 case DRI_CONF_BO_REUSE_ALL:
525 intel_bufmgr_gem_enable_reuse(intel->bufmgr);
526 break;
527 }
528 }
529
530 ctx->Const.MaxTextureMaxAnisotropy = 2.0;
531
532 /* This doesn't yet catch all non-conformant rendering, but it's a
533 * start.
534 */
535 if (getenv("INTEL_STRICT_CONFORMANCE")) {
536 unsigned int value = atoi(getenv("INTEL_STRICT_CONFORMANCE"));
537 if (value > 0) {
538 intel->conformance_mode = value;
539 }
540 else {
541 intel->conformance_mode = 1;
542 }
543 }
544
545 if (intel->conformance_mode > 0) {
546 ctx->Const.MinLineWidth = 1.0;
547 ctx->Const.MinLineWidthAA = 1.0;
548 ctx->Const.MaxLineWidth = 1.0;
549 ctx->Const.MaxLineWidthAA = 1.0;
550 ctx->Const.LineWidthGranularity = 1.0;
551 }
552 else {
553 ctx->Const.MinLineWidth = 1.0;
554 ctx->Const.MinLineWidthAA = 1.0;
555 ctx->Const.MaxLineWidth = 5.0;
556 ctx->Const.MaxLineWidthAA = 5.0;
557 ctx->Const.LineWidthGranularity = 0.5;
558 }
559
560 ctx->Const.MinPointSize = 1.0;
561 ctx->Const.MinPointSizeAA = 1.0;
562 ctx->Const.MaxPointSize = 255.0;
563 ctx->Const.MaxPointSizeAA = 3.0;
564 ctx->Const.PointSizeGranularity = 1.0;
565
566 /* reinitialize the context point state.
567 * It depend on constants in __GLcontextRec::Const
568 */
569 _mesa_init_point(ctx);
570
571 ctx->Const.MaxColorAttachments = 4; /* XXX FBO: review this */
572
573 /* Initialize the software rasterizer and helper modules. */
574 _swrast_CreateContext(ctx);
575 _vbo_CreateContext(ctx);
576 _tnl_CreateContext(ctx);
577 _swsetup_CreateContext(ctx);
578
579 /* Configure swrast to match hardware characteristics: */
580 _swrast_allow_pixel_fog(ctx, GL_FALSE);
581 _swrast_allow_vertex_fog(ctx, GL_TRUE);
582
583 intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
584 intel->hw_stipple = 1;
585
586 /* XXX FBO: this doesn't seem to be used anywhere */
587 switch (mesaVis->depthBits) {
588 case 0: /* what to do in this case? */
589 case 16:
590 intel->polygon_offset_scale = 1.0;
591 break;
592 case 24:
593 intel->polygon_offset_scale = 2.0; /* req'd to pass glean */
594 break;
595 default:
596 assert(0);
597 break;
598 }
599
600 if (IS_965(intelScreen->deviceID))
601 intel->polygon_offset_scale /= 0xffff;
602
603 intel->RenderIndex = ~0;
604
605 fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode");
606 intel->irqsEmitted = 0;
607
608 intel->do_irqs = (intel->intelScreen->irq_active &&
609 fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
610
611 intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
612
613 if (IS_965(intelScreen->deviceID) && !intel->intelScreen->irq_active) {
614 _mesa_printf("IRQs not active. Exiting\n");
615 exit(1);
616 }
617
618 intelInitExtensions(ctx, GL_FALSE);
619
620 INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
621 if (INTEL_DEBUG & DEBUG_BUFMGR)
622 dri_bufmgr_set_debug(intel->bufmgr, GL_TRUE);
623
624 if (!sPriv->dri2.enabled)
625 intel_recreate_static_regions(intel);
626
627 intel->batch = intel_batchbuffer_alloc(intel);
628
629 intel_bufferobj_init(intel);
630 intel_fbo_init(intel);
631
632 if (intel->ctx.Mesa_DXTn) {
633 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
634 _mesa_enable_extension(ctx, "GL_S3_s3tc");
635 }
636 else if (driQueryOptionb(&intel->optionCache, "force_s3tc_enable")) {
637 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
638 }
639
640 intel->prim.primitive = ~0;
641
642 /* Force all software fallbacks */
643 if (driQueryOptionb(&intel->optionCache, "no_rast")) {
644 fprintf(stderr, "disabling 3D rasterization\n");
645 intel->no_rast = 1;
646 }
647
648 if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) {
649 fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
650 intel->always_flush_batch = 1;
651 }
652
653 if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) {
654 fprintf(stderr, "flushing GPU caches before/after each draw call\n");
655 intel->always_flush_cache = 1;
656 }
657
658 /* Disable all hardware rendering (skip emitting batches and fences/waits
659 * to the kernel)
660 */
661 intel->no_hw = getenv("INTEL_NO_HW") != NULL;
662
663 return GL_TRUE;
664 }
665
666 void
667 intelDestroyContext(__DRIcontextPrivate * driContextPriv)
668 {
669 struct intel_context *intel =
670 (struct intel_context *) driContextPriv->driverPrivate;
671
672 assert(intel); /* should never be null */
673 if (intel) {
674 GLboolean release_texture_heaps;
675
676 INTEL_FIREVERTICES(intel);
677
678 intel->vtbl.destroy(intel);
679
680 release_texture_heaps = (intel->ctx.Shared->RefCount == 1);
681 _swsetup_DestroyContext(&intel->ctx);
682 _tnl_DestroyContext(&intel->ctx);
683 _vbo_DestroyContext(&intel->ctx);
684
685 _swrast_DestroyContext(&intel->ctx);
686 intel->Fallback = 0; /* don't call _swrast_Flush later */
687
688 intel_batchbuffer_free(intel->batch);
689 intel->batch = NULL;
690
691 free(intel->prim.vb);
692 intel->prim.vb = NULL;
693 dri_bo_unreference(intel->prim.vb_bo);
694 intel->prim.vb_bo = NULL;
695
696 if (release_texture_heaps) {
697 /* This share group is about to go away, free our private
698 * texture object data.
699 */
700 if (INTEL_DEBUG & DEBUG_TEXTURE)
701 fprintf(stderr, "do something to free texture heaps\n");
702 }
703
704 intel_region_release(&intel->front_region);
705 intel_region_release(&intel->back_region);
706 intel_region_release(&intel->depth_region);
707
708 driDestroyOptionCache(&intel->optionCache);
709
710 /* free the Mesa context */
711 _mesa_free_context_data(&intel->ctx);
712 }
713 }
714
715 GLboolean
716 intelUnbindContext(__DRIcontextPrivate * driContextPriv)
717 {
718 return GL_TRUE;
719 }
720
721 GLboolean
722 intelMakeCurrent(__DRIcontextPrivate * driContextPriv,
723 __DRIdrawablePrivate * driDrawPriv,
724 __DRIdrawablePrivate * driReadPriv)
725 {
726 __DRIscreenPrivate *psp = driDrawPriv->driScreenPriv;
727
728 if (driContextPriv) {
729 struct intel_context *intel =
730 (struct intel_context *) driContextPriv->driverPrivate;
731 struct intel_framebuffer *intel_fb =
732 (struct intel_framebuffer *) driDrawPriv->driverPrivate;
733 GLframebuffer *readFb = (GLframebuffer *) driReadPriv->driverPrivate;
734
735 if (driContextPriv->driScreenPriv->dri2.enabled) {
736 intel_update_renderbuffers(driContextPriv, driDrawPriv);
737 if (driDrawPriv != driReadPriv)
738 intel_update_renderbuffers(driContextPriv, driReadPriv);
739 } else {
740 /* XXX FBO temporary fix-ups! */
741 /* if the renderbuffers don't have regions, init them from the context */
742 struct intel_renderbuffer *irbDepth
743 = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH);
744 struct intel_renderbuffer *irbStencil
745 = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL);
746
747 if (intel_fb->color_rb[0]) {
748 intel_renderbuffer_set_region(intel_fb->color_rb[0],
749 intel->front_region);
750 }
751 if (intel_fb->color_rb[1]) {
752 intel_renderbuffer_set_region(intel_fb->color_rb[1],
753 intel->back_region);
754 }
755
756 if (irbDepth) {
757 intel_renderbuffer_set_region(irbDepth, intel->depth_region);
758 }
759 if (irbStencil) {
760 intel_renderbuffer_set_region(irbStencil, intel->depth_region);
761 }
762 }
763
764 /* set GLframebuffer size to match window, if needed */
765 driUpdateFramebufferSize(&intel->ctx, driDrawPriv);
766
767 if (driReadPriv != driDrawPriv) {
768 driUpdateFramebufferSize(&intel->ctx, driReadPriv);
769 }
770
771 _mesa_make_current(&intel->ctx, &intel_fb->Base, readFb);
772
773 /* The drawbuffer won't always be updated by _mesa_make_current:
774 */
775 if (intel->ctx.DrawBuffer == &intel_fb->Base) {
776
777 if (intel->driReadDrawable != driReadPriv)
778 intel->driReadDrawable = driReadPriv;
779
780 if (intel->driDrawable != driDrawPriv) {
781 if (driDrawPriv->swap_interval == (unsigned)-1) {
782 int i;
783
784 driDrawPriv->vblFlags = (intel->intelScreen->irq_active != 0)
785 ? driGetDefaultVBlankFlags(&intel->optionCache)
786 : VBLANK_FLAG_NO_IRQ;
787
788 /* Prevent error printf if one crtc is disabled, this will
789 * be properly calculated in intelWindowMoved() next.
790 */
791 driDrawPriv->vblFlags = intelFixupVblank(intel, driDrawPriv);
792
793 (*psp->systemTime->getUST) (&intel_fb->swap_ust);
794 driDrawableInitVBlank(driDrawPriv);
795 intel_fb->vbl_waited = driDrawPriv->vblSeq;
796
797 for (i = 0; i < 2; i++) {
798 if (intel_fb->color_rb[i])
799 intel_fb->color_rb[i]->vbl_pending = driDrawPriv->vblSeq;
800 }
801 }
802 intel->driDrawable = driDrawPriv;
803 intelWindowMoved(intel);
804 }
805
806 intel_draw_buffer(&intel->ctx, &intel_fb->Base);
807 }
808 }
809 else {
810 _mesa_make_current(NULL, NULL, NULL);
811 }
812
813 return GL_TRUE;
814 }
815
816 static void
817 intelContendedLock(struct intel_context *intel, GLuint flags)
818 {
819 __DRIdrawablePrivate *dPriv = intel->driDrawable;
820 __DRIscreenPrivate *sPriv = intel->driScreen;
821 volatile drm_i915_sarea_t *sarea = intel->sarea;
822 int me = intel->hHWContext;
823
824 drmGetLock(intel->driFd, intel->hHWContext, flags);
825 intel->locked = 1;
826
827 if (INTEL_DEBUG & DEBUG_LOCK)
828 _mesa_printf("%s - got contended lock\n", __progname);
829
830 /* If the window moved, may need to set a new cliprect now.
831 *
832 * NOTE: This releases and regains the hw lock, so all state
833 * checking must be done *after* this call:
834 */
835 if (dPriv)
836 DRI_VALIDATE_DRAWABLE_INFO(sPriv, dPriv);
837
838 if (sarea && sarea->ctxOwner != me) {
839 if (INTEL_DEBUG & DEBUG_BUFMGR) {
840 fprintf(stderr, "Lost Context: sarea->ctxOwner %x me %x\n",
841 sarea->ctxOwner, me);
842 }
843 sarea->ctxOwner = me;
844 }
845
846 /* If the last consumer of the texture memory wasn't us, notify the fake
847 * bufmgr and record the new owner. We should have the memory shared
848 * between contexts of a single fake bufmgr, but this will at least make
849 * things correct for now.
850 */
851 if (!intel->ttm && sarea->texAge != intel->hHWContext) {
852 sarea->texAge = intel->hHWContext;
853 intel_bufmgr_fake_contended_lock_take(intel->bufmgr);
854 if (INTEL_DEBUG & DEBUG_BATCH)
855 intel_decode_context_reset();
856 if (INTEL_DEBUG & DEBUG_BUFMGR)
857 fprintf(stderr, "Lost Textures: sarea->texAge %x hw context %x\n",
858 sarea->ctxOwner, intel->hHWContext);
859 }
860
861 /* Drawable changed?
862 */
863 if (dPriv && intel->lastStamp != dPriv->lastStamp) {
864 intelWindowMoved(intel);
865 intel->lastStamp = dPriv->lastStamp;
866 }
867 }
868
869
870 _glthread_DECLARE_STATIC_MUTEX(lockMutex);
871
872 /* Lock the hardware and validate our state.
873 */
874 void LOCK_HARDWARE( struct intel_context *intel )
875 {
876 __DRIdrawable *dPriv = intel->driDrawable;
877 __DRIscreen *sPriv = intel->driScreen;
878 char __ret = 0;
879 struct intel_framebuffer *intel_fb = NULL;
880 struct intel_renderbuffer *intel_rb = NULL;
881
882 _glthread_LOCK_MUTEX(lockMutex);
883 assert(!intel->locked);
884 intel->locked = 1;
885
886 if (intel->driDrawable) {
887 intel_fb = intel->driDrawable->driverPrivate;
888
889 if (intel_fb)
890 intel_rb =
891 intel_get_renderbuffer(&intel_fb->Base,
892 intel_fb->Base._ColorDrawBufferIndexes[0]);
893 }
894
895 if (intel_rb && dPriv->vblFlags &&
896 !(dPriv->vblFlags & VBLANK_FLAG_NO_IRQ) &&
897 (intel_fb->vbl_waited - intel_rb->vbl_pending) > (1<<23)) {
898 drmVBlank vbl;
899
900 vbl.request.type = DRM_VBLANK_ABSOLUTE;
901
902 if ( dPriv->vblFlags & VBLANK_FLAG_SECONDARY ) {
903 vbl.request.type |= DRM_VBLANK_SECONDARY;
904 }
905
906 vbl.request.sequence = intel_rb->vbl_pending;
907 drmWaitVBlank(intel->driFd, &vbl);
908 intel_fb->vbl_waited = vbl.reply.sequence;
909 }
910
911 if (!sPriv->dri2.enabled) {
912 DRM_CAS(intel->driHwLock, intel->hHWContext,
913 (DRM_LOCK_HELD|intel->hHWContext), __ret);
914
915 if (__ret)
916 intelContendedLock( intel, 0 );
917 }
918
919
920 if (INTEL_DEBUG & DEBUG_LOCK)
921 _mesa_printf("%s - locked\n", __progname);
922 }
923
924
925 /* Unlock the hardware using the global current context
926 */
927 void UNLOCK_HARDWARE( struct intel_context *intel )
928 {
929 __DRIscreen *sPriv = intel->driScreen;
930
931 intel->vtbl.note_unlock( intel );
932 intel->locked = 0;
933
934 if (!sPriv->dri2.enabled)
935 DRM_UNLOCK(intel->driFd, intel->driHwLock, intel->hHWContext);
936
937 _glthread_UNLOCK_MUTEX(lockMutex);
938
939 if (INTEL_DEBUG & DEBUG_LOCK)
940 _mesa_printf("%s - unlocked\n", __progname);
941
942 /**
943 * Nothing should be left in batch outside of LOCK/UNLOCK which references
944 * cliprects.
945 */
946 if (intel->batch->cliprect_mode == REFERENCES_CLIPRECTS)
947 intel_batchbuffer_flush(intel->batch);
948 }
949