Merge commit '381d5e209815235911c4aab516037c868c8f695f'
[mesa.git] / src / mesa / drivers / dri / intel / intel_context.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/extensions.h"
32 #include "main/framebuffer.h"
33 #include "main/imports.h"
34 #include "main/points.h"
35
36 #include "swrast/swrast.h"
37 #include "swrast_setup/swrast_setup.h"
38 #include "tnl/tnl.h"
39 #include "drivers/common/driverfuncs.h"
40 #include "drivers/common/meta.h"
41
42 #include "i830_dri.h"
43
44 #include "intel_chipset.h"
45 #include "intel_buffers.h"
46 #include "intel_tex.h"
47 #include "intel_batchbuffer.h"
48 #include "intel_clear.h"
49 #include "intel_extensions.h"
50 #include "intel_pixel.h"
51 #include "intel_regions.h"
52 #include "intel_buffer_objects.h"
53 #include "intel_fbo.h"
54 #include "intel_bufmgr.h"
55 #include "intel_screen.h"
56
57 #include "drirenderbuffer.h"
58 #include "utils.h"
59
60
61 #ifndef INTEL_DEBUG
62 int INTEL_DEBUG = (0);
63 #endif
64
65
66 #define DRIVER_DATE "20091221 DEVELOPMENT"
67 #define DRIVER_DATE_GEM "GEM " DRIVER_DATE
68
69
70 static const GLubyte *
71 intelGetString(GLcontext * ctx, GLenum name)
72 {
73 const struct intel_context *const intel = intel_context(ctx);
74 const char *chipset;
75 static char buffer[128];
76
77 switch (name) {
78 case GL_VENDOR:
79 return (GLubyte *) "Tungsten Graphics, Inc";
80 break;
81
82 case GL_RENDERER:
83 switch (intel->intelScreen->deviceID) {
84 case PCI_CHIP_845_G:
85 chipset = "Intel(R) 845G";
86 break;
87 case PCI_CHIP_I830_M:
88 chipset = "Intel(R) 830M";
89 break;
90 case PCI_CHIP_I855_GM:
91 chipset = "Intel(R) 852GM/855GM";
92 break;
93 case PCI_CHIP_I865_G:
94 chipset = "Intel(R) 865G";
95 break;
96 case PCI_CHIP_I915_G:
97 chipset = "Intel(R) 915G";
98 break;
99 case PCI_CHIP_E7221_G:
100 chipset = "Intel (R) E7221G (i915)";
101 break;
102 case PCI_CHIP_I915_GM:
103 chipset = "Intel(R) 915GM";
104 break;
105 case PCI_CHIP_I945_G:
106 chipset = "Intel(R) 945G";
107 break;
108 case PCI_CHIP_I945_GM:
109 chipset = "Intel(R) 945GM";
110 break;
111 case PCI_CHIP_I945_GME:
112 chipset = "Intel(R) 945GME";
113 break;
114 case PCI_CHIP_G33_G:
115 chipset = "Intel(R) G33";
116 break;
117 case PCI_CHIP_Q35_G:
118 chipset = "Intel(R) Q35";
119 break;
120 case PCI_CHIP_Q33_G:
121 chipset = "Intel(R) Q33";
122 break;
123 case PCI_CHIP_IGD_GM:
124 case PCI_CHIP_IGD_G:
125 chipset = "Intel(R) IGD";
126 break;
127 case PCI_CHIP_I965_Q:
128 chipset = "Intel(R) 965Q";
129 break;
130 case PCI_CHIP_I965_G:
131 case PCI_CHIP_I965_G_1:
132 chipset = "Intel(R) 965G";
133 break;
134 case PCI_CHIP_I946_GZ:
135 chipset = "Intel(R) 946GZ";
136 break;
137 case PCI_CHIP_I965_GM:
138 chipset = "Intel(R) 965GM";
139 break;
140 case PCI_CHIP_I965_GME:
141 chipset = "Intel(R) 965GME/GLE";
142 break;
143 case PCI_CHIP_GM45_GM:
144 chipset = "Mobile IntelĀ® GM45 Express Chipset";
145 break;
146 case PCI_CHIP_IGD_E_G:
147 chipset = "Intel(R) Integrated Graphics Device";
148 break;
149 case PCI_CHIP_G45_G:
150 chipset = "Intel(R) G45/G43";
151 break;
152 case PCI_CHIP_Q45_G:
153 chipset = "Intel(R) Q45/Q43";
154 break;
155 case PCI_CHIP_G41_G:
156 chipset = "Intel(R) G41";
157 break;
158 case PCI_CHIP_B43_G:
159 chipset = "Intel(R) B43";
160 break;
161 case PCI_CHIP_ILD_G:
162 chipset = "Intel(R) IGDNG_D";
163 break;
164 case PCI_CHIP_ILM_G:
165 chipset = "Intel(R) IGDNG_M";
166 break;
167 default:
168 chipset = "Unknown Intel Chipset";
169 break;
170 }
171
172 (void) driGetRendererString(buffer, chipset, DRIVER_DATE_GEM, 0);
173 return (GLubyte *) buffer;
174
175 default:
176 return NULL;
177 }
178 }
179
180 static unsigned
181 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
182 {
183 return _mesa_get_format_bytes(rb->Base.Format) * 8;
184 }
185
186 void
187 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
188 {
189 struct gl_framebuffer *fb = drawable->driverPrivate;
190 struct intel_renderbuffer *rb;
191 struct intel_region *region, *depth_region;
192 struct intel_context *intel = context->driverPrivate;
193 struct intel_renderbuffer *front_rb, *back_rb, *depth_rb, *stencil_rb;
194 __DRIbuffer *buffers = NULL;
195 __DRIscreen *screen;
196 int i, count;
197 unsigned int attachments[10];
198 const char *region_name;
199
200 if (INTEL_DEBUG & DEBUG_DRI)
201 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
202
203 screen = intel->intelScreen->driScrnPriv;
204
205 if (screen->dri2.loader
206 && (screen->dri2.loader->base.version > 2)
207 && (screen->dri2.loader->getBuffersWithFormat != NULL)) {
208
209 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
210 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
211 depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
212 stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
213
214 i = 0;
215 if ((intel->is_front_buffer_rendering ||
216 intel->is_front_buffer_reading ||
217 !back_rb) && front_rb) {
218 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
219 attachments[i++] = intel_bits_per_pixel(front_rb);
220 }
221
222 if (back_rb) {
223 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
224 attachments[i++] = intel_bits_per_pixel(back_rb);
225 }
226
227 if ((depth_rb != NULL) && (stencil_rb != NULL)) {
228 attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL;
229 attachments[i++] = intel_bits_per_pixel(depth_rb);
230 } else if (depth_rb != NULL) {
231 attachments[i++] = __DRI_BUFFER_DEPTH;
232 attachments[i++] = intel_bits_per_pixel(depth_rb);
233 } else if (stencil_rb != NULL) {
234 attachments[i++] = __DRI_BUFFER_STENCIL;
235 attachments[i++] = intel_bits_per_pixel(stencil_rb);
236 }
237
238 buffers =
239 (*screen->dri2.loader->getBuffersWithFormat)(drawable,
240 &drawable->w,
241 &drawable->h,
242 attachments, i / 2,
243 &count,
244 drawable->loaderPrivate);
245 } else if (screen->dri2.loader) {
246 i = 0;
247 if (intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT))
248 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
249 if (intel_get_renderbuffer(fb, BUFFER_BACK_LEFT))
250 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
251 if (intel_get_renderbuffer(fb, BUFFER_DEPTH))
252 attachments[i++] = __DRI_BUFFER_DEPTH;
253 if (intel_get_renderbuffer(fb, BUFFER_STENCIL))
254 attachments[i++] = __DRI_BUFFER_STENCIL;
255
256 buffers = (*screen->dri2.loader->getBuffers)(drawable,
257 &drawable->w,
258 &drawable->h,
259 attachments, i,
260 &count,
261 drawable->loaderPrivate);
262 }
263
264 if (buffers == NULL)
265 return;
266
267 drawable->x = 0;
268 drawable->y = 0;
269 drawable->backX = 0;
270 drawable->backY = 0;
271 drawable->numClipRects = 1;
272 drawable->pClipRects[0].x1 = 0;
273 drawable->pClipRects[0].y1 = 0;
274 drawable->pClipRects[0].x2 = drawable->w;
275 drawable->pClipRects[0].y2 = drawable->h;
276 drawable->numBackClipRects = 1;
277 drawable->pBackClipRects[0].x1 = 0;
278 drawable->pBackClipRects[0].y1 = 0;
279 drawable->pBackClipRects[0].x2 = drawable->w;
280 drawable->pBackClipRects[0].y2 = drawable->h;
281
282 depth_region = NULL;
283 for (i = 0; i < count; i++) {
284 switch (buffers[i].attachment) {
285 case __DRI_BUFFER_FRONT_LEFT:
286 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
287 region_name = "dri2 front buffer";
288 break;
289
290 case __DRI_BUFFER_FAKE_FRONT_LEFT:
291 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
292 region_name = "dri2 fake front buffer";
293 break;
294
295 case __DRI_BUFFER_BACK_LEFT:
296 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
297 region_name = "dri2 back buffer";
298 break;
299
300 case __DRI_BUFFER_DEPTH:
301 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
302 region_name = "dri2 depth buffer";
303 break;
304
305 case __DRI_BUFFER_DEPTH_STENCIL:
306 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
307 region_name = "dri2 depth / stencil buffer";
308 break;
309
310 case __DRI_BUFFER_STENCIL:
311 rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
312 region_name = "dri2 stencil buffer";
313 break;
314
315 case __DRI_BUFFER_ACCUM:
316 default:
317 fprintf(stderr,
318 "unhandled buffer attach event, attacment type %d\n",
319 buffers[i].attachment);
320 return;
321 }
322
323 if (rb == NULL)
324 continue;
325
326 if (rb->region && rb->region->name == buffers[i].name)
327 continue;
328
329 if (INTEL_DEBUG & DEBUG_DRI)
330 fprintf(stderr,
331 "attaching buffer %d, at %d, cpp %d, pitch %d\n",
332 buffers[i].name, buffers[i].attachment,
333 buffers[i].cpp, buffers[i].pitch);
334
335 if (buffers[i].attachment == __DRI_BUFFER_STENCIL && depth_region) {
336 if (INTEL_DEBUG & DEBUG_DRI)
337 fprintf(stderr, "(reusing depth buffer as stencil)\n");
338 intel_region_reference(&region, depth_region);
339 }
340 else
341 region = intel_region_alloc_for_handle(intel, buffers[i].cpp,
342 drawable->w,
343 drawable->h,
344 buffers[i].pitch / buffers[i].cpp,
345 buffers[i].name,
346 region_name);
347
348 if (buffers[i].attachment == __DRI_BUFFER_DEPTH)
349 depth_region = region;
350
351 intel_renderbuffer_set_region(rb, region);
352 intel_region_release(&region);
353
354 if (buffers[i].attachment == __DRI_BUFFER_DEPTH_STENCIL) {
355 rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
356 if (rb != NULL) {
357 struct intel_region *stencil_region = NULL;
358
359 if (rb->region && rb->region->name == buffers[i].name)
360 continue;
361
362 intel_region_reference(&stencil_region, region);
363 intel_renderbuffer_set_region(rb, stencil_region);
364 intel_region_release(&stencil_region);
365 }
366 }
367 }
368
369 driUpdateFramebufferSize(&intel->ctx, drawable);
370 drawable->lastStamp = drawable->dri2.stamp;
371 }
372
373 void
374 intel_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
375 {
376 struct intel_context *intel = intel_context(ctx);
377 __DRIcontext *driContext = intel->driContext;
378 void (*old_viewport)(GLcontext *ctx, GLint x, GLint y,
379 GLsizei w, GLsizei h);
380
381 if (!intel->meta.internal_viewport_call && ctx->DrawBuffer->Name == 0) {
382 /* If we're rendering to the fake front buffer, make sure all the pending
383 * drawing has landed on the real front buffer. Otherwise when we
384 * eventually get to DRI2GetBuffersWithFormat the stale real front
385 * buffer contents will get copied to the new fake front buffer.
386 */
387 if (intel->is_front_buffer_rendering) {
388 intel_flush(ctx, GL_FALSE);
389 }
390
391 intel_update_renderbuffers(driContext, driContext->driDrawablePriv);
392 if (driContext->driDrawablePriv != driContext->driReadablePriv)
393 intel_update_renderbuffers(driContext, driContext->driReadablePriv);
394 }
395
396 old_viewport = ctx->Driver.Viewport;
397 ctx->Driver.Viewport = NULL;
398 intel->driDrawable = driContext->driDrawablePriv;
399 intel_draw_buffer(ctx, intel->ctx.DrawBuffer);
400 ctx->Driver.Viewport = old_viewport;
401 }
402
403
404 static const struct dri_debug_control debug_control[] = {
405 { "tex", DEBUG_TEXTURE},
406 { "state", DEBUG_STATE},
407 { "ioctl", DEBUG_IOCTL},
408 { "blit", DEBUG_BLIT},
409 { "mip", DEBUG_MIPTREE},
410 { "fall", DEBUG_FALLBACKS},
411 { "verb", DEBUG_VERBOSE},
412 { "bat", DEBUG_BATCH},
413 { "pix", DEBUG_PIXEL},
414 { "buf", DEBUG_BUFMGR},
415 { "reg", DEBUG_REGION},
416 { "fbo", DEBUG_FBO},
417 { "lock", DEBUG_LOCK},
418 { "sync", DEBUG_SYNC},
419 { "prim", DEBUG_PRIMS },
420 { "vert", DEBUG_VERTS },
421 { "dri", DEBUG_DRI },
422 { "dma", DEBUG_DMA },
423 { "san", DEBUG_SANITY },
424 { "sleep", DEBUG_SLEEP },
425 { "stats", DEBUG_STATS },
426 { "tile", DEBUG_TILE },
427 { "sing", DEBUG_SINGLE_THREAD },
428 { "thre", DEBUG_SINGLE_THREAD },
429 { "wm", DEBUG_WM },
430 { "urb", DEBUG_URB },
431 { "vs", DEBUG_VS },
432 { NULL, 0 }
433 };
434
435
436 static void
437 intelInvalidateState(GLcontext * ctx, GLuint new_state)
438 {
439 struct intel_context *intel = intel_context(ctx);
440
441 _swrast_InvalidateState(ctx, new_state);
442 _swsetup_InvalidateState(ctx, new_state);
443 _vbo_InvalidateState(ctx, new_state);
444 _tnl_InvalidateState(ctx, new_state);
445 _tnl_invalidate_vertex_state(ctx, new_state);
446
447 intel->NewGLState |= new_state;
448
449 if (intel->vtbl.invalidate_state)
450 intel->vtbl.invalidate_state( intel, new_state );
451 }
452
453 void
454 intel_flush(GLcontext *ctx, GLboolean needs_mi_flush)
455 {
456 struct intel_context *intel = intel_context(ctx);
457
458 if (intel->Fallback)
459 _swrast_flush(ctx);
460
461 if (intel->gen < 4)
462 INTEL_FIREVERTICES(intel);
463
464 if (intel->batch->map != intel->batch->ptr)
465 intel_batchbuffer_flush(intel->batch);
466
467 if ((ctx->DrawBuffer->Name == 0) && intel->front_buffer_dirty) {
468 __DRIscreen *const screen = intel->intelScreen->driScrnPriv;
469
470 if (screen->dri2.loader &&
471 (screen->dri2.loader->base.version >= 2)
472 && (screen->dri2.loader->flushFrontBuffer != NULL) &&
473 intel->driDrawable && intel->driDrawable->loaderPrivate) {
474 (*screen->dri2.loader->flushFrontBuffer)(intel->driDrawable,
475 intel->driDrawable->loaderPrivate);
476
477 /* Only clear the dirty bit if front-buffer rendering is no longer
478 * enabled. This is done so that the dirty bit can only be set in
479 * glDrawBuffer. Otherwise the dirty bit would have to be set at
480 * each of N places that do rendering. This has worse performances,
481 * but it is much easier to get correct.
482 */
483 if (!intel->is_front_buffer_rendering) {
484 intel->front_buffer_dirty = GL_FALSE;
485 }
486 }
487 }
488 }
489
490 void
491 intelFlush(GLcontext * ctx)
492 {
493 intel_flush(ctx, GL_FALSE);
494 }
495
496 static void
497 intel_glFlush(GLcontext *ctx)
498 {
499 struct intel_context *intel = intel_context(ctx);
500
501 intel_flush(ctx, GL_TRUE);
502
503 /* We're using glFlush as an indicator that a frame is done, which is
504 * what DRI2 does before calling SwapBuffers (and means we should catch
505 * people doing front-buffer rendering, as well)..
506 *
507 * Wait for the swapbuffers before the one we just emitted, so we don't
508 * get too many swaps outstanding for apps that are GPU-heavy but not
509 * CPU-heavy.
510 *
511 * Unfortunately, we don't have a handle to the batch containing the swap,
512 * and getting our hands on that doesn't seem worth it, so we just us the
513 * first batch we emitted after the last swap.
514 */
515 if (!intel->using_dri2_swapbuffers &&
516 intel->first_post_swapbuffers_batch != NULL) {
517 drm_intel_bo_wait_rendering(intel->first_post_swapbuffers_batch);
518 drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
519 intel->first_post_swapbuffers_batch = NULL;
520 }
521 }
522
523 void
524 intelFinish(GLcontext * ctx)
525 {
526 struct gl_framebuffer *fb = ctx->DrawBuffer;
527 int i;
528
529 intelFlush(ctx);
530
531 for (i = 0; i < fb->_NumColorDrawBuffers; i++) {
532 struct intel_renderbuffer *irb;
533
534 irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]);
535
536 if (irb && irb->region)
537 dri_bo_wait_rendering(irb->region->buffer);
538 }
539 if (fb->_DepthBuffer) {
540 /* XXX: Wait on buffer idle */
541 }
542 }
543
544 void
545 intelInitDriverFunctions(struct dd_function_table *functions)
546 {
547 _mesa_init_driver_functions(functions);
548
549 functions->Flush = intel_glFlush;
550 functions->Finish = intelFinish;
551 functions->GetString = intelGetString;
552 functions->UpdateState = intelInvalidateState;
553
554 intelInitTextureFuncs(functions);
555 intelInitTextureImageFuncs(functions);
556 intelInitTextureSubImageFuncs(functions);
557 intelInitTextureCopyImageFuncs(functions);
558 intelInitStateFuncs(functions);
559 intelInitClearFuncs(functions);
560 intelInitBufferFuncs(functions);
561 intelInitPixelFuncs(functions);
562 intelInitBufferObjectFuncs(functions);
563 intel_init_syncobj_functions(functions);
564 }
565
566
567 GLboolean
568 intelInitContext(struct intel_context *intel,
569 const __GLcontextModes * mesaVis,
570 __DRIcontext * driContextPriv,
571 void *sharedContextPrivate,
572 struct dd_function_table *functions)
573 {
574 GLcontext *ctx = &intel->ctx;
575 GLcontext *shareCtx = (GLcontext *) sharedContextPrivate;
576 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
577 struct intel_screen *intelScreen = sPriv->private;
578 int bo_reuse_mode;
579
580 if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx,
581 functions, (void *) intel)) {
582 _mesa_printf("%s: failed to init mesa context\n", __FUNCTION__);
583 return GL_FALSE;
584 }
585
586 driContextPriv->driverPrivate = intel;
587 intel->intelScreen = intelScreen;
588 intel->driScreen = sPriv;
589 intel->driContext = driContextPriv;
590 intel->driFd = sPriv->fd;
591
592 if (IS_965(intel->intelScreen->deviceID)) {
593 intel->gen = 4;
594 } else if (IS_9XX(intel->intelScreen->deviceID)) {
595 intel->gen = 3;
596 if (IS_945(intel->intelScreen->deviceID)) {
597 intel->is_945 = GL_TRUE;
598 }
599 } else {
600 intel->gen = 2;
601 }
602
603 if (IS_IGDNG(intel->intelScreen->deviceID)) {
604 intel->is_ironlake = GL_TRUE;
605 intel->needs_ff_sync = GL_TRUE;
606 intel->has_luminance_srgb = GL_TRUE;
607 } else if (IS_G4X(intel->intelScreen->deviceID)) {
608 intel->has_luminance_srgb = GL_TRUE;
609 intel->is_g4x = GL_TRUE;
610 }
611
612 driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
613 intel->driScreen->myNum,
614 (intel->gen >= 4) ? "i965" : "i915");
615 if (intelScreen->deviceID == PCI_CHIP_I865_G)
616 intel->maxBatchSize = 4096;
617 else
618 intel->maxBatchSize = BATCH_SZ;
619
620 intel->bufmgr = intelScreen->bufmgr;
621
622 bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
623 switch (bo_reuse_mode) {
624 case DRI_CONF_BO_REUSE_DISABLED:
625 break;
626 case DRI_CONF_BO_REUSE_ALL:
627 intel_bufmgr_gem_enable_reuse(intel->bufmgr);
628 break;
629 }
630
631 /* This doesn't yet catch all non-conformant rendering, but it's a
632 * start.
633 */
634 if (getenv("INTEL_STRICT_CONFORMANCE")) {
635 unsigned int value = atoi(getenv("INTEL_STRICT_CONFORMANCE"));
636 if (value > 0) {
637 intel->conformance_mode = value;
638 }
639 else {
640 intel->conformance_mode = 1;
641 }
642 }
643
644 if (intel->conformance_mode > 0) {
645 ctx->Const.MinLineWidth = 1.0;
646 ctx->Const.MinLineWidthAA = 1.0;
647 ctx->Const.MaxLineWidth = 1.0;
648 ctx->Const.MaxLineWidthAA = 1.0;
649 ctx->Const.LineWidthGranularity = 1.0;
650 }
651 else {
652 ctx->Const.MinLineWidth = 1.0;
653 ctx->Const.MinLineWidthAA = 1.0;
654 ctx->Const.MaxLineWidth = 5.0;
655 ctx->Const.MaxLineWidthAA = 5.0;
656 ctx->Const.LineWidthGranularity = 0.5;
657 }
658
659 ctx->Const.MinPointSize = 1.0;
660 ctx->Const.MinPointSizeAA = 1.0;
661 ctx->Const.MaxPointSize = 255.0;
662 ctx->Const.MaxPointSizeAA = 3.0;
663 ctx->Const.PointSizeGranularity = 1.0;
664
665 /* reinitialize the context point state.
666 * It depend on constants in __GLcontextRec::Const
667 */
668 _mesa_init_point(ctx);
669
670 meta_init_metaops(ctx, &intel->meta);
671 ctx->Const.MaxColorAttachments = 4; /* XXX FBO: review this */
672 if (intel->gen >= 4) {
673 if (MAX_WIDTH > 8192)
674 ctx->Const.MaxRenderbufferSize = 8192;
675 } else {
676 if (MAX_WIDTH > 2048)
677 ctx->Const.MaxRenderbufferSize = 2048;
678 }
679
680 /* Initialize the software rasterizer and helper modules. */
681 _swrast_CreateContext(ctx);
682 _vbo_CreateContext(ctx);
683 _tnl_CreateContext(ctx);
684 _swsetup_CreateContext(ctx);
685
686 /* Configure swrast to match hardware characteristics: */
687 _swrast_allow_pixel_fog(ctx, GL_FALSE);
688 _swrast_allow_vertex_fog(ctx, GL_TRUE);
689
690 _mesa_meta_init(ctx);
691
692 intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
693 intel->hw_stipple = 1;
694
695 /* XXX FBO: this doesn't seem to be used anywhere */
696 switch (mesaVis->depthBits) {
697 case 0: /* what to do in this case? */
698 case 16:
699 intel->polygon_offset_scale = 1.0;
700 break;
701 case 24:
702 intel->polygon_offset_scale = 2.0; /* req'd to pass glean */
703 break;
704 default:
705 assert(0);
706 break;
707 }
708
709 if (intel->gen >= 4)
710 intel->polygon_offset_scale /= 0xffff;
711
712 intel->RenderIndex = ~0;
713
714 intelInitExtensions(ctx);
715
716 INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
717 if (INTEL_DEBUG & DEBUG_BUFMGR)
718 dri_bufmgr_set_debug(intel->bufmgr, GL_TRUE);
719
720 intel->batch = intel_batchbuffer_alloc(intel);
721
722 intel_fbo_init(intel);
723
724 if (intel->ctx.Mesa_DXTn) {
725 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
726 _mesa_enable_extension(ctx, "GL_S3_s3tc");
727 }
728 else if (driQueryOptionb(&intel->optionCache, "force_s3tc_enable")) {
729 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
730 }
731 intel->use_texture_tiling = driQueryOptionb(&intel->optionCache,
732 "texture_tiling");
733 if (intel->use_texture_tiling &&
734 !intel->intelScreen->kernel_exec_fencing) {
735 fprintf(stderr, "No kernel support for execution fencing, "
736 "disabling texture tiling\n");
737 intel->use_texture_tiling = GL_FALSE;
738 }
739 intel->use_early_z = driQueryOptionb(&intel->optionCache, "early_z");
740
741 intel->prim.primitive = ~0;
742
743 /* Force all software fallbacks */
744 if (driQueryOptionb(&intel->optionCache, "no_rast")) {
745 fprintf(stderr, "disabling 3D rasterization\n");
746 intel->no_rast = 1;
747 }
748
749 if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) {
750 fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
751 intel->always_flush_batch = 1;
752 }
753
754 if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) {
755 fprintf(stderr, "flushing GPU caches before/after each draw call\n");
756 intel->always_flush_cache = 1;
757 }
758
759 /* Disable all hardware rendering (skip emitting batches and fences/waits
760 * to the kernel)
761 */
762 intel->no_hw = getenv("INTEL_NO_HW") != NULL;
763
764 return GL_TRUE;
765 }
766
767 void
768 intelDestroyContext(__DRIcontext * driContextPriv)
769 {
770 struct intel_context *intel =
771 (struct intel_context *) driContextPriv->driverPrivate;
772
773 assert(intel); /* should never be null */
774 if (intel) {
775 GLboolean release_texture_heaps;
776
777 INTEL_FIREVERTICES(intel);
778
779 _mesa_meta_free(&intel->ctx);
780
781 meta_destroy_metaops(&intel->meta);
782
783 intel->vtbl.destroy(intel);
784
785 release_texture_heaps = (intel->ctx.Shared->RefCount == 1);
786 _swsetup_DestroyContext(&intel->ctx);
787 _tnl_DestroyContext(&intel->ctx);
788 _vbo_DestroyContext(&intel->ctx);
789
790 _swrast_DestroyContext(&intel->ctx);
791 intel->Fallback = 0x0; /* don't call _swrast_Flush later */
792
793 intel_batchbuffer_free(intel->batch);
794 intel->batch = NULL;
795
796 free(intel->prim.vb);
797 intel->prim.vb = NULL;
798 dri_bo_unreference(intel->prim.vb_bo);
799 intel->prim.vb_bo = NULL;
800 dri_bo_unreference(intel->first_post_swapbuffers_batch);
801 intel->first_post_swapbuffers_batch = NULL;
802
803 if (release_texture_heaps) {
804 /* Nothing is currently done here to free texture heaps;
805 * but we're not using the texture heap utilities, so I
806 * rather think we shouldn't. I've taken a look, and can't
807 * find any private texture data hanging around anywhere, but
808 * I'm not yet certain there isn't any at all...
809 */
810 /* if (INTEL_DEBUG & DEBUG_TEXTURE)
811 fprintf(stderr, "do something to free texture heaps\n");
812 */
813 }
814
815 driDestroyOptionCache(&intel->optionCache);
816
817 /* free the Mesa context */
818 _mesa_free_context_data(&intel->ctx);
819
820 FREE(intel);
821 driContextPriv->driverPrivate = NULL;
822 }
823 }
824
825 GLboolean
826 intelUnbindContext(__DRIcontext * driContextPriv)
827 {
828 struct intel_context *intel =
829 (struct intel_context *) driContextPriv->driverPrivate;
830
831 /* Deassociate the context with the drawables.
832 */
833 intel->driDrawable = NULL;
834 intel->driReadDrawable = NULL;
835
836 return GL_TRUE;
837 }
838
839 GLboolean
840 intelMakeCurrent(__DRIcontext * driContextPriv,
841 __DRIdrawable * driDrawPriv,
842 __DRIdrawable * driReadPriv)
843 {
844 struct intel_context *intel;
845 GET_CURRENT_CONTEXT(curCtx);
846
847 if (driContextPriv)
848 intel = (struct intel_context *) driContextPriv->driverPrivate;
849 else
850 intel = NULL;
851
852 /* According to the glXMakeCurrent() man page: "Pending commands to
853 * the previous context, if any, are flushed before it is released."
854 * But only flush if we're actually changing contexts.
855 */
856 if (intel_context(curCtx) && intel_context(curCtx) != intel) {
857 _mesa_flush(curCtx);
858 }
859
860 if (driContextPriv) {
861 struct gl_framebuffer *fb = driDrawPriv->driverPrivate;
862 struct gl_framebuffer *readFb = driReadPriv->driverPrivate;
863
864 intel_update_renderbuffers(driContextPriv, driDrawPriv);
865 if (driDrawPriv != driReadPriv)
866 intel_update_renderbuffers(driContextPriv, driReadPriv);
867
868 /* set GLframebuffer size to match window, if needed */
869 driUpdateFramebufferSize(&intel->ctx, driDrawPriv);
870
871 if (driReadPriv != driDrawPriv) {
872 driUpdateFramebufferSize(&intel->ctx, driReadPriv);
873 }
874
875 _mesa_make_current(&intel->ctx, fb, readFb);
876 intel->driReadDrawable = driReadPriv;
877 intel->driDrawable = driDrawPriv;
878 intel_draw_buffer(&intel->ctx, fb);
879 }
880 else {
881 _mesa_make_current(NULL, NULL, NULL);
882 }
883
884 return GL_TRUE;
885 }