src/mesa/drivers/dri/intel/intel_context.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #ifndef INTELCONTEXT_INC
  29 #define INTELCONTEXT_INC
  30
  31
  32 #include <stdbool.h>
  33 #include "main/mtypes.h"
  34 #include "main/mm.h"
  35
  36 #ifdef __cplusplus
  37 extern "C" {
  38         /* Evil hack for using libdrm in a c++ compiler. */
  39         #define virtual virt
  40 #endif
  41
  42 #include "drm.h"
  43 #include "intel_bufmgr.h"
  44
  45 #include "intel_screen.h"
  46 #include "intel_tex_obj.h"
  47 #include "i915_drm.h"
  48
  49 #ifdef __cplusplus
  50         #undef virtual
  51 }
  52 #endif
  53
  54 #include "tnl/t_vertex.h"
  55
  56 #define TAG(x) intel##x
  57 #include "tnl_dd/t_dd_vertex.h"
  58 #undef TAG
  59
  60 #define DV_PF_555  (1<<8)
  61 #define DV_PF_565  (2<<8)
  62 #define DV_PF_8888 (3<<8)
  63 #define DV_PF_4444 (8<<8)
  64 #define DV_PF_1555 (9<<8)
  65
  66 struct intel_region;
  67 struct intel_context;
  68
  69 typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
  70                                 intelVertex *, intelVertex *);
  71 typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
  72                                  intelVertex *);
  73 typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
  74
  75 /**
  76  * Bits for intel->Fallback field
  77  */
  78 /*@{*/
  79 #define INTEL_FALLBACK_DRAW_BUFFER       0x1
  80 #define INTEL_FALLBACK_READ_BUFFER       0x2
  81 #define INTEL_FALLBACK_DEPTH_BUFFER      0x4
  82 #define INTEL_FALLBACK_STENCIL_BUFFER    0x8
  83 #define INTEL_FALLBACK_USER              0x10
  84 #define INTEL_FALLBACK_RENDERMODE        0x20
  85 #define INTEL_FALLBACK_TEXTURE           0x40
  86 #define INTEL_FALLBACK_DRIVER            0x1000  /**< first for drivers */
  87 /*@}*/
  88
  89 extern void intelFallback(struct intel_context *intel, GLbitfield bit,
  90                           bool mode);
  91 #define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
  92
  93
  94 #define INTEL_WRITE_PART  0x1
  95 #define INTEL_WRITE_FULL  0x2
  96 #define INTEL_READ        0x4
  97
  98 #define INTEL_MAX_FIXUP 64
  99
 100 #ifndef likely
 101 #ifdef __GNUC__
 102 #define likely(expr) (__builtin_expect(expr, 1))
 103 #define unlikely(expr) (__builtin_expect(expr, 0))
 104 #else
 105 #define likely(expr) (expr)
 106 #define unlikely(expr) (expr)
 107 #endif
 108 #endif
 109
 110 struct intel_sync_object {
 111    struct gl_sync_object Base;
 112
 113    /** Batch associated with this sync object */
 114    drm_intel_bo *bo;
 115 };
 116
 117 /**
 118  * intel_context is derived from Mesa's context class: struct gl_context.
 119  */
 120 struct intel_context
 121 {
 122    struct gl_context ctx;  /**< base class, must be first field */
 123
 124    struct
 125    {
 126       void (*destroy) (struct intel_context * intel);
 127       void (*emit_state) (struct intel_context * intel);
 128       void (*finish_batch) (struct intel_context * intel);
 129       void (*new_batch) (struct intel_context * intel);
 130       void (*emit_invarient_state) (struct intel_context * intel);
 131       void (*update_texture_state) (struct intel_context * intel);
 132
 133       void (*render_start) (struct intel_context * intel);
 134       void (*render_prevalidate) (struct intel_context * intel);
 135       void (*set_draw_region) (struct intel_context * intel,
 136                                struct intel_region * draw_regions[],
 137                                struct intel_region * depth_region,
 138                                GLuint num_regions);
 139       void (*update_draw_buffer)(struct intel_context *intel);
 140
 141       void (*reduced_primitive_state) (struct intel_context * intel,
 142                                        GLenum rprim);
 143
 144       bool (*check_vertex_size) (struct intel_context * intel,
 145                                       GLuint expected);
 146       void (*invalidate_state) (struct intel_context *intel,
 147                                 GLuint new_state);
 148
 149       void (*assert_not_dirty) (struct intel_context *intel);
 150
 151       void (*debug_batch)(struct intel_context *intel);
 152       bool (*render_target_supported)(gl_format format);
 153
 154       /** Can HiZ be enabled on a depthbuffer of the given format? */
 155       bool (*is_hiz_depth_format)(struct intel_context *intel,
 156                                   gl_format format);
 157
 158       /**
 159        * \name HiZ operations
 160        *
 161        * See the following sections of the Sandy Bridge PRM, Volume 1, Part2:
 162        *   - 7.5.3.1 Depth Buffer Clear
 163        *   - 7.5.3.2 Depth Buffer Resolve
 164        *   - 7.5.3.3 Hierarchical Depth Buffer Resolve
 165        * \{
 166        */
 167       void (*hiz_resolve_depthbuffer)(struct intel_context *intel,
 168                                       struct intel_region *depth_region);
 169       void (*hiz_resolve_hizbuffer)(struct intel_context *intel,
 170                                     struct intel_region *depth_region);
 171       /** \} */
 172
 173    } vtbl;
 174
 175    GLbitfield Fallback;  /**< mask of INTEL_FALLBACK_x bits */
 176    GLuint NewGLState;
 177
 178    dri_bufmgr *bufmgr;
 179    unsigned int maxBatchSize;
 180
 181    /**
 182     * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
 183     */
 184    int gen;
 185    int gt;
 186    bool needs_ff_sync;
 187    bool is_g4x;
 188    bool is_945;
 189    bool has_separate_stencil;
 190    bool must_use_separate_stencil;
 191    bool has_hiz;
 192
 193    int urb_size;
 194
 195    struct intel_batchbuffer {
 196       /** Current batchbuffer being queued up. */
 197       drm_intel_bo *bo;
 198       /** Last BO submitted to the hardware.  Used for glFinish(). */
 199       drm_intel_bo *last_bo;
 200       /** BO for post-sync nonzero writes for gen6 workaround. */
 201       drm_intel_bo *workaround_bo;
 202       bool need_workaround_flush;
 203
 204       struct cached_batch_item *cached_items;
 205
 206       uint16_t emit, total;
 207       uint16_t used, reserved_space;
 208       uint32_t map[8192];
 209 #define BATCH_SZ (8192*sizeof(uint32_t))
 210
 211       uint32_t state_batch_offset;
 212       bool is_blit;
 213
 214       struct {
 215          uint16_t used;
 216          int reloc_count;
 217       } saved;
 218    } batch;
 219
 220    drm_intel_bo *first_post_swapbuffers_batch;
 221    bool need_throttle;
 222    bool no_batch_wrap;
 223    bool tnl_pipeline_running; /**< Set while i915's _tnl_run_pipeline. */
 224
 225    struct
 226    {
 227       GLuint id;
 228       uint32_t start_ptr; /**< for i8xx */
 229       uint32_t primitive;       /**< Current hardware primitive type */
 230       void (*flush) (struct intel_context *);
 231       drm_intel_bo *vb_bo;
 232       uint8_t *vb;
 233       unsigned int start_offset; /**< Byte offset of primitive sequence */
 234       unsigned int current_offset; /**< Byte offset of next vertex */
 235       unsigned int count;       /**< Number of vertices in current primitive */
 236    } prim;
 237
 238    struct {
 239       drm_intel_bo *bo;
 240       GLuint offset;
 241       uint32_t buffer_len;
 242       uint32_t buffer_offset;
 243       char buffer[4096];
 244    } upload;
 245
 246    GLuint stats_wm;
 247
 248    /* Offsets of fields within the current vertex:
 249     */
 250    GLuint coloroffset;
 251    GLuint specoffset;
 252    GLuint wpos_offset;
 253
 254    struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
 255    GLuint vertex_attr_count;
 256
 257    GLfloat polygon_offset_scale;        /* dependent on depth_scale, bpp */
 258
 259    bool hw_stencil;
 260    bool hw_stipple;
 261    bool depth_buffer_is_float;
 262    bool no_rast;
 263    bool always_flush_batch;
 264    bool always_flush_cache;
 265
 266    /* 0 - nonconformant, best performance;
 267     * 1 - fallback to sw for known conformance bugs
 268     * 2 - always fallback to sw
 269     */
 270    GLuint conformance_mode;
 271
 272    /* State for intelvb.c and inteltris.c.
 273     */
 274    GLuint RenderIndex;
 275    GLmatrix ViewportMatrix;
 276    GLenum render_primitive;
 277    GLenum reduced_primitive; /*< Only gen < 6 */
 278    GLuint vertex_size;
 279    GLubyte *verts;              /* points to tnl->clipspace.vertex_buf */
 280
 281    /* Fallback rasterization functions
 282     */
 283    intel_point_func draw_point;
 284    intel_line_func draw_line;
 285    intel_tri_func draw_tri;
 286
 287    /**
 288     * Set if rendering has occured to the drawable's front buffer.
 289     *
 290     * This is used in the DRI2 case to detect that glFlush should also copy
 291     * the contents of the fake front buffer to the real front buffer.
 292     */
 293    bool front_buffer_dirty;
 294
 295    /**
 296     * Track whether front-buffer rendering is currently enabled
 297     *
 298     * A separate flag is used to track this in order to support MRT more
 299     * easily.
 300     */
 301    bool is_front_buffer_rendering;
 302    /**
 303     * Track whether front-buffer is the current read target.
 304     *
 305     * This is closely associated with is_front_buffer_rendering, but may
 306     * be set separately.  The DRI2 fake front buffer must be referenced
 307     * either way.
 308     */
 309    bool is_front_buffer_reading;
 310
 311    /**
 312     * Count of intel_regions that are mapped.
 313     *
 314     * This allows us to assert that no batch buffer is emitted if a
 315     * region is mapped.
 316     */
 317    int num_mapped_regions;
 318
 319    bool use_texture_tiling;
 320    bool use_early_z;
 321
 322    int driFd;
 323
 324    __DRIcontext *driContext;
 325    struct intel_screen *intelScreen;
 326    void (*saved_viewport)(struct gl_context * ctx,
 327                           GLint x, GLint y, GLsizei width, GLsizei height);
 328
 329    /**
 330     * Configuration cache
 331     */
 332    driOptionCache optionCache;
 333 };
 334
 335 extern char *__progname;
 336
 337
 338 #define SUBPIXEL_X 0.125
 339 #define SUBPIXEL_Y 0.125
 340
 341 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
 342
 343 /**
 344  * Align a value up to an alignment value
 345  *
 346  * If \c value is not already aligned to the requested alignment value, it
 347  * will be rounded up.
 348  *
 349  * \param value  Value to be rounded
 350  * \param alignment  Alignment value to be used.  This must be a power of two.
 351  *
 352  * \sa ROUND_DOWN_TO()
 353  */
 354 #define ALIGN(value, alignment)  (((value) + alignment - 1) & ~(alignment - 1))
 355
 356 /**
 357  * Align a value down to an alignment value
 358  *
 359  * If \c value is not already aligned to the requested alignment value, it
 360  * will be rounded down.
 361  *
 362  * \param value  Value to be rounded
 363  * \param alignment  Alignment value to be used.  This must be a power of two.
 364  *
 365  * \sa ALIGN()
 366  */
 367 #define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1))
 368
 369 #define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0)
 370
 371 static INLINE uint32_t
 372 U_FIXED(float value, uint32_t frac_bits)
 373 {
 374    value *= (1 << frac_bits);
 375    return value < 0 ? 0 : value;
 376 }
 377
 378 static INLINE uint32_t
 379 S_FIXED(float value, uint32_t frac_bits)
 380 {
 381    return value * (1 << frac_bits);
 382 }
 383
 384 #define INTEL_FIREVERTICES(intel)               \
 385 do {                                            \
 386    if ((intel)->prim.flush)                     \
 387       (intel)->prim.flush(intel);               \
 388 } while (0)
 389
 390 /* ================================================================
 391  * From linux kernel i386 header files, copes with odd sizes better
 392  * than COPY_DWORDS would:
 393  * XXX Put this in src/mesa/main/imports.h ???
 394  */
 395 #if defined(i386) || defined(__i386__)
 396 static INLINE void * __memcpy(void * to, const void * from, size_t n)
 397 {
 398    int d0, d1, d2;
 399    __asm__ __volatile__(
 400       "rep ; movsl\n\t"
 401       "testb $2,%b4\n\t"
 402       "je 1f\n\t"
 403       "movsw\n"
 404       "1:\ttestb $1,%b4\n\t"
 405       "je 2f\n\t"
 406       "movsb\n"
 407       "2:"
 408       : "=&c" (d0), "=&D" (d1), "=&S" (d2)
 409       :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
 410       : "memory");
 411    return (to);
 412 }
 413 #else
 414 #define __memcpy(a,b,c) memcpy(a,b,c)
 415 #endif
 416
 417
 418 /* ================================================================
 419  * Debugging:
 420  */
 421 extern int INTEL_DEBUG;
 422
 423 #define DEBUG_TEXTURE   0x1
 424 #define DEBUG_STATE     0x2
 425 #define DEBUG_IOCTL     0x4
 426 #define DEBUG_BLIT      0x8
 427 #define DEBUG_MIPTREE   0x10
 428 #define DEBUG_FALLBACKS 0x20
 429 #define DEBUG_VERBOSE   0x40
 430 #define DEBUG_BATCH     0x80
 431 #define DEBUG_PIXEL     0x100
 432 #define DEBUG_BUFMGR    0x200
 433 #define DEBUG_REGION    0x400
 434 #define DEBUG_FBO       0x800
 435 #define DEBUG_GS        0x1000
 436 #define DEBUG_SYNC      0x2000
 437 #define DEBUG_PRIMS     0x4000
 438 #define DEBUG_VERTS     0x8000
 439 #define DEBUG_DRI       0x10000
 440 #define DEBUG_SF        0x20000
 441 #define DEBUG_SANITY    0x40000
 442 #define DEBUG_SLEEP     0x80000
 443 #define DEBUG_STATS     0x100000
 444 #define DEBUG_TILE      0x200000
 445 #define DEBUG_WM        0x400000
 446 #define DEBUG_URB       0x800000
 447 #define DEBUG_VS        0x1000000
 448 #define DEBUG_CLIP      0x2000000
 449
 450 #define DBG(...) do {                                           \
 451         if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG))            \
 452                 printf(__VA_ARGS__);                    \
 453 } while(0)
 454
 455 #define fallback_debug(...) do {                                \
 456         if (unlikely(INTEL_DEBUG & DEBUG_FALLBACKS))            \
 457                 printf(__VA_ARGS__);                            \
 458 } while(0)
 459
 460 #define PCI_CHIP_845_G                  0x2562
 461 #define PCI_CHIP_I830_M                 0x3577
 462 #define PCI_CHIP_I855_GM                0x3582
 463 #define PCI_CHIP_I865_G                 0x2572
 464 #define PCI_CHIP_I915_G                 0x2582
 465 #define PCI_CHIP_I915_GM                0x2592
 466 #define PCI_CHIP_I945_G                 0x2772
 467 #define PCI_CHIP_I945_GM                0x27A2
 468 #define PCI_CHIP_I945_GME               0x27AE
 469 #define PCI_CHIP_G33_G                  0x29C2
 470 #define PCI_CHIP_Q35_G                  0x29B2
 471 #define PCI_CHIP_Q33_G                  0x29D2
 472
 473
 474 /* ================================================================
 475  * intel_context.c:
 476  */
 477
 478 extern bool intelInitContext(struct intel_context *intel,
 479                                   int api,
 480                                   const struct gl_config * mesaVis,
 481                                   __DRIcontext * driContextPriv,
 482                                   void *sharedContextPrivate,
 483                                   struct dd_function_table *functions);
 484
 485 extern void intelFinish(struct gl_context * ctx);
 486 extern void intel_flush_rendering_to_batch(struct gl_context *ctx);
 487 extern void intel_flush(struct gl_context * ctx);
 488
 489 extern void intelInitDriverFunctions(struct dd_function_table *functions);
 490
 491 void intel_init_syncobj_functions(struct dd_function_table *functions);
 492
 493
 494 /* ================================================================
 495  * intel_state.c:
 496  */
 497 extern void intelInitStateFuncs(struct dd_function_table *functions);
 498
 499 #define COMPAREFUNC_ALWAYS              0
 500 #define COMPAREFUNC_NEVER               0x1
 501 #define COMPAREFUNC_LESS                0x2
 502 #define COMPAREFUNC_EQUAL               0x3
 503 #define COMPAREFUNC_LEQUAL              0x4
 504 #define COMPAREFUNC_GREATER             0x5
 505 #define COMPAREFUNC_NOTEQUAL            0x6
 506 #define COMPAREFUNC_GEQUAL              0x7
 507
 508 #define STENCILOP_KEEP                  0
 509 #define STENCILOP_ZERO                  0x1
 510 #define STENCILOP_REPLACE               0x2
 511 #define STENCILOP_INCRSAT               0x3
 512 #define STENCILOP_DECRSAT               0x4
 513 #define STENCILOP_INCR                  0x5
 514 #define STENCILOP_DECR                  0x6
 515 #define STENCILOP_INVERT                0x7
 516
 517 #define LOGICOP_CLEAR                   0
 518 #define LOGICOP_NOR                     0x1
 519 #define LOGICOP_AND_INV                 0x2
 520 #define LOGICOP_COPY_INV                0x3
 521 #define LOGICOP_AND_RVRSE               0x4
 522 #define LOGICOP_INV                     0x5
 523 #define LOGICOP_XOR                     0x6
 524 #define LOGICOP_NAND                    0x7
 525 #define LOGICOP_AND                     0x8
 526 #define LOGICOP_EQUIV                   0x9
 527 #define LOGICOP_NOOP                    0xa
 528 #define LOGICOP_OR_INV                  0xb
 529 #define LOGICOP_COPY                    0xc
 530 #define LOGICOP_OR_RVRSE                0xd
 531 #define LOGICOP_OR                      0xe
 532 #define LOGICOP_SET                     0xf
 533
 534 #define BLENDFACT_ZERO                  0x01
 535 #define BLENDFACT_ONE                   0x02
 536 #define BLENDFACT_SRC_COLR              0x03
 537 #define BLENDFACT_INV_SRC_COLR          0x04
 538 #define BLENDFACT_SRC_ALPHA             0x05
 539 #define BLENDFACT_INV_SRC_ALPHA         0x06
 540 #define BLENDFACT_DST_ALPHA             0x07
 541 #define BLENDFACT_INV_DST_ALPHA         0x08
 542 #define BLENDFACT_DST_COLR              0x09
 543 #define BLENDFACT_INV_DST_COLR          0x0a
 544 #define BLENDFACT_SRC_ALPHA_SATURATE    0x0b
 545 #define BLENDFACT_CONST_COLOR           0x0c
 546 #define BLENDFACT_INV_CONST_COLOR       0x0d
 547 #define BLENDFACT_CONST_ALPHA           0x0e
 548 #define BLENDFACT_INV_CONST_ALPHA       0x0f
 549 #define BLENDFACT_MASK                  0x0f
 550
 551 enum {
 552    DRI_CONF_BO_REUSE_DISABLED,
 553    DRI_CONF_BO_REUSE_ALL
 554 };
 555
 556 extern int intel_translate_shadow_compare_func(GLenum func);
 557 extern int intel_translate_compare_func(GLenum func);
 558 extern int intel_translate_stencil_op(GLenum op);
 559 extern int intel_translate_blend_factor(GLenum factor);
 560 extern int intel_translate_logic_op(GLenum opcode);
 561
 562 void intel_update_renderbuffers(__DRIcontext *context,
 563                                 __DRIdrawable *drawable);
 564 void intel_prepare_render(struct intel_context *intel);
 565
 566 void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
 567                                   uint32_t buffer_id);
 568
 569 /*======================================================================
 570  * Inline conversion functions.
 571  * These are better-typed than the macros used previously:
 572  */
 573 static INLINE struct intel_context *
 574 intel_context(struct gl_context * ctx)
 575 {
 576    return (struct intel_context *) ctx;
 577 }
 578
 579 static INLINE bool
 580 is_power_of_two(uint32_t value)
 581 {
 582    return (value & (value - 1)) == 0;
 583 }
 584
 585 #endif