2d352090a5a06f229ba5471e7e76b26e3f208480
[mesa.git] / src / mesa / drivers / dri / intel / intel_context.h
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef INTELCONTEXT_INC
29 #define INTELCONTEXT_INC
30
31
32
33 #include "main/mtypes.h"
34 #include "main/mm.h"
35 #include "texmem.h"
36 #include "dri_metaops.h"
37 #include "drm.h"
38 #include "intel_bufmgr.h"
39
40 #include "intel_screen.h"
41 #include "intel_tex_obj.h"
42 #include "i915_drm.h"
43 #include "tnl/t_vertex.h"
44
45 #define TAG(x) intel##x
46 #include "tnl_dd/t_dd_vertex.h"
47 #undef TAG
48
49 #define DV_PF_555 (1<<8)
50 #define DV_PF_565 (2<<8)
51 #define DV_PF_8888 (3<<8)
52 #define DV_PF_4444 (8<<8)
53 #define DV_PF_1555 (9<<8)
54
55 struct intel_region;
56 struct intel_context;
57
58 typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
59 intelVertex *, intelVertex *);
60 typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
61 intelVertex *);
62 typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
63
64 /**
65 * Bits for intel->Fallback field
66 */
67 /*@{*/
68 #define INTEL_FALLBACK_DRAW_BUFFER 0x1
69 #define INTEL_FALLBACK_READ_BUFFER 0x2
70 #define INTEL_FALLBACK_DEPTH_BUFFER 0x4
71 #define INTEL_FALLBACK_STENCIL_BUFFER 0x8
72 #define INTEL_FALLBACK_USER 0x10
73 #define INTEL_FALLBACK_RENDERMODE 0x20
74 #define INTEL_FALLBACK_TEXTURE 0x40
75 #define INTEL_FALLBACK_DRIVER 0x1000 /**< first for drivers */
76 /*@}*/
77
78 extern void intelFallback(struct intel_context *intel, GLbitfield bit,
79 GLboolean mode);
80 #define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
81
82
83 #define INTEL_WRITE_PART 0x1
84 #define INTEL_WRITE_FULL 0x2
85 #define INTEL_READ 0x4
86
87 #define INTEL_MAX_FIXUP 64
88
89 struct intel_sync_object {
90 struct gl_sync_object Base;
91
92 /** Batch associated with this sync object */
93 drm_intel_bo *bo;
94 };
95
96 /**
97 * intel_context is derived from Mesa's context class: GLcontext.
98 */
99 struct intel_context
100 {
101 GLcontext ctx; /**< base class, must be first field */
102
103 struct
104 {
105 void (*destroy) (struct intel_context * intel);
106 void (*emit_state) (struct intel_context * intel);
107 void (*finish_batch) (struct intel_context * intel);
108 void (*new_batch) (struct intel_context * intel);
109 void (*emit_invarient_state) (struct intel_context * intel);
110 void (*note_fence) (struct intel_context *intel, GLuint fence);
111 void (*update_texture_state) (struct intel_context * intel);
112
113 void (*render_start) (struct intel_context * intel);
114 void (*render_prevalidate) (struct intel_context * intel);
115 void (*set_draw_region) (struct intel_context * intel,
116 struct intel_region * draw_regions[],
117 struct intel_region * depth_region,
118 GLuint num_regions);
119
120 void (*reduced_primitive_state) (struct intel_context * intel,
121 GLenum rprim);
122
123 GLboolean (*check_vertex_size) (struct intel_context * intel,
124 GLuint expected);
125 void (*invalidate_state) (struct intel_context *intel,
126 GLuint new_state);
127
128
129 /* Metaops:
130 */
131 void (*install_meta_state) (struct intel_context * intel);
132 void (*leave_meta_state) (struct intel_context * intel);
133
134 void (*meta_draw_region) (struct intel_context * intel,
135 struct intel_region * draw_region,
136 struct intel_region * depth_region);
137
138 void (*meta_color_mask) (struct intel_context * intel, GLboolean);
139
140 void (*meta_stencil_replace) (struct intel_context * intel,
141 GLuint mask, GLuint clear);
142
143 void (*meta_depth_replace) (struct intel_context * intel);
144
145 void (*meta_texture_blend_replace) (struct intel_context * intel);
146
147 void (*meta_no_stencil_write) (struct intel_context * intel);
148 void (*meta_no_depth_write) (struct intel_context * intel);
149 void (*meta_no_texture) (struct intel_context * intel);
150
151 void (*meta_import_pixel_state) (struct intel_context * intel);
152 void (*meta_frame_buffer_texture) (struct intel_context *intel,
153 GLint xoff, GLint yoff);
154
155 GLboolean(*meta_tex_rect_source) (struct intel_context * intel,
156 dri_bo * buffer,
157 GLuint offset,
158 GLuint pitch,
159 GLuint height,
160 GLenum format, GLenum type);
161
162 void (*assert_not_dirty) (struct intel_context *intel);
163
164 void (*debug_batch)(struct intel_context *intel);
165 } vtbl;
166
167 struct dri_metaops meta;
168
169 GLbitfield Fallback; /**< mask of INTEL_FALLBACK_x bits */
170 GLuint NewGLState;
171
172 dri_bufmgr *bufmgr;
173 unsigned int maxBatchSize;
174
175 /**
176 * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
177 */
178 int gen;
179
180 struct intel_region *front_region;
181 struct intel_region *back_region;
182 struct intel_region *depth_region;
183
184 /**
185 * This value indicates that the kernel memory manager is being used
186 * instead of the fake client-side memory manager.
187 */
188 GLboolean ttm;
189
190 struct intel_batchbuffer *batch;
191 drm_intel_bo *first_post_swapbuffers_batch;
192 GLboolean no_batch_wrap;
193
194 struct
195 {
196 GLuint id;
197 uint32_t primitive; /**< Current hardware primitive type */
198 void (*flush) (struct intel_context *);
199 GLubyte *start_ptr; /**< for i8xx */
200 dri_bo *vb_bo;
201 uint8_t *vb;
202 unsigned int start_offset; /**< Byte offset of primitive sequence */
203 unsigned int current_offset; /**< Byte offset of next vertex */
204 unsigned int count; /**< Number of vertices in current primitive */
205 } prim;
206
207 GLuint stats_wm;
208 GLboolean locked;
209 char *prevLockFile;
210 int prevLockLine;
211
212 /* Offsets of fields within the current vertex:
213 */
214 GLuint coloroffset;
215 GLuint specoffset;
216 GLuint wpos_offset;
217 GLuint wpos_size;
218
219 struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
220 GLuint vertex_attr_count;
221
222 GLfloat polygon_offset_scale; /* dependent on depth_scale, bpp */
223
224 GLboolean hw_stencil;
225 GLboolean hw_stipple;
226 GLboolean depth_buffer_is_float;
227 GLboolean no_rast;
228 GLboolean always_flush_batch;
229 GLboolean always_flush_cache;
230
231 /* 0 - nonconformant, best performance;
232 * 1 - fallback to sw for known conformance bugs
233 * 2 - always fallback to sw
234 */
235 GLuint conformance_mode;
236
237 /* State for intelvb.c and inteltris.c.
238 */
239 GLuint RenderIndex;
240 GLmatrix ViewportMatrix;
241 GLenum render_primitive;
242 GLenum reduced_primitive;
243 GLuint vertex_size;
244 GLubyte *verts; /* points to tnl->clipspace.vertex_buf */
245
246 /* Fallback rasterization functions
247 */
248 intel_point_func draw_point;
249 intel_line_func draw_line;
250 intel_tri_func draw_tri;
251
252 /**
253 * Set to true if a single constant cliprect should be used in the
254 * batchbuffer. Otherwise, cliprects must be calculated at batchbuffer
255 * flush time while the lock is held.
256 */
257 GLboolean constant_cliprect;
258
259 /**
260 * In !constant_cliprect mode, set to true if the front cliprects should be
261 * used instead of back.
262 */
263 GLboolean front_cliprects;
264
265 /**
266 * Set if rendering has occured to the drawable's front buffer.
267 *
268 * This is used in the DRI2 case to detect that glFlush should also copy
269 * the contents of the fake front buffer to the real front buffer.
270 */
271 GLboolean front_buffer_dirty;
272
273 /**
274 * Track whether front-buffer rendering is currently enabled
275 *
276 * A separate flag is used to track this in order to support MRT more
277 * easily.
278 */
279 GLboolean is_front_buffer_rendering;
280 /**
281 * Track whether front-buffer is the current read target.
282 *
283 * This is closely associated with is_front_buffer_rendering, but may
284 * be set separately. The DRI2 fake front buffer must be referenced
285 * either way.
286 */
287 GLboolean is_front_buffer_reading;
288
289 GLboolean use_texture_tiling;
290 GLboolean use_early_z;
291 drm_clip_rect_t fboRect; /**< cliprect for FBO rendering */
292
293 int perf_boxes;
294
295 GLuint do_usleeps;
296 int do_irqs;
297 GLuint irqsEmitted;
298
299 GLboolean scissor;
300 drm_clip_rect_t draw_rect;
301 drm_clip_rect_t scissor_rect;
302
303 drm_context_t hHWContext;
304 drmLock *driHwLock;
305 int driFd;
306
307 __DRIcontextPrivate *driContext;
308 __DRIdrawablePrivate *driDrawable;
309 __DRIdrawablePrivate *driReadDrawable;
310 __DRIscreenPrivate *driScreen;
311 intelScreenPrivate *intelScreen;
312 volatile drm_i915_sarea_t *sarea;
313
314 GLuint lastStamp;
315
316 GLboolean no_hw;
317
318 /**
319 * Configuration cache
320 */
321 driOptionCache optionCache;
322
323 int64_t swap_ust;
324 int64_t swap_missed_ust;
325
326 GLuint swap_count;
327 GLuint swap_missed_count;
328 };
329
330 /* These are functions now:
331 */
332 void LOCK_HARDWARE( struct intel_context *intel );
333 void UNLOCK_HARDWARE( struct intel_context *intel );
334
335 extern char *__progname;
336
337
338 #define SUBPIXEL_X 0.125
339 #define SUBPIXEL_Y 0.125
340
341 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
342 #define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1))
343 #define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0)
344
345 static inline uint32_t
346 U_FIXED(float value, uint32_t frac_bits)
347 {
348 value *= (1 << frac_bits);
349 return value < 0 ? 0 : value;
350 }
351
352 static inline uint32_t
353 S_FIXED(float value, uint32_t frac_bits)
354 {
355 return value * (1 << frac_bits);
356 }
357
358 #define INTEL_FIREVERTICES(intel) \
359 do { \
360 if ((intel)->prim.flush) \
361 (intel)->prim.flush(intel); \
362 } while (0)
363
364 /* ================================================================
365 * Color packing:
366 */
367
368 #define INTEL_PACKCOLOR4444(r,g,b,a) \
369 ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
370
371 #define INTEL_PACKCOLOR1555(r,g,b,a) \
372 ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \
373 ((a) ? 0x8000 : 0))
374
375 #define INTEL_PACKCOLOR565(r,g,b) \
376 ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
377
378 #define INTEL_PACKCOLOR8888(r,g,b,a) \
379 ((a<<24) | (r<<16) | (g<<8) | b)
380
381 #define INTEL_PACKCOLOR(format, r, g, b, a) \
382 (format == DV_PF_555 ? INTEL_PACKCOLOR1555(r,g,b,a) : \
383 (format == DV_PF_565 ? INTEL_PACKCOLOR565(r,g,b) : \
384 (format == DV_PF_8888 ? INTEL_PACKCOLOR8888(r,g,b,a) : \
385 0)))
386
387 /* ================================================================
388 * From linux kernel i386 header files, copes with odd sizes better
389 * than COPY_DWORDS would:
390 * XXX Put this in src/mesa/main/imports.h ???
391 */
392 #if defined(i386) || defined(__i386__)
393 static INLINE void * __memcpy(void * to, const void * from, size_t n)
394 {
395 int d0, d1, d2;
396 __asm__ __volatile__(
397 "rep ; movsl\n\t"
398 "testb $2,%b4\n\t"
399 "je 1f\n\t"
400 "movsw\n"
401 "1:\ttestb $1,%b4\n\t"
402 "je 2f\n\t"
403 "movsb\n"
404 "2:"
405 : "=&c" (d0), "=&D" (d1), "=&S" (d2)
406 :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
407 : "memory");
408 return (to);
409 }
410 #else
411 #define __memcpy(a,b,c) memcpy(a,b,c)
412 #endif
413
414
415 /* ================================================================
416 * Debugging:
417 */
418 extern int INTEL_DEBUG;
419
420 #define DEBUG_TEXTURE 0x1
421 #define DEBUG_STATE 0x2
422 #define DEBUG_IOCTL 0x4
423 #define DEBUG_BLIT 0x8
424 #define DEBUG_MIPTREE 0x10
425 #define DEBUG_FALLBACKS 0x20
426 #define DEBUG_VERBOSE 0x40
427 #define DEBUG_BATCH 0x80
428 #define DEBUG_PIXEL 0x100
429 #define DEBUG_BUFMGR 0x200
430 #define DEBUG_REGION 0x400
431 #define DEBUG_FBO 0x800
432 #define DEBUG_LOCK 0x1000
433 #define DEBUG_SYNC 0x2000
434 #define DEBUG_PRIMS 0x4000
435 #define DEBUG_VERTS 0x8000
436 #define DEBUG_DRI 0x10000
437 #define DEBUG_DMA 0x20000
438 #define DEBUG_SANITY 0x40000
439 #define DEBUG_SLEEP 0x80000
440 #define DEBUG_STATS 0x100000
441 #define DEBUG_TILE 0x200000
442 #define DEBUG_SINGLE_THREAD 0x400000
443 #define DEBUG_WM 0x800000
444 #define DEBUG_URB 0x1000000
445 #define DEBUG_VS 0x2000000
446
447 #define DBG(...) do { \
448 if (INTEL_DEBUG & FILE_DEBUG_FLAG) \
449 _mesa_printf(__VA_ARGS__); \
450 } while(0)
451
452 #define PCI_CHIP_845_G 0x2562
453 #define PCI_CHIP_I830_M 0x3577
454 #define PCI_CHIP_I855_GM 0x3582
455 #define PCI_CHIP_I865_G 0x2572
456 #define PCI_CHIP_I915_G 0x2582
457 #define PCI_CHIP_I915_GM 0x2592
458 #define PCI_CHIP_I945_G 0x2772
459 #define PCI_CHIP_I945_GM 0x27A2
460 #define PCI_CHIP_I945_GME 0x27AE
461 #define PCI_CHIP_G33_G 0x29C2
462 #define PCI_CHIP_Q35_G 0x29B2
463 #define PCI_CHIP_Q33_G 0x29D2
464
465
466 /* ================================================================
467 * intel_context.c:
468 */
469
470 extern GLboolean intelInitContext(struct intel_context *intel,
471 const __GLcontextModes * mesaVis,
472 __DRIcontextPrivate * driContextPriv,
473 void *sharedContextPrivate,
474 struct dd_function_table *functions);
475
476 extern void intelGetLock(struct intel_context *intel, GLuint flags);
477
478 extern void intelFinish(GLcontext * ctx);
479 extern void intelFlush(GLcontext * ctx);
480
481 extern void intelInitDriverFunctions(struct dd_function_table *functions);
482
483 void intel_init_syncobj_functions(struct dd_function_table *functions);
484
485
486 /* ================================================================
487 * intel_state.c:
488 */
489 extern void intelInitStateFuncs(struct dd_function_table *functions);
490
491 #define COMPAREFUNC_ALWAYS 0
492 #define COMPAREFUNC_NEVER 0x1
493 #define COMPAREFUNC_LESS 0x2
494 #define COMPAREFUNC_EQUAL 0x3
495 #define COMPAREFUNC_LEQUAL 0x4
496 #define COMPAREFUNC_GREATER 0x5
497 #define COMPAREFUNC_NOTEQUAL 0x6
498 #define COMPAREFUNC_GEQUAL 0x7
499
500 #define STENCILOP_KEEP 0
501 #define STENCILOP_ZERO 0x1
502 #define STENCILOP_REPLACE 0x2
503 #define STENCILOP_INCRSAT 0x3
504 #define STENCILOP_DECRSAT 0x4
505 #define STENCILOP_INCR 0x5
506 #define STENCILOP_DECR 0x6
507 #define STENCILOP_INVERT 0x7
508
509 #define LOGICOP_CLEAR 0
510 #define LOGICOP_NOR 0x1
511 #define LOGICOP_AND_INV 0x2
512 #define LOGICOP_COPY_INV 0x3
513 #define LOGICOP_AND_RVRSE 0x4
514 #define LOGICOP_INV 0x5
515 #define LOGICOP_XOR 0x6
516 #define LOGICOP_NAND 0x7
517 #define LOGICOP_AND 0x8
518 #define LOGICOP_EQUIV 0x9
519 #define LOGICOP_NOOP 0xa
520 #define LOGICOP_OR_INV 0xb
521 #define LOGICOP_COPY 0xc
522 #define LOGICOP_OR_RVRSE 0xd
523 #define LOGICOP_OR 0xe
524 #define LOGICOP_SET 0xf
525
526 #define BLENDFACT_ZERO 0x01
527 #define BLENDFACT_ONE 0x02
528 #define BLENDFACT_SRC_COLR 0x03
529 #define BLENDFACT_INV_SRC_COLR 0x04
530 #define BLENDFACT_SRC_ALPHA 0x05
531 #define BLENDFACT_INV_SRC_ALPHA 0x06
532 #define BLENDFACT_DST_ALPHA 0x07
533 #define BLENDFACT_INV_DST_ALPHA 0x08
534 #define BLENDFACT_DST_COLR 0x09
535 #define BLENDFACT_INV_DST_COLR 0x0a
536 #define BLENDFACT_SRC_ALPHA_SATURATE 0x0b
537 #define BLENDFACT_CONST_COLOR 0x0c
538 #define BLENDFACT_INV_CONST_COLOR 0x0d
539 #define BLENDFACT_CONST_ALPHA 0x0e
540 #define BLENDFACT_INV_CONST_ALPHA 0x0f
541 #define BLENDFACT_MASK 0x0f
542
543 enum {
544 DRI_CONF_BO_REUSE_DISABLED,
545 DRI_CONF_BO_REUSE_ALL
546 };
547
548 extern int intel_translate_shadow_compare_func(GLenum func);
549 extern int intel_translate_compare_func(GLenum func);
550 extern int intel_translate_stencil_op(GLenum op);
551 extern int intel_translate_blend_factor(GLenum factor);
552 extern int intel_translate_logic_op(GLenum opcode);
553
554 void intel_viewport(GLcontext * ctx, GLint x, GLint y,
555 GLsizei width, GLsizei height);
556
557 void intel_update_renderbuffers(__DRIcontext *context,
558 __DRIdrawable *drawable);
559
560 void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
561 uint32_t buffer_id);
562
563 /*======================================================================
564 * Inline conversion functions.
565 * These are better-typed than the macros used previously:
566 */
567 static INLINE struct intel_context *
568 intel_context(GLcontext * ctx)
569 {
570 return (struct intel_context *) ctx;
571 }
572
573 static INLINE GLboolean
574 is_power_of_two(uint32_t value)
575 {
576 return (value & (value - 1)) == 0;
577 }
578
579 static inline void
580 intel_bo_map_gtt_preferred(struct intel_context *intel,
581 drm_intel_bo *bo,
582 GLboolean write)
583 {
584 if (intel->intelScreen->kernel_exec_fencing)
585 drm_intel_gem_bo_map_gtt(bo);
586 else
587 drm_intel_bo_map(bo, write);
588 }
589
590 static inline void
591 intel_bo_unmap_gtt_preferred(struct intel_context *intel,
592 drm_intel_bo *bo)
593 {
594 if (intel->intelScreen->kernel_exec_fencing)
595 drm_intel_gem_bo_unmap_gtt(bo);
596 else
597 drm_intel_bo_unmap(bo);
598 }
599
600 #endif