src/mesa/drivers/dri/intel/intel_context.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #ifndef INTELCONTEXT_INC
  29 #define INTELCONTEXT_INC
  30
  31
  32 #include <stdbool.h>
  33 #include "main/mtypes.h"
  34 #include "main/mm.h"
  35
  36 #ifdef __cplusplus
  37 extern "C" {
  38         /* Evil hack for using libdrm in a c++ compiler. */
  39         #define virtual virt
  40 #endif
  41
  42 #include "drm.h"
  43 #include "intel_bufmgr.h"
  44
  45 #include "intel_screen.h"
  46 #include "intel_tex_obj.h"
  47 #include "i915_drm.h"
  48
  49 #ifdef __cplusplus
  50         #undef virtual
  51 }
  52 #endif
  53
  54 #include "tnl/t_vertex.h"
  55
  56 #define TAG(x) intel##x
  57 #include "tnl_dd/t_dd_vertex.h"
  58 #undef TAG
  59
  60 #define DV_PF_555  (1<<8)
  61 #define DV_PF_565  (2<<8)
  62 #define DV_PF_8888 (3<<8)
  63 #define DV_PF_4444 (8<<8)
  64 #define DV_PF_1555 (9<<8)
  65
  66 struct intel_region;
  67 struct intel_context;
  68
  69 typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
  70                                 intelVertex *, intelVertex *);
  71 typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
  72                                  intelVertex *);
  73 typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
  74
  75 /**
  76  * Bits for intel->Fallback field
  77  */
  78 /*@{*/
  79 #define INTEL_FALLBACK_DRAW_BUFFER       0x1
  80 #define INTEL_FALLBACK_READ_BUFFER       0x2
  81 #define INTEL_FALLBACK_DEPTH_BUFFER      0x4
  82 #define INTEL_FALLBACK_STENCIL_BUFFER    0x8
  83 #define INTEL_FALLBACK_USER              0x10
  84 #define INTEL_FALLBACK_RENDERMODE        0x20
  85 #define INTEL_FALLBACK_TEXTURE           0x40
  86 #define INTEL_FALLBACK_DRIVER            0x1000  /**< first for drivers */
  87 /*@}*/
  88
  89 extern void intelFallback(struct intel_context *intel, GLbitfield bit,
  90                           bool mode);
  91 #define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
  92
  93
  94 #define INTEL_WRITE_PART  0x1
  95 #define INTEL_WRITE_FULL  0x2
  96 #define INTEL_READ        0x4
  97
  98 #define INTEL_MAX_FIXUP 64
  99
 100 #ifndef likely
 101 #ifdef __GNUC__
 102 #define likely(expr) (__builtin_expect(expr, 1))
 103 #define unlikely(expr) (__builtin_expect(expr, 0))
 104 #else
 105 #define likely(expr) (expr)
 106 #define unlikely(expr) (expr)
 107 #endif
 108 #endif
 109
 110 struct intel_sync_object {
 111    struct gl_sync_object Base;
 112
 113    /** Batch associated with this sync object */
 114    drm_intel_bo *bo;
 115 };
 116
 117 /**
 118  * intel_context is derived from Mesa's context class: struct gl_context.
 119  */
 120 struct intel_context
 121 {
 122    struct gl_context ctx;  /**< base class, must be first field */
 123
 124    struct
 125    {
 126       void (*destroy) (struct intel_context * intel);
 127       void (*emit_state) (struct intel_context * intel);
 128       void (*finish_batch) (struct intel_context * intel);
 129       void (*new_batch) (struct intel_context * intel);
 130       void (*emit_invarient_state) (struct intel_context * intel);
 131       void (*update_texture_state) (struct intel_context * intel);
 132
 133       void (*render_start) (struct intel_context * intel);
 134       void (*render_prevalidate) (struct intel_context * intel);
 135       void (*set_draw_region) (struct intel_context * intel,
 136                                struct intel_region * draw_regions[],
 137                                struct intel_region * depth_region,
 138                                GLuint num_regions);
 139       void (*update_draw_buffer)(struct intel_context *intel);
 140
 141       void (*reduced_primitive_state) (struct intel_context * intel,
 142                                        GLenum rprim);
 143
 144       bool (*check_vertex_size) (struct intel_context * intel,
 145                                       GLuint expected);
 146       void (*invalidate_state) (struct intel_context *intel,
 147                                 GLuint new_state);
 148
 149       void (*assert_not_dirty) (struct intel_context *intel);
 150
 151       void (*debug_batch)(struct intel_context *intel);
 152       bool (*render_target_supported)(gl_format format);
 153
 154       /** Can HiZ be enabled on a depthbuffer of the given format? */
 155       bool (*is_hiz_depth_format)(struct intel_context *intel,
 156                                   gl_format format);
 157    } vtbl;
 158
 159    GLbitfield Fallback;  /**< mask of INTEL_FALLBACK_x bits */
 160    GLuint NewGLState;
 161
 162    dri_bufmgr *bufmgr;
 163    unsigned int maxBatchSize;
 164
 165    /**
 166     * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
 167     */
 168    int gen;
 169    int gt;
 170    bool needs_ff_sync;
 171    bool is_g4x;
 172    bool is_945;
 173    bool has_separate_stencil;
 174    bool must_use_separate_stencil;
 175    bool has_hiz;
 176
 177    int urb_size;
 178
 179    struct intel_batchbuffer {
 180       /** Current batchbuffer being queued up. */
 181       drm_intel_bo *bo;
 182       /** Last BO submitted to the hardware.  Used for glFinish(). */
 183       drm_intel_bo *last_bo;
 184       /** BO for post-sync nonzero writes for gen6 workaround. */
 185       drm_intel_bo *workaround_bo;
 186       bool need_workaround_flush;
 187
 188       struct cached_batch_item *cached_items;
 189
 190       uint16_t emit, total;
 191       uint16_t used, reserved_space;
 192       uint32_t map[8192];
 193 #define BATCH_SZ (8192*sizeof(uint32_t))
 194
 195       uint32_t state_batch_offset;
 196       bool is_blit;
 197    } batch;
 198
 199    drm_intel_bo *first_post_swapbuffers_batch;
 200    bool need_throttle;
 201    bool no_batch_wrap;
 202    bool tnl_pipeline_running; /**< Set while i915's _tnl_run_pipeline. */
 203
 204    struct
 205    {
 206       GLuint id;
 207       uint32_t start_ptr; /**< for i8xx */
 208       uint32_t primitive;       /**< Current hardware primitive type */
 209       void (*flush) (struct intel_context *);
 210       drm_intel_bo *vb_bo;
 211       uint8_t *vb;
 212       unsigned int start_offset; /**< Byte offset of primitive sequence */
 213       unsigned int current_offset; /**< Byte offset of next vertex */
 214       unsigned int count;       /**< Number of vertices in current primitive */
 215    } prim;
 216
 217    struct {
 218       drm_intel_bo *bo;
 219       GLuint offset;
 220       uint32_t buffer_len;
 221       uint32_t buffer_offset;
 222       char buffer[4096];
 223    } upload;
 224
 225    GLuint stats_wm;
 226
 227    /* Offsets of fields within the current vertex:
 228     */
 229    GLuint coloroffset;
 230    GLuint specoffset;
 231    GLuint wpos_offset;
 232
 233    struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
 234    GLuint vertex_attr_count;
 235
 236    GLfloat polygon_offset_scale;        /* dependent on depth_scale, bpp */
 237
 238    bool hw_stencil;
 239    bool hw_stipple;
 240    bool depth_buffer_is_float;
 241    bool no_rast;
 242    bool always_flush_batch;
 243    bool always_flush_cache;
 244
 245    /* 0 - nonconformant, best performance;
 246     * 1 - fallback to sw for known conformance bugs
 247     * 2 - always fallback to sw
 248     */
 249    GLuint conformance_mode;
 250
 251    /* State for intelvb.c and inteltris.c.
 252     */
 253    GLuint RenderIndex;
 254    GLmatrix ViewportMatrix;
 255    GLenum render_primitive;
 256    GLenum reduced_primitive; /*< Only gen < 6 */
 257    GLuint vertex_size;
 258    GLubyte *verts;              /* points to tnl->clipspace.vertex_buf */
 259
 260    /* Fallback rasterization functions
 261     */
 262    intel_point_func draw_point;
 263    intel_line_func draw_line;
 264    intel_tri_func draw_tri;
 265
 266    /**
 267     * Set if rendering has occured to the drawable's front buffer.
 268     *
 269     * This is used in the DRI2 case to detect that glFlush should also copy
 270     * the contents of the fake front buffer to the real front buffer.
 271     */
 272    bool front_buffer_dirty;
 273
 274    /**
 275     * Track whether front-buffer rendering is currently enabled
 276     *
 277     * A separate flag is used to track this in order to support MRT more
 278     * easily.
 279     */
 280    bool is_front_buffer_rendering;
 281    /**
 282     * Track whether front-buffer is the current read target.
 283     *
 284     * This is closely associated with is_front_buffer_rendering, but may
 285     * be set separately.  The DRI2 fake front buffer must be referenced
 286     * either way.
 287     */
 288    bool is_front_buffer_reading;
 289
 290    /**
 291     * Count of intel_regions that are mapped.
 292     *
 293     * This allows us to assert that no batch buffer is emitted if a
 294     * region is mapped.
 295     */
 296    int num_mapped_regions;
 297
 298    bool use_texture_tiling;
 299    bool use_early_z;
 300
 301    int driFd;
 302
 303    __DRIcontext *driContext;
 304    struct intel_screen *intelScreen;
 305    void (*saved_viewport)(struct gl_context * ctx,
 306                           GLint x, GLint y, GLsizei width, GLsizei height);
 307
 308    /**
 309     * Configuration cache
 310     */
 311    driOptionCache optionCache;
 312 };
 313
 314 extern char *__progname;
 315
 316
 317 #define SUBPIXEL_X 0.125
 318 #define SUBPIXEL_Y 0.125
 319
 320 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
 321
 322 /**
 323  * Align a value up to an alignment value
 324  *
 325  * If \c value is not already aligned to the requested alignment value, it
 326  * will be rounded up.
 327  *
 328  * \param value  Value to be rounded
 329  * \param alignment  Alignment value to be used.  This must be a power of two.
 330  *
 331  * \sa ROUND_DOWN_TO()
 332  */
 333 #define ALIGN(value, alignment)  (((value) + alignment - 1) & ~(alignment - 1))
 334
 335 /**
 336  * Align a value down to an alignment value
 337  *
 338  * If \c value is not already aligned to the requested alignment value, it
 339  * will be rounded down.
 340  *
 341  * \param value  Value to be rounded
 342  * \param alignment  Alignment value to be used.  This must be a power of two.
 343  *
 344  * \sa ALIGN()
 345  */
 346 #define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1))
 347
 348 #define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0)
 349
 350 static INLINE uint32_t
 351 U_FIXED(float value, uint32_t frac_bits)
 352 {
 353    value *= (1 << frac_bits);
 354    return value < 0 ? 0 : value;
 355 }
 356
 357 static INLINE uint32_t
 358 S_FIXED(float value, uint32_t frac_bits)
 359 {
 360    return value * (1 << frac_bits);
 361 }
 362
 363 #define INTEL_FIREVERTICES(intel)               \
 364 do {                                            \
 365    if ((intel)->prim.flush)                     \
 366       (intel)->prim.flush(intel);               \
 367 } while (0)
 368
 369 /* ================================================================
 370  * From linux kernel i386 header files, copes with odd sizes better
 371  * than COPY_DWORDS would:
 372  * XXX Put this in src/mesa/main/imports.h ???
 373  */
 374 #if defined(i386) || defined(__i386__)
 375 static INLINE void * __memcpy(void * to, const void * from, size_t n)
 376 {
 377    int d0, d1, d2;
 378    __asm__ __volatile__(
 379       "rep ; movsl\n\t"
 380       "testb $2,%b4\n\t"
 381       "je 1f\n\t"
 382       "movsw\n"
 383       "1:\ttestb $1,%b4\n\t"
 384       "je 2f\n\t"
 385       "movsb\n"
 386       "2:"
 387       : "=&c" (d0), "=&D" (d1), "=&S" (d2)
 388       :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
 389       : "memory");
 390    return (to);
 391 }
 392 #else
 393 #define __memcpy(a,b,c) memcpy(a,b,c)
 394 #endif
 395
 396
 397 /* ================================================================
 398  * Debugging:
 399  */
 400 extern int INTEL_DEBUG;
 401
 402 #define DEBUG_TEXTURE   0x1
 403 #define DEBUG_STATE     0x2
 404 #define DEBUG_IOCTL     0x4
 405 #define DEBUG_BLIT      0x8
 406 #define DEBUG_MIPTREE   0x10
 407 #define DEBUG_FALLBACKS 0x20
 408 #define DEBUG_VERBOSE   0x40
 409 #define DEBUG_BATCH     0x80
 410 #define DEBUG_PIXEL     0x100
 411 #define DEBUG_BUFMGR    0x200
 412 #define DEBUG_REGION    0x400
 413 #define DEBUG_FBO       0x800
 414 #define DEBUG_GS        0x1000
 415 #define DEBUG_SYNC      0x2000
 416 #define DEBUG_PRIMS     0x4000
 417 #define DEBUG_VERTS     0x8000
 418 #define DEBUG_DRI       0x10000
 419 #define DEBUG_SF        0x20000
 420 #define DEBUG_SANITY    0x40000
 421 #define DEBUG_SLEEP     0x80000
 422 #define DEBUG_STATS     0x100000
 423 #define DEBUG_TILE      0x200000
 424 #define DEBUG_SINGLE_THREAD   0x400000
 425 #define DEBUG_WM        0x800000
 426 #define DEBUG_URB       0x1000000
 427 #define DEBUG_VS        0x2000000
 428 #define DEBUG_CLIP      0x8000000
 429
 430 #define DBG(...) do {                                           \
 431         if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG))            \
 432                 printf(__VA_ARGS__);                    \
 433 } while(0)
 434
 435 #define fallback_debug(...) do {                                \
 436         if (unlikely(INTEL_DEBUG & DEBUG_FALLBACKS))            \
 437                 printf(__VA_ARGS__);                            \
 438 } while(0)
 439
 440 #define PCI_CHIP_845_G                  0x2562
 441 #define PCI_CHIP_I830_M                 0x3577
 442 #define PCI_CHIP_I855_GM                0x3582
 443 #define PCI_CHIP_I865_G                 0x2572
 444 #define PCI_CHIP_I915_G                 0x2582
 445 #define PCI_CHIP_I915_GM                0x2592
 446 #define PCI_CHIP_I945_G                 0x2772
 447 #define PCI_CHIP_I945_GM                0x27A2
 448 #define PCI_CHIP_I945_GME               0x27AE
 449 #define PCI_CHIP_G33_G                  0x29C2
 450 #define PCI_CHIP_Q35_G                  0x29B2
 451 #define PCI_CHIP_Q33_G                  0x29D2
 452
 453
 454 /* ================================================================
 455  * intel_context.c:
 456  */
 457
 458 extern bool intelInitContext(struct intel_context *intel,
 459                                   int api,
 460                                   const struct gl_config * mesaVis,
 461                                   __DRIcontext * driContextPriv,
 462                                   void *sharedContextPrivate,
 463                                   struct dd_function_table *functions);
 464
 465 extern void intelFinish(struct gl_context * ctx);
 466 extern void intel_flush(struct gl_context * ctx);
 467
 468 extern void intelInitDriverFunctions(struct dd_function_table *functions);
 469
 470 void intel_init_syncobj_functions(struct dd_function_table *functions);
 471
 472
 473 /* ================================================================
 474  * intel_state.c:
 475  */
 476 extern void intelInitStateFuncs(struct dd_function_table *functions);
 477
 478 #define COMPAREFUNC_ALWAYS              0
 479 #define COMPAREFUNC_NEVER               0x1
 480 #define COMPAREFUNC_LESS                0x2
 481 #define COMPAREFUNC_EQUAL               0x3
 482 #define COMPAREFUNC_LEQUAL              0x4
 483 #define COMPAREFUNC_GREATER             0x5
 484 #define COMPAREFUNC_NOTEQUAL            0x6
 485 #define COMPAREFUNC_GEQUAL              0x7
 486
 487 #define STENCILOP_KEEP                  0
 488 #define STENCILOP_ZERO                  0x1
 489 #define STENCILOP_REPLACE               0x2
 490 #define STENCILOP_INCRSAT               0x3
 491 #define STENCILOP_DECRSAT               0x4
 492 #define STENCILOP_INCR                  0x5
 493 #define STENCILOP_DECR                  0x6
 494 #define STENCILOP_INVERT                0x7
 495
 496 #define LOGICOP_CLEAR                   0
 497 #define LOGICOP_NOR                     0x1
 498 #define LOGICOP_AND_INV                 0x2
 499 #define LOGICOP_COPY_INV                0x3
 500 #define LOGICOP_AND_RVRSE               0x4
 501 #define LOGICOP_INV                     0x5
 502 #define LOGICOP_XOR                     0x6
 503 #define LOGICOP_NAND                    0x7
 504 #define LOGICOP_AND                     0x8
 505 #define LOGICOP_EQUIV                   0x9
 506 #define LOGICOP_NOOP                    0xa
 507 #define LOGICOP_OR_INV                  0xb
 508 #define LOGICOP_COPY                    0xc
 509 #define LOGICOP_OR_RVRSE                0xd
 510 #define LOGICOP_OR                      0xe
 511 #define LOGICOP_SET                     0xf
 512
 513 #define BLENDFACT_ZERO                  0x01
 514 #define BLENDFACT_ONE                   0x02
 515 #define BLENDFACT_SRC_COLR              0x03
 516 #define BLENDFACT_INV_SRC_COLR          0x04
 517 #define BLENDFACT_SRC_ALPHA             0x05
 518 #define BLENDFACT_INV_SRC_ALPHA         0x06
 519 #define BLENDFACT_DST_ALPHA             0x07
 520 #define BLENDFACT_INV_DST_ALPHA         0x08
 521 #define BLENDFACT_DST_COLR              0x09
 522 #define BLENDFACT_INV_DST_COLR          0x0a
 523 #define BLENDFACT_SRC_ALPHA_SATURATE    0x0b
 524 #define BLENDFACT_CONST_COLOR           0x0c
 525 #define BLENDFACT_INV_CONST_COLOR       0x0d
 526 #define BLENDFACT_CONST_ALPHA           0x0e
 527 #define BLENDFACT_INV_CONST_ALPHA       0x0f
 528 #define BLENDFACT_MASK                  0x0f
 529
 530 enum {
 531    DRI_CONF_BO_REUSE_DISABLED,
 532    DRI_CONF_BO_REUSE_ALL
 533 };
 534
 535 extern int intel_translate_shadow_compare_func(GLenum func);
 536 extern int intel_translate_compare_func(GLenum func);
 537 extern int intel_translate_stencil_op(GLenum op);
 538 extern int intel_translate_blend_factor(GLenum factor);
 539 extern int intel_translate_logic_op(GLenum opcode);
 540
 541 void intel_update_renderbuffers(__DRIcontext *context,
 542                                 __DRIdrawable *drawable);
 543 void intel_prepare_render(struct intel_context *intel);
 544
 545 void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
 546                                   uint32_t buffer_id);
 547
 548 /*======================================================================
 549  * Inline conversion functions.
 550  * These are better-typed than the macros used previously:
 551  */
 552 static INLINE struct intel_context *
 553 intel_context(struct gl_context * ctx)
 554 {
 555    return (struct intel_context *) ctx;
 556 }
 557
 558 static INLINE bool
 559 is_power_of_two(uint32_t value)
 560 {
 561    return (value & (value - 1)) == 0;
 562 }
 563
 564 #endif