dri: Remove driver GenerateMipmap hooks.
[mesa.git] / src / mesa / drivers / dri / intel / intel_context.h
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef INTELCONTEXT_INC
29 #define INTELCONTEXT_INC
30
31
32 #include <stdbool.h>
33 #include "main/mtypes.h"
34 #include "main/mm.h"
35
36 #ifdef __cplusplus
37 extern "C" {
38 /* Evil hack for using libdrm in a c++ compiler. */
39 #define virtual virt
40 #endif
41
42 #include "drm.h"
43 #include "intel_bufmgr.h"
44
45 #include "intel_screen.h"
46 #include "intel_tex_obj.h"
47 #include "i915_drm.h"
48
49 #ifdef __cplusplus
50 #undef virtual
51 }
52 #endif
53
54 #include "tnl/t_vertex.h"
55
56 #define TAG(x) intel##x
57 #include "tnl_dd/t_dd_vertex.h"
58 #undef TAG
59
60 #define DV_PF_555 (1<<8)
61 #define DV_PF_565 (2<<8)
62 #define DV_PF_8888 (3<<8)
63 #define DV_PF_4444 (8<<8)
64 #define DV_PF_1555 (9<<8)
65
66 struct intel_region;
67 struct intel_context;
68
69 typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
70 intelVertex *, intelVertex *);
71 typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
72 intelVertex *);
73 typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
74
75 /**
76 * Bits for intel->Fallback field
77 */
78 /*@{*/
79 #define INTEL_FALLBACK_DRAW_BUFFER 0x1
80 #define INTEL_FALLBACK_READ_BUFFER 0x2
81 #define INTEL_FALLBACK_DEPTH_BUFFER 0x4
82 #define INTEL_FALLBACK_STENCIL_BUFFER 0x8
83 #define INTEL_FALLBACK_USER 0x10
84 #define INTEL_FALLBACK_RENDERMODE 0x20
85 #define INTEL_FALLBACK_TEXTURE 0x40
86 #define INTEL_FALLBACK_DRIVER 0x1000 /**< first for drivers */
87 /*@}*/
88
89 extern void intelFallback(struct intel_context *intel, GLbitfield bit,
90 bool mode);
91 #define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
92
93
94 #define INTEL_WRITE_PART 0x1
95 #define INTEL_WRITE_FULL 0x2
96 #define INTEL_READ 0x4
97
98 #define INTEL_MAX_FIXUP 64
99
100 #ifndef likely
101 #ifdef __GNUC__
102 #define likely(expr) (__builtin_expect(expr, 1))
103 #define unlikely(expr) (__builtin_expect(expr, 0))
104 #else
105 #define likely(expr) (expr)
106 #define unlikely(expr) (expr)
107 #endif
108 #endif
109
110 struct intel_sync_object {
111 struct gl_sync_object Base;
112
113 /** Batch associated with this sync object */
114 drm_intel_bo *bo;
115 };
116
117 /**
118 * intel_context is derived from Mesa's context class: struct gl_context.
119 */
120 struct intel_context
121 {
122 struct gl_context ctx; /**< base class, must be first field */
123
124 struct
125 {
126 void (*destroy) (struct intel_context * intel);
127 void (*emit_state) (struct intel_context * intel);
128 void (*finish_batch) (struct intel_context * intel);
129 void (*new_batch) (struct intel_context * intel);
130 void (*emit_invarient_state) (struct intel_context * intel);
131 void (*update_texture_state) (struct intel_context * intel);
132
133 void (*render_start) (struct intel_context * intel);
134 void (*render_prevalidate) (struct intel_context * intel);
135 void (*set_draw_region) (struct intel_context * intel,
136 struct intel_region * draw_regions[],
137 struct intel_region * depth_region,
138 GLuint num_regions);
139 void (*update_draw_buffer)(struct intel_context *intel);
140
141 void (*reduced_primitive_state) (struct intel_context * intel,
142 GLenum rprim);
143
144 bool (*check_vertex_size) (struct intel_context * intel,
145 GLuint expected);
146 void (*invalidate_state) (struct intel_context *intel,
147 GLuint new_state);
148
149 void (*assert_not_dirty) (struct intel_context *intel);
150
151 void (*debug_batch)(struct intel_context *intel);
152 bool (*render_target_supported)(gl_format format);
153
154 /** Can HiZ be enabled on a depthbuffer of the given format? */
155 bool (*is_hiz_depth_format)(struct intel_context *intel,
156 gl_format format);
157
158 /**
159 * \name HiZ operations
160 *
161 * See the following sections of the Sandy Bridge PRM, Volume 1, Part2:
162 * - 7.5.3.1 Depth Buffer Clear
163 * - 7.5.3.2 Depth Buffer Resolve
164 * - 7.5.3.3 Hierarchical Depth Buffer Resolve
165 * \{
166 */
167 void (*hiz_resolve_depthbuffer)(struct intel_context *intel,
168 struct intel_region *depth_region);
169 void (*hiz_resolve_hizbuffer)(struct intel_context *intel,
170 struct intel_region *depth_region);
171 /** \} */
172
173 } vtbl;
174
175 GLbitfield Fallback; /**< mask of INTEL_FALLBACK_x bits */
176 GLuint NewGLState;
177
178 dri_bufmgr *bufmgr;
179 unsigned int maxBatchSize;
180
181 /**
182 * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
183 */
184 int gen;
185 int gt;
186 bool needs_ff_sync;
187 bool is_g4x;
188 bool is_945;
189 bool has_separate_stencil;
190 bool must_use_separate_stencil;
191 bool has_hiz;
192
193 int urb_size;
194
195 struct intel_batchbuffer {
196 /** Current batchbuffer being queued up. */
197 drm_intel_bo *bo;
198 /** Last BO submitted to the hardware. Used for glFinish(). */
199 drm_intel_bo *last_bo;
200 /** BO for post-sync nonzero writes for gen6 workaround. */
201 drm_intel_bo *workaround_bo;
202 bool need_workaround_flush;
203
204 struct cached_batch_item *cached_items;
205
206 uint16_t emit, total;
207 uint16_t used, reserved_space;
208 uint32_t map[8192];
209 #define BATCH_SZ (8192*sizeof(uint32_t))
210
211 uint32_t state_batch_offset;
212 bool is_blit;
213 } batch;
214
215 drm_intel_bo *first_post_swapbuffers_batch;
216 bool need_throttle;
217 bool no_batch_wrap;
218 bool tnl_pipeline_running; /**< Set while i915's _tnl_run_pipeline. */
219
220 struct
221 {
222 GLuint id;
223 uint32_t start_ptr; /**< for i8xx */
224 uint32_t primitive; /**< Current hardware primitive type */
225 void (*flush) (struct intel_context *);
226 drm_intel_bo *vb_bo;
227 uint8_t *vb;
228 unsigned int start_offset; /**< Byte offset of primitive sequence */
229 unsigned int current_offset; /**< Byte offset of next vertex */
230 unsigned int count; /**< Number of vertices in current primitive */
231 } prim;
232
233 struct {
234 drm_intel_bo *bo;
235 GLuint offset;
236 uint32_t buffer_len;
237 uint32_t buffer_offset;
238 char buffer[4096];
239 } upload;
240
241 GLuint stats_wm;
242
243 /* Offsets of fields within the current vertex:
244 */
245 GLuint coloroffset;
246 GLuint specoffset;
247 GLuint wpos_offset;
248
249 struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
250 GLuint vertex_attr_count;
251
252 GLfloat polygon_offset_scale; /* dependent on depth_scale, bpp */
253
254 bool hw_stencil;
255 bool hw_stipple;
256 bool depth_buffer_is_float;
257 bool no_rast;
258 bool always_flush_batch;
259 bool always_flush_cache;
260
261 /* 0 - nonconformant, best performance;
262 * 1 - fallback to sw for known conformance bugs
263 * 2 - always fallback to sw
264 */
265 GLuint conformance_mode;
266
267 /* State for intelvb.c and inteltris.c.
268 */
269 GLuint RenderIndex;
270 GLmatrix ViewportMatrix;
271 GLenum render_primitive;
272 GLenum reduced_primitive; /*< Only gen < 6 */
273 GLuint vertex_size;
274 GLubyte *verts; /* points to tnl->clipspace.vertex_buf */
275
276 /* Fallback rasterization functions
277 */
278 intel_point_func draw_point;
279 intel_line_func draw_line;
280 intel_tri_func draw_tri;
281
282 /**
283 * Set if rendering has occured to the drawable's front buffer.
284 *
285 * This is used in the DRI2 case to detect that glFlush should also copy
286 * the contents of the fake front buffer to the real front buffer.
287 */
288 bool front_buffer_dirty;
289
290 /**
291 * Track whether front-buffer rendering is currently enabled
292 *
293 * A separate flag is used to track this in order to support MRT more
294 * easily.
295 */
296 bool is_front_buffer_rendering;
297 /**
298 * Track whether front-buffer is the current read target.
299 *
300 * This is closely associated with is_front_buffer_rendering, but may
301 * be set separately. The DRI2 fake front buffer must be referenced
302 * either way.
303 */
304 bool is_front_buffer_reading;
305
306 /**
307 * Count of intel_regions that are mapped.
308 *
309 * This allows us to assert that no batch buffer is emitted if a
310 * region is mapped.
311 */
312 int num_mapped_regions;
313
314 bool use_texture_tiling;
315 bool use_early_z;
316
317 int driFd;
318
319 __DRIcontext *driContext;
320 struct intel_screen *intelScreen;
321 void (*saved_viewport)(struct gl_context * ctx,
322 GLint x, GLint y, GLsizei width, GLsizei height);
323
324 /**
325 * Configuration cache
326 */
327 driOptionCache optionCache;
328 };
329
330 extern char *__progname;
331
332
333 #define SUBPIXEL_X 0.125
334 #define SUBPIXEL_Y 0.125
335
336 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
337
338 /**
339 * Align a value up to an alignment value
340 *
341 * If \c value is not already aligned to the requested alignment value, it
342 * will be rounded up.
343 *
344 * \param value Value to be rounded
345 * \param alignment Alignment value to be used. This must be a power of two.
346 *
347 * \sa ROUND_DOWN_TO()
348 */
349 #define ALIGN(value, alignment) (((value) + alignment - 1) & ~(alignment - 1))
350
351 /**
352 * Align a value down to an alignment value
353 *
354 * If \c value is not already aligned to the requested alignment value, it
355 * will be rounded down.
356 *
357 * \param value Value to be rounded
358 * \param alignment Alignment value to be used. This must be a power of two.
359 *
360 * \sa ALIGN()
361 */
362 #define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1))
363
364 #define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0)
365
366 static INLINE uint32_t
367 U_FIXED(float value, uint32_t frac_bits)
368 {
369 value *= (1 << frac_bits);
370 return value < 0 ? 0 : value;
371 }
372
373 static INLINE uint32_t
374 S_FIXED(float value, uint32_t frac_bits)
375 {
376 return value * (1 << frac_bits);
377 }
378
379 #define INTEL_FIREVERTICES(intel) \
380 do { \
381 if ((intel)->prim.flush) \
382 (intel)->prim.flush(intel); \
383 } while (0)
384
385 /* ================================================================
386 * From linux kernel i386 header files, copes with odd sizes better
387 * than COPY_DWORDS would:
388 * XXX Put this in src/mesa/main/imports.h ???
389 */
390 #if defined(i386) || defined(__i386__)
391 static INLINE void * __memcpy(void * to, const void * from, size_t n)
392 {
393 int d0, d1, d2;
394 __asm__ __volatile__(
395 "rep ; movsl\n\t"
396 "testb $2,%b4\n\t"
397 "je 1f\n\t"
398 "movsw\n"
399 "1:\ttestb $1,%b4\n\t"
400 "je 2f\n\t"
401 "movsb\n"
402 "2:"
403 : "=&c" (d0), "=&D" (d1), "=&S" (d2)
404 :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
405 : "memory");
406 return (to);
407 }
408 #else
409 #define __memcpy(a,b,c) memcpy(a,b,c)
410 #endif
411
412
413 /* ================================================================
414 * Debugging:
415 */
416 extern int INTEL_DEBUG;
417
418 #define DEBUG_TEXTURE 0x1
419 #define DEBUG_STATE 0x2
420 #define DEBUG_IOCTL 0x4
421 #define DEBUG_BLIT 0x8
422 #define DEBUG_MIPTREE 0x10
423 #define DEBUG_FALLBACKS 0x20
424 #define DEBUG_VERBOSE 0x40
425 #define DEBUG_BATCH 0x80
426 #define DEBUG_PIXEL 0x100
427 #define DEBUG_BUFMGR 0x200
428 #define DEBUG_REGION 0x400
429 #define DEBUG_FBO 0x800
430 #define DEBUG_GS 0x1000
431 #define DEBUG_SYNC 0x2000
432 #define DEBUG_PRIMS 0x4000
433 #define DEBUG_VERTS 0x8000
434 #define DEBUG_DRI 0x10000
435 #define DEBUG_SF 0x20000
436 #define DEBUG_SANITY 0x40000
437 #define DEBUG_SLEEP 0x80000
438 #define DEBUG_STATS 0x100000
439 #define DEBUG_TILE 0x200000
440 #define DEBUG_WM 0x400000
441 #define DEBUG_URB 0x800000
442 #define DEBUG_VS 0x1000000
443 #define DEBUG_CLIP 0x2000000
444
445 #define DBG(...) do { \
446 if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG)) \
447 printf(__VA_ARGS__); \
448 } while(0)
449
450 #define fallback_debug(...) do { \
451 if (unlikely(INTEL_DEBUG & DEBUG_FALLBACKS)) \
452 printf(__VA_ARGS__); \
453 } while(0)
454
455 #define PCI_CHIP_845_G 0x2562
456 #define PCI_CHIP_I830_M 0x3577
457 #define PCI_CHIP_I855_GM 0x3582
458 #define PCI_CHIP_I865_G 0x2572
459 #define PCI_CHIP_I915_G 0x2582
460 #define PCI_CHIP_I915_GM 0x2592
461 #define PCI_CHIP_I945_G 0x2772
462 #define PCI_CHIP_I945_GM 0x27A2
463 #define PCI_CHIP_I945_GME 0x27AE
464 #define PCI_CHIP_G33_G 0x29C2
465 #define PCI_CHIP_Q35_G 0x29B2
466 #define PCI_CHIP_Q33_G 0x29D2
467
468
469 /* ================================================================
470 * intel_context.c:
471 */
472
473 extern bool intelInitContext(struct intel_context *intel,
474 int api,
475 const struct gl_config * mesaVis,
476 __DRIcontext * driContextPriv,
477 void *sharedContextPrivate,
478 struct dd_function_table *functions);
479
480 extern void intelFinish(struct gl_context * ctx);
481 extern void intel_flush(struct gl_context * ctx);
482
483 extern void intelInitDriverFunctions(struct dd_function_table *functions);
484
485 void intel_init_syncobj_functions(struct dd_function_table *functions);
486
487
488 /* ================================================================
489 * intel_state.c:
490 */
491 extern void intelInitStateFuncs(struct dd_function_table *functions);
492
493 #define COMPAREFUNC_ALWAYS 0
494 #define COMPAREFUNC_NEVER 0x1
495 #define COMPAREFUNC_LESS 0x2
496 #define COMPAREFUNC_EQUAL 0x3
497 #define COMPAREFUNC_LEQUAL 0x4
498 #define COMPAREFUNC_GREATER 0x5
499 #define COMPAREFUNC_NOTEQUAL 0x6
500 #define COMPAREFUNC_GEQUAL 0x7
501
502 #define STENCILOP_KEEP 0
503 #define STENCILOP_ZERO 0x1
504 #define STENCILOP_REPLACE 0x2
505 #define STENCILOP_INCRSAT 0x3
506 #define STENCILOP_DECRSAT 0x4
507 #define STENCILOP_INCR 0x5
508 #define STENCILOP_DECR 0x6
509 #define STENCILOP_INVERT 0x7
510
511 #define LOGICOP_CLEAR 0
512 #define LOGICOP_NOR 0x1
513 #define LOGICOP_AND_INV 0x2
514 #define LOGICOP_COPY_INV 0x3
515 #define LOGICOP_AND_RVRSE 0x4
516 #define LOGICOP_INV 0x5
517 #define LOGICOP_XOR 0x6
518 #define LOGICOP_NAND 0x7
519 #define LOGICOP_AND 0x8
520 #define LOGICOP_EQUIV 0x9
521 #define LOGICOP_NOOP 0xa
522 #define LOGICOP_OR_INV 0xb
523 #define LOGICOP_COPY 0xc
524 #define LOGICOP_OR_RVRSE 0xd
525 #define LOGICOP_OR 0xe
526 #define LOGICOP_SET 0xf
527
528 #define BLENDFACT_ZERO 0x01
529 #define BLENDFACT_ONE 0x02
530 #define BLENDFACT_SRC_COLR 0x03
531 #define BLENDFACT_INV_SRC_COLR 0x04
532 #define BLENDFACT_SRC_ALPHA 0x05
533 #define BLENDFACT_INV_SRC_ALPHA 0x06
534 #define BLENDFACT_DST_ALPHA 0x07
535 #define BLENDFACT_INV_DST_ALPHA 0x08
536 #define BLENDFACT_DST_COLR 0x09
537 #define BLENDFACT_INV_DST_COLR 0x0a
538 #define BLENDFACT_SRC_ALPHA_SATURATE 0x0b
539 #define BLENDFACT_CONST_COLOR 0x0c
540 #define BLENDFACT_INV_CONST_COLOR 0x0d
541 #define BLENDFACT_CONST_ALPHA 0x0e
542 #define BLENDFACT_INV_CONST_ALPHA 0x0f
543 #define BLENDFACT_MASK 0x0f
544
545 enum {
546 DRI_CONF_BO_REUSE_DISABLED,
547 DRI_CONF_BO_REUSE_ALL
548 };
549
550 extern int intel_translate_shadow_compare_func(GLenum func);
551 extern int intel_translate_compare_func(GLenum func);
552 extern int intel_translate_stencil_op(GLenum op);
553 extern int intel_translate_blend_factor(GLenum factor);
554 extern int intel_translate_logic_op(GLenum opcode);
555
556 void intel_update_renderbuffers(__DRIcontext *context,
557 __DRIdrawable *drawable);
558 void intel_prepare_render(struct intel_context *intel);
559
560 void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
561 uint32_t buffer_id);
562
563 /*======================================================================
564 * Inline conversion functions.
565 * These are better-typed than the macros used previously:
566 */
567 static INLINE struct intel_context *
568 intel_context(struct gl_context * ctx)
569 {
570 return (struct intel_context *) ctx;
571 }
572
573 static INLINE bool
574 is_power_of_two(uint32_t value)
575 {
576 return (value & (value - 1)) == 0;
577 }
578
579 #endif