src/mesa/drivers/dri/intel/intel_context.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #ifndef INTELCONTEXT_INC
  29 #define INTELCONTEXT_INC
  30
  31
  32 #include <stdbool.h>
  33 #include <string.h>
  34 #include "main/mtypes.h"
  35 #include "main/mm.h"
  36
  37 #ifdef __cplusplus
  38 extern "C" {
  39         /* Evil hack for using libdrm in a c++ compiler. */
  40         #define virtual virt
  41 #endif
  42
  43 #include "drm.h"
  44 #include "intel_bufmgr.h"
  45
  46 #include "intel_screen.h"
  47 #include "intel_tex_obj.h"
  48 #include "i915_drm.h"
  49
  50 #ifdef __cplusplus
  51         #undef virtual
  52 #endif
  53
  54 #include "tnl/t_vertex.h"
  55
  56 #define TAG(x) intel##x
  57 #include "tnl_dd/t_dd_vertex.h"
  58 #undef TAG
  59
  60 #define DV_PF_555  (1<<8)
  61 #define DV_PF_565  (2<<8)
  62 #define DV_PF_8888 (3<<8)
  63 #define DV_PF_4444 (8<<8)
  64 #define DV_PF_1555 (9<<8)
  65
  66 struct intel_region;
  67 struct intel_context;
  68
  69 typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
  70                                 intelVertex *, intelVertex *);
  71 typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
  72                                  intelVertex *);
  73 typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
  74
  75 /**
  76  * Bits for intel->Fallback field
  77  */
  78 /*@{*/
  79 #define INTEL_FALLBACK_DRAW_BUFFER       0x1
  80 #define INTEL_FALLBACK_READ_BUFFER       0x2
  81 #define INTEL_FALLBACK_DEPTH_BUFFER      0x4
  82 #define INTEL_FALLBACK_STENCIL_BUFFER    0x8
  83 #define INTEL_FALLBACK_USER              0x10
  84 #define INTEL_FALLBACK_RENDERMODE        0x20
  85 #define INTEL_FALLBACK_TEXTURE           0x40
  86 #define INTEL_FALLBACK_DRIVER            0x1000  /**< first for drivers */
  87 /*@}*/
  88
  89 extern void intelFallback(struct intel_context *intel, GLbitfield bit,
  90                           bool mode);
  91 #define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
  92
  93
  94 #define INTEL_WRITE_PART  0x1
  95 #define INTEL_WRITE_FULL  0x2
  96 #define INTEL_READ        0x4
  97
  98 #define INTEL_MAX_FIXUP 64
  99
 100 #ifndef likely
 101 #ifdef __GNUC__
 102 #define likely(expr) (__builtin_expect(expr, 1))
 103 #define unlikely(expr) (__builtin_expect(expr, 0))
 104 #else
 105 #define likely(expr) (expr)
 106 #define unlikely(expr) (expr)
 107 #endif
 108 #endif
 109
 110 struct intel_sync_object {
 111    struct gl_sync_object Base;
 112
 113    /** Batch associated with this sync object */
 114    drm_intel_bo *bo;
 115 };
 116
 117 struct brw_context;
 118
 119 struct intel_batchbuffer {
 120    /** Current batchbuffer being queued up. */
 121    drm_intel_bo *bo;
 122    /** Last BO submitted to the hardware.  Used for glFinish(). */
 123    drm_intel_bo *last_bo;
 124    /** BO for post-sync nonzero writes for gen6 workaround. */
 125    drm_intel_bo *workaround_bo;
 126    bool need_workaround_flush;
 127
 128    struct cached_batch_item *cached_items;
 129
 130    uint16_t emit, total;
 131    uint16_t used, reserved_space;
 132    uint32_t map[8192];
 133 #define BATCH_SZ (8192*sizeof(uint32_t))
 134
 135    uint32_t state_batch_offset;
 136    bool is_blit;
 137    bool needs_sol_reset;
 138
 139    struct {
 140       uint16_t used;
 141       int reloc_count;
 142    } saved;
 143 };
 144
 145 /**
 146  * intel_context is derived from Mesa's context class: struct gl_context.
 147  */
 148 struct intel_context
 149 {
 150    struct gl_context ctx;  /**< base class, must be first field */
 151
 152    struct
 153    {
 154       void (*destroy) (struct intel_context * intel);
 155       void (*emit_state) (struct intel_context * intel);
 156       void (*finish_batch) (struct intel_context * intel);
 157       void (*new_batch) (struct intel_context * intel);
 158       void (*emit_invarient_state) (struct intel_context * intel);
 159       void (*update_texture_state) (struct intel_context * intel);
 160
 161       void (*render_start) (struct intel_context * intel);
 162       void (*render_prevalidate) (struct intel_context * intel);
 163       void (*set_draw_region) (struct intel_context * intel,
 164                                struct intel_region * draw_regions[],
 165                                struct intel_region * depth_region,
 166                                GLuint num_regions);
 167       void (*update_draw_buffer)(struct intel_context *intel);
 168
 169       void (*reduced_primitive_state) (struct intel_context * intel,
 170                                        GLenum rprim);
 171
 172       bool (*check_vertex_size) (struct intel_context * intel,
 173                                       GLuint expected);
 174       void (*invalidate_state) (struct intel_context *intel,
 175                                 GLuint new_state);
 176
 177       void (*assert_not_dirty) (struct intel_context *intel);
 178
 179       void (*debug_batch)(struct intel_context *intel);
 180       void (*annotate_aub)(struct intel_context *intel);
 181       bool (*render_target_supported)(struct intel_context *intel,
 182                                       struct gl_renderbuffer *rb);
 183
 184       /** Can HiZ be enabled on a depthbuffer of the given format? */
 185       bool (*is_hiz_depth_format)(struct intel_context *intel,
 186                                   gl_format format);
 187
 188       /**
 189        * Surface state operations (i965+ only)
 190        * \{
 191        */
 192       void (*update_texture_surface)(struct gl_context *ctx, unsigned unit);
 193       void (*update_renderbuffer_surface)(struct brw_context *brw,
 194                                           struct gl_renderbuffer *rb,
 195                                           unsigned unit);
 196       void (*update_null_renderbuffer_surface)(struct brw_context *brw,
 197                                                unsigned unit);
 198       void (*create_constant_surface)(struct brw_context *brw,
 199                                       drm_intel_bo *bo,
 200                                       int width,
 201                                       uint32_t *out_offset);
 202       /** \} */
 203    } vtbl;
 204
 205    GLbitfield Fallback;  /**< mask of INTEL_FALLBACK_x bits */
 206    GLuint NewGLState;
 207
 208    dri_bufmgr *bufmgr;
 209    unsigned int maxBatchSize;
 210
 211    /**
 212     * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
 213     */
 214    int gen;
 215    int gt;
 216    bool needs_ff_sync;
 217    bool is_haswell;
 218    bool is_g4x;
 219    bool is_945;
 220    bool has_separate_stencil;
 221    bool must_use_separate_stencil;
 222    bool has_hiz;
 223    bool has_llc;
 224    bool has_swizzling;
 225
 226    int urb_size;
 227
 228    struct intel_batchbuffer batch;
 229
 230    drm_intel_bo *first_post_swapbuffers_batch;
 231    bool need_throttle;
 232    bool no_batch_wrap;
 233    bool tnl_pipeline_running; /**< Set while i915's _tnl_run_pipeline. */
 234
 235    struct
 236    {
 237       GLuint id;
 238       uint32_t start_ptr; /**< for i8xx */
 239       uint32_t primitive;       /**< Current hardware primitive type */
 240       void (*flush) (struct intel_context *);
 241       drm_intel_bo *vb_bo;
 242       uint8_t *vb;
 243       unsigned int start_offset; /**< Byte offset of primitive sequence */
 244       unsigned int current_offset; /**< Byte offset of next vertex */
 245       unsigned int count;       /**< Number of vertices in current primitive */
 246    } prim;
 247
 248    struct {
 249       drm_intel_bo *bo;
 250       GLuint offset;
 251       uint32_t buffer_len;
 252       uint32_t buffer_offset;
 253       char buffer[4096];
 254    } upload;
 255
 256    GLuint stats_wm;
 257
 258    /* Offsets of fields within the current vertex:
 259     */
 260    GLuint coloroffset;
 261    GLuint specoffset;
 262    GLuint wpos_offset;
 263
 264    struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
 265    GLuint vertex_attr_count;
 266
 267    GLfloat polygon_offset_scale;        /* dependent on depth_scale, bpp */
 268
 269    bool hw_stencil;
 270    bool hw_stipple;
 271    bool no_rast;
 272    bool always_flush_batch;
 273    bool always_flush_cache;
 274
 275    /* State for intelvb.c and inteltris.c.
 276     */
 277    GLuint RenderIndex;
 278    GLmatrix ViewportMatrix;
 279    GLenum render_primitive;
 280    GLenum reduced_primitive; /*< Only gen < 6 */
 281    GLuint vertex_size;
 282    GLubyte *verts;              /* points to tnl->clipspace.vertex_buf */
 283
 284    /* Fallback rasterization functions
 285     */
 286    intel_point_func draw_point;
 287    intel_line_func draw_line;
 288    intel_tri_func draw_tri;
 289
 290    /**
 291     * Set if rendering has occured to the drawable's front buffer.
 292     *
 293     * This is used in the DRI2 case to detect that glFlush should also copy
 294     * the contents of the fake front buffer to the real front buffer.
 295     */
 296    bool front_buffer_dirty;
 297
 298    /**
 299     * Track whether front-buffer rendering is currently enabled
 300     *
 301     * A separate flag is used to track this in order to support MRT more
 302     * easily.
 303     */
 304    bool is_front_buffer_rendering;
 305    /**
 306     * Track whether front-buffer is the current read target.
 307     *
 308     * This is closely associated with is_front_buffer_rendering, but may
 309     * be set separately.  The DRI2 fake front buffer must be referenced
 310     * either way.
 311     */
 312    bool is_front_buffer_reading;
 313
 314    /**
 315     * Count of intel_regions that are mapped.
 316     *
 317     * This allows us to assert that no batch buffer is emitted if a
 318     * region is mapped.
 319     */
 320    int num_mapped_regions;
 321
 322    bool use_texture_tiling;
 323    bool use_early_z;
 324
 325    int driFd;
 326
 327    __DRIcontext *driContext;
 328    struct intel_screen *intelScreen;
 329    void (*saved_viewport)(struct gl_context * ctx,
 330                           GLint x, GLint y, GLsizei width, GLsizei height);
 331
 332    /**
 333     * Configuration cache
 334     */
 335    driOptionCache optionCache;
 336 };
 337
 338 extern char *__progname;
 339
 340
 341 #define SUBPIXEL_X 0.125
 342 #define SUBPIXEL_Y 0.125
 343
 344 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
 345
 346 /**
 347  * Align a value up to an alignment value
 348  *
 349  * If \c value is not already aligned to the requested alignment value, it
 350  * will be rounded up.
 351  *
 352  * \param value  Value to be rounded
 353  * \param alignment  Alignment value to be used.  This must be a power of two.
 354  *
 355  * \sa ROUND_DOWN_TO()
 356  */
 357 #define ALIGN(value, alignment)  (((value) + alignment - 1) & ~(alignment - 1))
 358
 359 /**
 360  * Align a value down to an alignment value
 361  *
 362  * If \c value is not already aligned to the requested alignment value, it
 363  * will be rounded down.
 364  *
 365  * \param value  Value to be rounded
 366  * \param alignment  Alignment value to be used.  This must be a power of two.
 367  *
 368  * \sa ALIGN()
 369  */
 370 #define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1))
 371
 372 #define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0)
 373
 374 static INLINE uint32_t
 375 U_FIXED(float value, uint32_t frac_bits)
 376 {
 377    value *= (1 << frac_bits);
 378    return value < 0 ? 0 : value;
 379 }
 380
 381 static INLINE uint32_t
 382 S_FIXED(float value, uint32_t frac_bits)
 383 {
 384    return value * (1 << frac_bits);
 385 }
 386
 387 #define INTEL_FIREVERTICES(intel)               \
 388 do {                                            \
 389    if ((intel)->prim.flush)                     \
 390       (intel)->prim.flush(intel);               \
 391 } while (0)
 392
 393 /* ================================================================
 394  * From linux kernel i386 header files, copes with odd sizes better
 395  * than COPY_DWORDS would:
 396  * XXX Put this in src/mesa/main/imports.h ???
 397  */
 398 #if defined(i386) || defined(__i386__)
 399 static INLINE void * __memcpy(void * to, const void * from, size_t n)
 400 {
 401    int d0, d1, d2;
 402    __asm__ __volatile__(
 403       "rep ; movsl\n\t"
 404       "testb $2,%b4\n\t"
 405       "je 1f\n\t"
 406       "movsw\n"
 407       "1:\ttestb $1,%b4\n\t"
 408       "je 2f\n\t"
 409       "movsb\n"
 410       "2:"
 411       : "=&c" (d0), "=&D" (d1), "=&S" (d2)
 412       :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
 413       : "memory");
 414    return (to);
 415 }
 416 #else
 417 #define __memcpy(a,b,c) memcpy(a,b,c)
 418 #endif
 419
 420
 421 /* ================================================================
 422  * Debugging:
 423  */
 424 extern int INTEL_DEBUG;
 425
 426 #define DEBUG_TEXTURE   0x1
 427 #define DEBUG_STATE     0x2
 428 #define DEBUG_IOCTL     0x4
 429 #define DEBUG_BLIT      0x8
 430 #define DEBUG_MIPTREE   0x10
 431 #define DEBUG_FALLBACKS 0x20
 432 #define DEBUG_VERBOSE   0x40
 433 #define DEBUG_BATCH     0x80
 434 #define DEBUG_PIXEL     0x100
 435 #define DEBUG_BUFMGR    0x200
 436 #define DEBUG_REGION    0x400
 437 #define DEBUG_FBO       0x800
 438 #define DEBUG_GS        0x1000
 439 #define DEBUG_SYNC      0x2000
 440 #define DEBUG_PRIMS     0x4000
 441 #define DEBUG_VERTS     0x8000
 442 #define DEBUG_DRI       0x10000
 443 #define DEBUG_SF        0x20000
 444 #define DEBUG_SANITY    0x40000
 445 #define DEBUG_SLEEP     0x80000
 446 #define DEBUG_STATS     0x100000
 447 #define DEBUG_TILE      0x200000
 448 #define DEBUG_WM        0x400000
 449 #define DEBUG_URB       0x800000
 450 #define DEBUG_VS        0x1000000
 451 #define DEBUG_CLIP      0x2000000
 452 #define DEBUG_AUB       0x4000000
 453
 454 #define DBG(...) do {                                           \
 455         if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG))            \
 456                 printf(__VA_ARGS__);                    \
 457 } while(0)
 458
 459 #define fallback_debug(...) do {                                \
 460         if (unlikely(INTEL_DEBUG & DEBUG_FALLBACKS))            \
 461                 printf(__VA_ARGS__);                            \
 462 } while(0)
 463
 464 #define PCI_CHIP_845_G                  0x2562
 465 #define PCI_CHIP_I830_M                 0x3577
 466 #define PCI_CHIP_I855_GM                0x3582
 467 #define PCI_CHIP_I865_G                 0x2572
 468 #define PCI_CHIP_I915_G                 0x2582
 469 #define PCI_CHIP_I915_GM                0x2592
 470 #define PCI_CHIP_I945_G                 0x2772
 471 #define PCI_CHIP_I945_GM                0x27A2
 472 #define PCI_CHIP_I945_GME               0x27AE
 473 #define PCI_CHIP_G33_G                  0x29C2
 474 #define PCI_CHIP_Q35_G                  0x29B2
 475 #define PCI_CHIP_Q33_G                  0x29D2
 476
 477
 478 /* ================================================================
 479  * intel_context.c:
 480  */
 481
 482 extern bool intelInitContext(struct intel_context *intel,
 483                                   int api,
 484                                   const struct gl_config * mesaVis,
 485                                   __DRIcontext * driContextPriv,
 486                                   void *sharedContextPrivate,
 487                                   struct dd_function_table *functions);
 488
 489 extern void intelFinish(struct gl_context * ctx);
 490 extern void intel_flush_rendering_to_batch(struct gl_context *ctx);
 491 extern void _intel_flush(struct gl_context * ctx, const char *file, int line);
 492
 493 #define intel_flush(ctx) _intel_flush(ctx, __FILE__, __LINE__)
 494
 495 extern void intelInitDriverFunctions(struct dd_function_table *functions);
 496
 497 void intel_init_syncobj_functions(struct dd_function_table *functions);
 498
 499
 500 /* ================================================================
 501  * intel_state.c:
 502  */
 503 extern void intelInitStateFuncs(struct dd_function_table *functions);
 504
 505 #define COMPAREFUNC_ALWAYS              0
 506 #define COMPAREFUNC_NEVER               0x1
 507 #define COMPAREFUNC_LESS                0x2
 508 #define COMPAREFUNC_EQUAL               0x3
 509 #define COMPAREFUNC_LEQUAL              0x4
 510 #define COMPAREFUNC_GREATER             0x5
 511 #define COMPAREFUNC_NOTEQUAL            0x6
 512 #define COMPAREFUNC_GEQUAL              0x7
 513
 514 #define STENCILOP_KEEP                  0
 515 #define STENCILOP_ZERO                  0x1
 516 #define STENCILOP_REPLACE               0x2
 517 #define STENCILOP_INCRSAT               0x3
 518 #define STENCILOP_DECRSAT               0x4
 519 #define STENCILOP_INCR                  0x5
 520 #define STENCILOP_DECR                  0x6
 521 #define STENCILOP_INVERT                0x7
 522
 523 #define LOGICOP_CLEAR                   0
 524 #define LOGICOP_NOR                     0x1
 525 #define LOGICOP_AND_INV                 0x2
 526 #define LOGICOP_COPY_INV                0x3
 527 #define LOGICOP_AND_RVRSE               0x4
 528 #define LOGICOP_INV                     0x5
 529 #define LOGICOP_XOR                     0x6
 530 #define LOGICOP_NAND                    0x7
 531 #define LOGICOP_AND                     0x8
 532 #define LOGICOP_EQUIV                   0x9
 533 #define LOGICOP_NOOP                    0xa
 534 #define LOGICOP_OR_INV                  0xb
 535 #define LOGICOP_COPY                    0xc
 536 #define LOGICOP_OR_RVRSE                0xd
 537 #define LOGICOP_OR                      0xe
 538 #define LOGICOP_SET                     0xf
 539
 540 #define BLENDFACT_ZERO                  0x01
 541 #define BLENDFACT_ONE                   0x02
 542 #define BLENDFACT_SRC_COLR              0x03
 543 #define BLENDFACT_INV_SRC_COLR          0x04
 544 #define BLENDFACT_SRC_ALPHA             0x05
 545 #define BLENDFACT_INV_SRC_ALPHA         0x06
 546 #define BLENDFACT_DST_ALPHA             0x07
 547 #define BLENDFACT_INV_DST_ALPHA         0x08
 548 #define BLENDFACT_DST_COLR              0x09
 549 #define BLENDFACT_INV_DST_COLR          0x0a
 550 #define BLENDFACT_SRC_ALPHA_SATURATE    0x0b
 551 #define BLENDFACT_CONST_COLOR           0x0c
 552 #define BLENDFACT_INV_CONST_COLOR       0x0d
 553 #define BLENDFACT_CONST_ALPHA           0x0e
 554 #define BLENDFACT_INV_CONST_ALPHA       0x0f
 555 #define BLENDFACT_MASK                  0x0f
 556
 557 enum {
 558    DRI_CONF_BO_REUSE_DISABLED,
 559    DRI_CONF_BO_REUSE_ALL
 560 };
 561
 562 extern int intel_translate_shadow_compare_func(GLenum func);
 563 extern int intel_translate_compare_func(GLenum func);
 564 extern int intel_translate_stencil_op(GLenum op);
 565 extern int intel_translate_blend_factor(GLenum factor);
 566 extern int intel_translate_logic_op(GLenum opcode);
 567
 568 void intel_update_renderbuffers(__DRIcontext *context,
 569                                 __DRIdrawable *drawable);
 570 void intel_prepare_render(struct intel_context *intel);
 571
 572 void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
 573                                   uint32_t buffer_id);
 574 void intel_init_texture_formats(struct gl_context *ctx);
 575
 576 /*======================================================================
 577  * Inline conversion functions.
 578  * These are better-typed than the macros used previously:
 579  */
 580 static INLINE struct intel_context *
 581 intel_context(struct gl_context * ctx)
 582 {
 583    return (struct intel_context *) ctx;
 584 }
 585
 586 static INLINE bool
 587 is_power_of_two(uint32_t value)
 588 {
 589    return (value & (value - 1)) == 0;
 590 }
 591
 592 #ifdef __cplusplus
 593 }
 594 #endif
 595
 596 #endif