Merge branch 'mesa_7_6_branch' into mesa_7_7_branch
[mesa.git] / src / mesa / drivers / dri / intel / intel_context.h
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef INTELCONTEXT_INC
29 #define INTELCONTEXT_INC
30
31
32
33 #include "main/mtypes.h"
34 #include "main/mm.h"
35 #include "texmem.h"
36 #include "dri_metaops.h"
37 #include "drm.h"
38 #include "intel_bufmgr.h"
39
40 #include "intel_screen.h"
41 #include "intel_tex_obj.h"
42 #include "i915_drm.h"
43 #include "tnl/t_vertex.h"
44
45 #define TAG(x) intel##x
46 #include "tnl_dd/t_dd_vertex.h"
47 #undef TAG
48
49 #define DV_PF_555 (1<<8)
50 #define DV_PF_565 (2<<8)
51 #define DV_PF_8888 (3<<8)
52 #define DV_PF_4444 (8<<8)
53 #define DV_PF_1555 (9<<8)
54
55 struct intel_region;
56 struct intel_context;
57
58 typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
59 intelVertex *, intelVertex *);
60 typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
61 intelVertex *);
62 typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
63
64 /**
65 * Bits for intel->Fallback field
66 */
67 /*@{*/
68 #define INTEL_FALLBACK_DRAW_BUFFER 0x1
69 #define INTEL_FALLBACK_READ_BUFFER 0x2
70 #define INTEL_FALLBACK_DEPTH_BUFFER 0x4
71 #define INTEL_FALLBACK_STENCIL_BUFFER 0x8
72 #define INTEL_FALLBACK_USER 0x10
73 #define INTEL_FALLBACK_RENDERMODE 0x20
74 #define INTEL_FALLBACK_TEXTURE 0x40
75 #define INTEL_FALLBACK_DRIVER 0x1000 /**< first for drivers */
76 /*@}*/
77
78 extern void intelFallback(struct intel_context *intel, GLbitfield bit,
79 GLboolean mode);
80 #define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
81
82
83 #define INTEL_WRITE_PART 0x1
84 #define INTEL_WRITE_FULL 0x2
85 #define INTEL_READ 0x4
86
87 #define INTEL_MAX_FIXUP 64
88
89 struct intel_sync_object {
90 struct gl_sync_object Base;
91
92 /** Batch associated with this sync object */
93 drm_intel_bo *bo;
94 };
95
96 /**
97 * intel_context is derived from Mesa's context class: GLcontext.
98 */
99 struct intel_context
100 {
101 GLcontext ctx; /**< base class, must be first field */
102
103 struct
104 {
105 void (*destroy) (struct intel_context * intel);
106 void (*emit_state) (struct intel_context * intel);
107 void (*finish_batch) (struct intel_context * intel);
108 void (*new_batch) (struct intel_context * intel);
109 void (*emit_invarient_state) (struct intel_context * intel);
110 void (*note_fence) (struct intel_context *intel, GLuint fence);
111 void (*update_texture_state) (struct intel_context * intel);
112
113 void (*render_start) (struct intel_context * intel);
114 void (*render_prevalidate) (struct intel_context * intel);
115 void (*set_draw_region) (struct intel_context * intel,
116 struct intel_region * draw_regions[],
117 struct intel_region * depth_region,
118 GLuint num_regions);
119
120 void (*reduced_primitive_state) (struct intel_context * intel,
121 GLenum rprim);
122
123 GLboolean (*check_vertex_size) (struct intel_context * intel,
124 GLuint expected);
125 void (*invalidate_state) (struct intel_context *intel,
126 GLuint new_state);
127
128
129 /* Metaops:
130 */
131 void (*install_meta_state) (struct intel_context * intel);
132 void (*leave_meta_state) (struct intel_context * intel);
133
134 void (*meta_draw_region) (struct intel_context * intel,
135 struct intel_region * draw_region,
136 struct intel_region * depth_region);
137
138 void (*meta_draw_quad)(struct intel_context *intel,
139 GLfloat x0, GLfloat x1,
140 GLfloat y0, GLfloat y1,
141 GLfloat z,
142 GLuint color, /* ARGB32 */
143 GLfloat s0, GLfloat s1,
144 GLfloat t0, GLfloat t1);
145
146 void (*meta_color_mask) (struct intel_context * intel, GLboolean);
147
148 void (*meta_stencil_replace) (struct intel_context * intel,
149 GLuint mask, GLuint clear);
150
151 void (*meta_depth_replace) (struct intel_context * intel);
152
153 void (*meta_texture_blend_replace) (struct intel_context * intel);
154
155 void (*meta_no_stencil_write) (struct intel_context * intel);
156 void (*meta_no_depth_write) (struct intel_context * intel);
157 void (*meta_no_texture) (struct intel_context * intel);
158
159 void (*meta_import_pixel_state) (struct intel_context * intel);
160 void (*meta_frame_buffer_texture) (struct intel_context *intel,
161 GLint xoff, GLint yoff);
162
163 GLboolean(*meta_tex_rect_source) (struct intel_context * intel,
164 dri_bo * buffer,
165 GLuint offset,
166 GLuint pitch,
167 GLuint height,
168 GLenum format, GLenum type);
169
170 void (*assert_not_dirty) (struct intel_context *intel);
171
172 void (*debug_batch)(struct intel_context *intel);
173 } vtbl;
174
175 struct dri_metaops meta;
176
177 GLbitfield Fallback; /**< mask of INTEL_FALLBACK_x bits */
178 GLuint NewGLState;
179
180 dri_bufmgr *bufmgr;
181 unsigned int maxBatchSize;
182
183 /**
184 * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
185 */
186 int gen;
187
188 struct intel_region *front_region;
189 struct intel_region *back_region;
190 struct intel_region *depth_region;
191
192 /**
193 * This value indicates that the kernel memory manager is being used
194 * instead of the fake client-side memory manager.
195 */
196 GLboolean ttm;
197
198 struct intel_batchbuffer *batch;
199 drm_intel_bo *first_post_swapbuffers_batch;
200 GLboolean no_batch_wrap;
201
202 struct
203 {
204 GLuint id;
205 uint32_t primitive; /**< Current hardware primitive type */
206 void (*flush) (struct intel_context *);
207 GLubyte *start_ptr; /**< for i8xx */
208 dri_bo *vb_bo;
209 uint8_t *vb;
210 unsigned int start_offset; /**< Byte offset of primitive sequence */
211 unsigned int current_offset; /**< Byte offset of next vertex */
212 unsigned int count; /**< Number of vertices in current primitive */
213 } prim;
214
215 GLuint stats_wm;
216 GLboolean locked;
217 char *prevLockFile;
218 int prevLockLine;
219
220 GLuint ClearColor565;
221 GLuint ClearColor8888;
222
223
224 /* Offsets of fields within the current vertex:
225 */
226 GLuint coloroffset;
227 GLuint specoffset;
228 GLuint wpos_offset;
229 GLuint wpos_size;
230
231 struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
232 GLuint vertex_attr_count;
233
234 GLfloat polygon_offset_scale; /* dependent on depth_scale, bpp */
235
236 GLboolean hw_stencil;
237 GLboolean hw_stipple;
238 GLboolean depth_buffer_is_float;
239 GLboolean no_rast;
240 GLboolean always_flush_batch;
241 GLboolean always_flush_cache;
242
243 /* 0 - nonconformant, best performance;
244 * 1 - fallback to sw for known conformance bugs
245 * 2 - always fallback to sw
246 */
247 GLuint conformance_mode;
248
249 /* State for intelvb.c and inteltris.c.
250 */
251 GLuint RenderIndex;
252 GLmatrix ViewportMatrix;
253 GLenum render_primitive;
254 GLenum reduced_primitive;
255 GLuint vertex_size;
256 GLubyte *verts; /* points to tnl->clipspace.vertex_buf */
257
258 /* Fallback rasterization functions
259 */
260 intel_point_func draw_point;
261 intel_line_func draw_line;
262 intel_tri_func draw_tri;
263
264 /**
265 * Set to true if a single constant cliprect should be used in the
266 * batchbuffer. Otherwise, cliprects must be calculated at batchbuffer
267 * flush time while the lock is held.
268 */
269 GLboolean constant_cliprect;
270
271 /**
272 * In !constant_cliprect mode, set to true if the front cliprects should be
273 * used instead of back.
274 */
275 GLboolean front_cliprects;
276
277 /**
278 * Set if rendering has occured to the drawable's front buffer.
279 *
280 * This is used in the DRI2 case to detect that glFlush should also copy
281 * the contents of the fake front buffer to the real front buffer.
282 */
283 GLboolean front_buffer_dirty;
284
285 /**
286 * Track whether front-buffer rendering is currently enabled
287 *
288 * A separate flag is used to track this in order to support MRT more
289 * easily.
290 */
291 GLboolean is_front_buffer_rendering;
292 /**
293 * Track whether front-buffer is the current read target.
294 *
295 * This is closely associated with is_front_buffer_rendering, but may
296 * be set separately. The DRI2 fake front buffer must be referenced
297 * either way.
298 */
299 GLboolean is_front_buffer_reading;
300
301 GLboolean use_texture_tiling;
302 GLboolean use_early_z;
303 drm_clip_rect_t fboRect; /**< cliprect for FBO rendering */
304
305 int perf_boxes;
306
307 GLuint do_usleeps;
308 int do_irqs;
309 GLuint irqsEmitted;
310
311 GLboolean scissor;
312 drm_clip_rect_t draw_rect;
313 drm_clip_rect_t scissor_rect;
314
315 drm_context_t hHWContext;
316 drmLock *driHwLock;
317 int driFd;
318
319 __DRIcontextPrivate *driContext;
320 __DRIdrawablePrivate *driDrawable;
321 __DRIdrawablePrivate *driReadDrawable;
322 __DRIscreenPrivate *driScreen;
323 intelScreenPrivate *intelScreen;
324 volatile drm_i915_sarea_t *sarea;
325
326 GLuint lastStamp;
327
328 GLboolean no_hw;
329
330 /**
331 * Configuration cache
332 */
333 driOptionCache optionCache;
334
335 int64_t swap_ust;
336 int64_t swap_missed_ust;
337
338 GLuint swap_count;
339 GLuint swap_missed_count;
340 };
341
342 /* These are functions now:
343 */
344 void LOCK_HARDWARE( struct intel_context *intel );
345 void UNLOCK_HARDWARE( struct intel_context *intel );
346
347 extern char *__progname;
348
349
350 #define SUBPIXEL_X 0.125
351 #define SUBPIXEL_Y 0.125
352
353 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
354 #define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1))
355 #define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0)
356
357 static inline uint32_t
358 U_FIXED(float value, uint32_t frac_bits)
359 {
360 value *= (1 << frac_bits);
361 return value < 0 ? 0 : value;
362 }
363
364 static inline uint32_t
365 S_FIXED(float value, uint32_t frac_bits)
366 {
367 return value * (1 << frac_bits);
368 }
369
370 #define INTEL_FIREVERTICES(intel) \
371 do { \
372 if ((intel)->prim.flush) \
373 (intel)->prim.flush(intel); \
374 } while (0)
375
376 /* ================================================================
377 * Color packing:
378 */
379
380 #define INTEL_PACKCOLOR4444(r,g,b,a) \
381 ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
382
383 #define INTEL_PACKCOLOR1555(r,g,b,a) \
384 ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \
385 ((a) ? 0x8000 : 0))
386
387 #define INTEL_PACKCOLOR565(r,g,b) \
388 ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
389
390 #define INTEL_PACKCOLOR8888(r,g,b,a) \
391 ((a<<24) | (r<<16) | (g<<8) | b)
392
393 #define INTEL_PACKCOLOR(format, r, g, b, a) \
394 (format == DV_PF_555 ? INTEL_PACKCOLOR1555(r,g,b,a) : \
395 (format == DV_PF_565 ? INTEL_PACKCOLOR565(r,g,b) : \
396 (format == DV_PF_8888 ? INTEL_PACKCOLOR8888(r,g,b,a) : \
397 0)))
398
399 /* ================================================================
400 * From linux kernel i386 header files, copes with odd sizes better
401 * than COPY_DWORDS would:
402 * XXX Put this in src/mesa/main/imports.h ???
403 */
404 #if defined(i386) || defined(__i386__)
405 static INLINE void * __memcpy(void * to, const void * from, size_t n)
406 {
407 int d0, d1, d2;
408 __asm__ __volatile__(
409 "rep ; movsl\n\t"
410 "testb $2,%b4\n\t"
411 "je 1f\n\t"
412 "movsw\n"
413 "1:\ttestb $1,%b4\n\t"
414 "je 2f\n\t"
415 "movsb\n"
416 "2:"
417 : "=&c" (d0), "=&D" (d1), "=&S" (d2)
418 :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
419 : "memory");
420 return (to);
421 }
422 #else
423 #define __memcpy(a,b,c) memcpy(a,b,c)
424 #endif
425
426
427 /* ================================================================
428 * Debugging:
429 */
430 extern int INTEL_DEBUG;
431
432 #define DEBUG_TEXTURE 0x1
433 #define DEBUG_STATE 0x2
434 #define DEBUG_IOCTL 0x4
435 #define DEBUG_BLIT 0x8
436 #define DEBUG_MIPTREE 0x10
437 #define DEBUG_FALLBACKS 0x20
438 #define DEBUG_VERBOSE 0x40
439 #define DEBUG_BATCH 0x80
440 #define DEBUG_PIXEL 0x100
441 #define DEBUG_BUFMGR 0x200
442 #define DEBUG_REGION 0x400
443 #define DEBUG_FBO 0x800
444 #define DEBUG_LOCK 0x1000
445 #define DEBUG_SYNC 0x2000
446 #define DEBUG_PRIMS 0x4000
447 #define DEBUG_VERTS 0x8000
448 #define DEBUG_DRI 0x10000
449 #define DEBUG_DMA 0x20000
450 #define DEBUG_SANITY 0x40000
451 #define DEBUG_SLEEP 0x80000
452 #define DEBUG_STATS 0x100000
453 #define DEBUG_TILE 0x200000
454 #define DEBUG_SINGLE_THREAD 0x400000
455 #define DEBUG_WM 0x800000
456 #define DEBUG_URB 0x1000000
457 #define DEBUG_VS 0x2000000
458
459 #define DBG(...) do { \
460 if (INTEL_DEBUG & FILE_DEBUG_FLAG) \
461 _mesa_printf(__VA_ARGS__); \
462 } while(0)
463
464 #define PCI_CHIP_845_G 0x2562
465 #define PCI_CHIP_I830_M 0x3577
466 #define PCI_CHIP_I855_GM 0x3582
467 #define PCI_CHIP_I865_G 0x2572
468 #define PCI_CHIP_I915_G 0x2582
469 #define PCI_CHIP_I915_GM 0x2592
470 #define PCI_CHIP_I945_G 0x2772
471 #define PCI_CHIP_I945_GM 0x27A2
472 #define PCI_CHIP_I945_GME 0x27AE
473 #define PCI_CHIP_G33_G 0x29C2
474 #define PCI_CHIP_Q35_G 0x29B2
475 #define PCI_CHIP_Q33_G 0x29D2
476
477
478 /* ================================================================
479 * intel_context.c:
480 */
481
482 extern GLboolean intelInitContext(struct intel_context *intel,
483 const __GLcontextModes * mesaVis,
484 __DRIcontextPrivate * driContextPriv,
485 void *sharedContextPrivate,
486 struct dd_function_table *functions);
487
488 extern void intelGetLock(struct intel_context *intel, GLuint flags);
489
490 extern void intelFinish(GLcontext * ctx);
491 extern void intelFlush(GLcontext * ctx);
492
493 extern void intelInitDriverFunctions(struct dd_function_table *functions);
494
495 void intel_init_syncobj_functions(struct dd_function_table *functions);
496
497
498 /* ================================================================
499 * intel_state.c:
500 */
501 extern void intelInitStateFuncs(struct dd_function_table *functions);
502
503 #define COMPAREFUNC_ALWAYS 0
504 #define COMPAREFUNC_NEVER 0x1
505 #define COMPAREFUNC_LESS 0x2
506 #define COMPAREFUNC_EQUAL 0x3
507 #define COMPAREFUNC_LEQUAL 0x4
508 #define COMPAREFUNC_GREATER 0x5
509 #define COMPAREFUNC_NOTEQUAL 0x6
510 #define COMPAREFUNC_GEQUAL 0x7
511
512 #define STENCILOP_KEEP 0
513 #define STENCILOP_ZERO 0x1
514 #define STENCILOP_REPLACE 0x2
515 #define STENCILOP_INCRSAT 0x3
516 #define STENCILOP_DECRSAT 0x4
517 #define STENCILOP_INCR 0x5
518 #define STENCILOP_DECR 0x6
519 #define STENCILOP_INVERT 0x7
520
521 #define LOGICOP_CLEAR 0
522 #define LOGICOP_NOR 0x1
523 #define LOGICOP_AND_INV 0x2
524 #define LOGICOP_COPY_INV 0x3
525 #define LOGICOP_AND_RVRSE 0x4
526 #define LOGICOP_INV 0x5
527 #define LOGICOP_XOR 0x6
528 #define LOGICOP_NAND 0x7
529 #define LOGICOP_AND 0x8
530 #define LOGICOP_EQUIV 0x9
531 #define LOGICOP_NOOP 0xa
532 #define LOGICOP_OR_INV 0xb
533 #define LOGICOP_COPY 0xc
534 #define LOGICOP_OR_RVRSE 0xd
535 #define LOGICOP_OR 0xe
536 #define LOGICOP_SET 0xf
537
538 #define BLENDFACT_ZERO 0x01
539 #define BLENDFACT_ONE 0x02
540 #define BLENDFACT_SRC_COLR 0x03
541 #define BLENDFACT_INV_SRC_COLR 0x04
542 #define BLENDFACT_SRC_ALPHA 0x05
543 #define BLENDFACT_INV_SRC_ALPHA 0x06
544 #define BLENDFACT_DST_ALPHA 0x07
545 #define BLENDFACT_INV_DST_ALPHA 0x08
546 #define BLENDFACT_DST_COLR 0x09
547 #define BLENDFACT_INV_DST_COLR 0x0a
548 #define BLENDFACT_SRC_ALPHA_SATURATE 0x0b
549 #define BLENDFACT_CONST_COLOR 0x0c
550 #define BLENDFACT_INV_CONST_COLOR 0x0d
551 #define BLENDFACT_CONST_ALPHA 0x0e
552 #define BLENDFACT_INV_CONST_ALPHA 0x0f
553 #define BLENDFACT_MASK 0x0f
554
555 enum {
556 DRI_CONF_BO_REUSE_DISABLED,
557 DRI_CONF_BO_REUSE_ALL
558 };
559
560 extern int intel_translate_shadow_compare_func(GLenum func);
561 extern int intel_translate_compare_func(GLenum func);
562 extern int intel_translate_stencil_op(GLenum op);
563 extern int intel_translate_blend_factor(GLenum factor);
564 extern int intel_translate_logic_op(GLenum opcode);
565
566 void intel_viewport(GLcontext * ctx, GLint x, GLint y,
567 GLsizei width, GLsizei height);
568
569 void intel_update_renderbuffers(__DRIcontext *context,
570 __DRIdrawable *drawable);
571
572 void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
573 uint32_t buffer_id);
574
575 /*======================================================================
576 * Inline conversion functions.
577 * These are better-typed than the macros used previously:
578 */
579 static INLINE struct intel_context *
580 intel_context(GLcontext * ctx)
581 {
582 return (struct intel_context *) ctx;
583 }
584
585 static INLINE GLboolean
586 is_power_of_two(uint32_t value)
587 {
588 return (value & (value - 1)) == 0;
589 }
590
591 static inline void
592 intel_bo_map_gtt_preferred(struct intel_context *intel,
593 drm_intel_bo *bo,
594 GLboolean write)
595 {
596 if (intel->intelScreen->kernel_exec_fencing)
597 drm_intel_gem_bo_map_gtt(bo);
598 else
599 drm_intel_bo_map(bo, write);
600 }
601
602 static inline void
603 intel_bo_unmap_gtt_preferred(struct intel_context *intel,
604 drm_intel_bo *bo)
605 {
606 if (intel->intelScreen->kernel_exec_fencing)
607 drm_intel_gem_bo_unmap_gtt(bo);
608 else
609 drm_intel_bo_unmap(bo);
610 }
611
612 #endif