ec026f80244b354796643c058401a5446ab902f6
[mesa.git] / src / mesa / drivers / dri / intel / intel_context.h
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef INTELCONTEXT_INC
29 #define INTELCONTEXT_INC
30
31
32
33 #include "main/mtypes.h"
34 #include "main/mm.h"
35 #include "texmem.h"
36 #include "dri_metaops.h"
37 #include "drm.h"
38 #include "intel_bufmgr.h"
39
40 #include "intel_screen.h"
41 #include "intel_tex_obj.h"
42 #include "i915_drm.h"
43 #include "tnl/t_vertex.h"
44
45 #define TAG(x) intel##x
46 #include "tnl_dd/t_dd_vertex.h"
47 #undef TAG
48
49 #define DV_PF_555 (1<<8)
50 #define DV_PF_565 (2<<8)
51 #define DV_PF_8888 (3<<8)
52 #define DV_PF_4444 (8<<8)
53 #define DV_PF_1555 (9<<8)
54
55 struct intel_region;
56 struct intel_context;
57
58 typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
59 intelVertex *, intelVertex *);
60 typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
61 intelVertex *);
62 typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
63
64 /**
65 * Bits for intel->Fallback field
66 */
67 /*@{*/
68 #define INTEL_FALLBACK_DRAW_BUFFER 0x1
69 #define INTEL_FALLBACK_READ_BUFFER 0x2
70 #define INTEL_FALLBACK_DEPTH_BUFFER 0x4
71 #define INTEL_FALLBACK_STENCIL_BUFFER 0x8
72 #define INTEL_FALLBACK_USER 0x10
73 #define INTEL_FALLBACK_RENDERMODE 0x20
74 #define INTEL_FALLBACK_TEXTURE 0x40
75 #define INTEL_FALLBACK_DRIVER 0x1000 /**< first for drivers */
76 /*@}*/
77
78 extern void intelFallback(struct intel_context *intel, GLbitfield bit,
79 GLboolean mode);
80 #define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
81
82
83 #define INTEL_WRITE_PART 0x1
84 #define INTEL_WRITE_FULL 0x2
85 #define INTEL_READ 0x4
86
87 #define INTEL_MAX_FIXUP 64
88
89 struct intel_sync_object {
90 struct gl_sync_object Base;
91
92 /** Batch associated with this sync object */
93 drm_intel_bo *bo;
94 };
95
96 /**
97 * intel_context is derived from Mesa's context class: GLcontext.
98 */
99 struct intel_context
100 {
101 GLcontext ctx; /**< base class, must be first field */
102
103 struct
104 {
105 void (*destroy) (struct intel_context * intel);
106 void (*emit_state) (struct intel_context * intel);
107 void (*finish_batch) (struct intel_context * intel);
108 void (*new_batch) (struct intel_context * intel);
109 void (*emit_invarient_state) (struct intel_context * intel);
110 void (*note_fence) (struct intel_context *intel, GLuint fence);
111 void (*update_texture_state) (struct intel_context * intel);
112
113 void (*render_start) (struct intel_context * intel);
114 void (*render_prevalidate) (struct intel_context * intel);
115 void (*set_draw_region) (struct intel_context * intel,
116 struct intel_region * draw_regions[],
117 struct intel_region * depth_region,
118 GLuint num_regions);
119
120 void (*reduced_primitive_state) (struct intel_context * intel,
121 GLenum rprim);
122
123 GLboolean (*check_vertex_size) (struct intel_context * intel,
124 GLuint expected);
125 void (*invalidate_state) (struct intel_context *intel,
126 GLuint new_state);
127
128
129 /* Metaops:
130 */
131 void (*install_meta_state) (struct intel_context * intel);
132 void (*leave_meta_state) (struct intel_context * intel);
133
134 void (*meta_draw_region) (struct intel_context * intel,
135 struct intel_region * draw_region,
136 struct intel_region * depth_region);
137
138 void (*meta_color_mask) (struct intel_context * intel, GLboolean);
139
140 void (*meta_stencil_replace) (struct intel_context * intel,
141 GLuint mask, GLuint clear);
142
143 void (*meta_depth_replace) (struct intel_context * intel);
144
145 void (*meta_texture_blend_replace) (struct intel_context * intel);
146
147 void (*meta_no_stencil_write) (struct intel_context * intel);
148 void (*meta_no_depth_write) (struct intel_context * intel);
149 void (*meta_no_texture) (struct intel_context * intel);
150
151 void (*meta_import_pixel_state) (struct intel_context * intel);
152 void (*meta_frame_buffer_texture) (struct intel_context *intel,
153 GLint xoff, GLint yoff);
154
155 GLboolean(*meta_tex_rect_source) (struct intel_context * intel,
156 dri_bo * buffer,
157 GLuint offset,
158 GLuint pitch,
159 GLuint height,
160 GLenum format, GLenum type);
161
162 void (*assert_not_dirty) (struct intel_context *intel);
163
164 void (*debug_batch)(struct intel_context *intel);
165 } vtbl;
166
167 struct dri_metaops meta;
168
169 GLbitfield Fallback; /**< mask of INTEL_FALLBACK_x bits */
170 GLuint NewGLState;
171
172 dri_bufmgr *bufmgr;
173 unsigned int maxBatchSize;
174
175 /**
176 * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
177 */
178 int gen;
179 GLboolean needs_ff_sync;
180 GLboolean is_ironlake;
181 GLboolean is_g4x;
182 GLboolean is_945;
183 GLboolean has_luminance_srgb;
184
185 int urb_size;
186
187 struct intel_region *front_region;
188 struct intel_region *back_region;
189 struct intel_region *depth_region;
190
191 struct intel_batchbuffer *batch;
192 drm_intel_bo *first_post_swapbuffers_batch;
193 GLboolean no_batch_wrap;
194
195 struct
196 {
197 GLuint id;
198 uint32_t primitive; /**< Current hardware primitive type */
199 void (*flush) (struct intel_context *);
200 GLubyte *start_ptr; /**< for i8xx */
201 dri_bo *vb_bo;
202 uint8_t *vb;
203 unsigned int start_offset; /**< Byte offset of primitive sequence */
204 unsigned int current_offset; /**< Byte offset of next vertex */
205 unsigned int count; /**< Number of vertices in current primitive */
206 } prim;
207
208 GLuint stats_wm;
209 GLboolean locked;
210 char *prevLockFile;
211 int prevLockLine;
212
213 /* Offsets of fields within the current vertex:
214 */
215 GLuint coloroffset;
216 GLuint specoffset;
217 GLuint wpos_offset;
218 GLuint wpos_size;
219
220 struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
221 GLuint vertex_attr_count;
222
223 GLfloat polygon_offset_scale; /* dependent on depth_scale, bpp */
224
225 GLboolean hw_stencil;
226 GLboolean hw_stipple;
227 GLboolean depth_buffer_is_float;
228 GLboolean no_rast;
229 GLboolean no_hw;
230 GLboolean always_flush_batch;
231 GLboolean always_flush_cache;
232
233 /* 0 - nonconformant, best performance;
234 * 1 - fallback to sw for known conformance bugs
235 * 2 - always fallback to sw
236 */
237 GLuint conformance_mode;
238
239 /* State for intelvb.c and inteltris.c.
240 */
241 GLuint RenderIndex;
242 GLmatrix ViewportMatrix;
243 GLenum render_primitive;
244 GLenum reduced_primitive;
245 GLuint vertex_size;
246 GLubyte *verts; /* points to tnl->clipspace.vertex_buf */
247
248 /* Fallback rasterization functions
249 */
250 intel_point_func draw_point;
251 intel_line_func draw_line;
252 intel_tri_func draw_tri;
253
254 /**
255 * Set to true if a single constant cliprect should be used in the
256 * batchbuffer. Otherwise, cliprects must be calculated at batchbuffer
257 * flush time while the lock is held.
258 */
259 GLboolean constant_cliprect;
260
261 /**
262 * In !constant_cliprect mode, set to true if the front cliprects should be
263 * used instead of back.
264 */
265 GLboolean front_cliprects;
266
267 /**
268 * Set if rendering has occured to the drawable's front buffer.
269 *
270 * This is used in the DRI2 case to detect that glFlush should also copy
271 * the contents of the fake front buffer to the real front buffer.
272 */
273 GLboolean front_buffer_dirty;
274
275 /**
276 * Track whether front-buffer rendering is currently enabled
277 *
278 * A separate flag is used to track this in order to support MRT more
279 * easily.
280 */
281 GLboolean is_front_buffer_rendering;
282 /**
283 * Track whether front-buffer is the current read target.
284 *
285 * This is closely associated with is_front_buffer_rendering, but may
286 * be set separately. The DRI2 fake front buffer must be referenced
287 * either way.
288 */
289 GLboolean is_front_buffer_reading;
290
291 GLboolean use_texture_tiling;
292 GLboolean use_early_z;
293 drm_clip_rect_t fboRect; /**< cliprect for FBO rendering */
294
295 drm_clip_rect_t draw_rect;
296 drm_clip_rect_t scissor_rect;
297
298 int driFd;
299
300 __DRIcontext *driContext;
301 __DRIdrawable *driDrawable;
302 __DRIdrawable *driReadDrawable;
303 __DRIscreen *driScreen;
304 intelScreenPrivate *intelScreen;
305 volatile drm_i915_sarea_t *sarea;
306
307 GLuint lastStamp;
308
309 /**
310 * Configuration cache
311 */
312 driOptionCache optionCache;
313
314 int64_t swap_ust;
315 int64_t swap_missed_ust;
316
317 GLuint swap_count;
318 GLuint swap_missed_count;
319 };
320
321 extern char *__progname;
322
323
324 #define SUBPIXEL_X 0.125
325 #define SUBPIXEL_Y 0.125
326
327 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
328 #define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1))
329 #define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0)
330
331 static INLINE uint32_t
332 U_FIXED(float value, uint32_t frac_bits)
333 {
334 value *= (1 << frac_bits);
335 return value < 0 ? 0 : value;
336 }
337
338 static INLINE uint32_t
339 S_FIXED(float value, uint32_t frac_bits)
340 {
341 return value * (1 << frac_bits);
342 }
343
344 #define INTEL_FIREVERTICES(intel) \
345 do { \
346 if ((intel)->prim.flush) \
347 (intel)->prim.flush(intel); \
348 } while (0)
349
350 /* ================================================================
351 * From linux kernel i386 header files, copes with odd sizes better
352 * than COPY_DWORDS would:
353 * XXX Put this in src/mesa/main/imports.h ???
354 */
355 #if defined(i386) || defined(__i386__)
356 static INLINE void * __memcpy(void * to, const void * from, size_t n)
357 {
358 int d0, d1, d2;
359 __asm__ __volatile__(
360 "rep ; movsl\n\t"
361 "testb $2,%b4\n\t"
362 "je 1f\n\t"
363 "movsw\n"
364 "1:\ttestb $1,%b4\n\t"
365 "je 2f\n\t"
366 "movsb\n"
367 "2:"
368 : "=&c" (d0), "=&D" (d1), "=&S" (d2)
369 :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
370 : "memory");
371 return (to);
372 }
373 #else
374 #define __memcpy(a,b,c) memcpy(a,b,c)
375 #endif
376
377
378 /* ================================================================
379 * Debugging:
380 */
381 extern int INTEL_DEBUG;
382
383 #define DEBUG_TEXTURE 0x1
384 #define DEBUG_STATE 0x2
385 #define DEBUG_IOCTL 0x4
386 #define DEBUG_BLIT 0x8
387 #define DEBUG_MIPTREE 0x10
388 #define DEBUG_FALLBACKS 0x20
389 #define DEBUG_VERBOSE 0x40
390 #define DEBUG_BATCH 0x80
391 #define DEBUG_PIXEL 0x100
392 #define DEBUG_BUFMGR 0x200
393 #define DEBUG_REGION 0x400
394 #define DEBUG_FBO 0x800
395 #define DEBUG_LOCK 0x1000
396 #define DEBUG_SYNC 0x2000
397 #define DEBUG_PRIMS 0x4000
398 #define DEBUG_VERTS 0x8000
399 #define DEBUG_DRI 0x10000
400 #define DEBUG_DMA 0x20000
401 #define DEBUG_SANITY 0x40000
402 #define DEBUG_SLEEP 0x80000
403 #define DEBUG_STATS 0x100000
404 #define DEBUG_TILE 0x200000
405 #define DEBUG_SINGLE_THREAD 0x400000
406 #define DEBUG_WM 0x800000
407 #define DEBUG_URB 0x1000000
408 #define DEBUG_VS 0x2000000
409
410 #define DBG(...) do { \
411 if (INTEL_DEBUG & FILE_DEBUG_FLAG) \
412 _mesa_printf(__VA_ARGS__); \
413 } while(0)
414
415 #define PCI_CHIP_845_G 0x2562
416 #define PCI_CHIP_I830_M 0x3577
417 #define PCI_CHIP_I855_GM 0x3582
418 #define PCI_CHIP_I865_G 0x2572
419 #define PCI_CHIP_I915_G 0x2582
420 #define PCI_CHIP_I915_GM 0x2592
421 #define PCI_CHIP_I945_G 0x2772
422 #define PCI_CHIP_I945_GM 0x27A2
423 #define PCI_CHIP_I945_GME 0x27AE
424 #define PCI_CHIP_G33_G 0x29C2
425 #define PCI_CHIP_Q35_G 0x29B2
426 #define PCI_CHIP_Q33_G 0x29D2
427
428
429 /* ================================================================
430 * intel_context.c:
431 */
432
433 extern GLboolean intelInitContext(struct intel_context *intel,
434 const __GLcontextModes * mesaVis,
435 __DRIcontext * driContextPriv,
436 void *sharedContextPrivate,
437 struct dd_function_table *functions);
438
439 extern void intelFinish(GLcontext * ctx);
440 extern void intelFlush(GLcontext * ctx);
441
442 extern void intelInitDriverFunctions(struct dd_function_table *functions);
443
444 void intel_init_syncobj_functions(struct dd_function_table *functions);
445
446
447 /* ================================================================
448 * intel_state.c:
449 */
450 extern void intelInitStateFuncs(struct dd_function_table *functions);
451
452 #define COMPAREFUNC_ALWAYS 0
453 #define COMPAREFUNC_NEVER 0x1
454 #define COMPAREFUNC_LESS 0x2
455 #define COMPAREFUNC_EQUAL 0x3
456 #define COMPAREFUNC_LEQUAL 0x4
457 #define COMPAREFUNC_GREATER 0x5
458 #define COMPAREFUNC_NOTEQUAL 0x6
459 #define COMPAREFUNC_GEQUAL 0x7
460
461 #define STENCILOP_KEEP 0
462 #define STENCILOP_ZERO 0x1
463 #define STENCILOP_REPLACE 0x2
464 #define STENCILOP_INCRSAT 0x3
465 #define STENCILOP_DECRSAT 0x4
466 #define STENCILOP_INCR 0x5
467 #define STENCILOP_DECR 0x6
468 #define STENCILOP_INVERT 0x7
469
470 #define LOGICOP_CLEAR 0
471 #define LOGICOP_NOR 0x1
472 #define LOGICOP_AND_INV 0x2
473 #define LOGICOP_COPY_INV 0x3
474 #define LOGICOP_AND_RVRSE 0x4
475 #define LOGICOP_INV 0x5
476 #define LOGICOP_XOR 0x6
477 #define LOGICOP_NAND 0x7
478 #define LOGICOP_AND 0x8
479 #define LOGICOP_EQUIV 0x9
480 #define LOGICOP_NOOP 0xa
481 #define LOGICOP_OR_INV 0xb
482 #define LOGICOP_COPY 0xc
483 #define LOGICOP_OR_RVRSE 0xd
484 #define LOGICOP_OR 0xe
485 #define LOGICOP_SET 0xf
486
487 #define BLENDFACT_ZERO 0x01
488 #define BLENDFACT_ONE 0x02
489 #define BLENDFACT_SRC_COLR 0x03
490 #define BLENDFACT_INV_SRC_COLR 0x04
491 #define BLENDFACT_SRC_ALPHA 0x05
492 #define BLENDFACT_INV_SRC_ALPHA 0x06
493 #define BLENDFACT_DST_ALPHA 0x07
494 #define BLENDFACT_INV_DST_ALPHA 0x08
495 #define BLENDFACT_DST_COLR 0x09
496 #define BLENDFACT_INV_DST_COLR 0x0a
497 #define BLENDFACT_SRC_ALPHA_SATURATE 0x0b
498 #define BLENDFACT_CONST_COLOR 0x0c
499 #define BLENDFACT_INV_CONST_COLOR 0x0d
500 #define BLENDFACT_CONST_ALPHA 0x0e
501 #define BLENDFACT_INV_CONST_ALPHA 0x0f
502 #define BLENDFACT_MASK 0x0f
503
504 enum {
505 DRI_CONF_BO_REUSE_DISABLED,
506 DRI_CONF_BO_REUSE_ALL
507 };
508
509 extern int intel_translate_shadow_compare_func(GLenum func);
510 extern int intel_translate_compare_func(GLenum func);
511 extern int intel_translate_stencil_op(GLenum op);
512 extern int intel_translate_blend_factor(GLenum factor);
513 extern int intel_translate_logic_op(GLenum opcode);
514
515 void intel_viewport(GLcontext * ctx, GLint x, GLint y,
516 GLsizei width, GLsizei height);
517
518 void intel_update_renderbuffers(__DRIcontext *context,
519 __DRIdrawable *drawable);
520
521 void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
522 uint32_t buffer_id);
523
524 /*======================================================================
525 * Inline conversion functions.
526 * These are better-typed than the macros used previously:
527 */
528 static INLINE struct intel_context *
529 intel_context(GLcontext * ctx)
530 {
531 return (struct intel_context *) ctx;
532 }
533
534 static INLINE GLboolean
535 is_power_of_two(uint32_t value)
536 {
537 return (value & (value - 1)) == 0;
538 }
539
540 static INLINE void
541 intel_bo_map_gtt_preferred(struct intel_context *intel,
542 drm_intel_bo *bo,
543 GLboolean write)
544 {
545 if (intel->intelScreen->kernel_exec_fencing)
546 drm_intel_gem_bo_map_gtt(bo);
547 else
548 drm_intel_bo_map(bo, write);
549 }
550
551 static INLINE void
552 intel_bo_unmap_gtt_preferred(struct intel_context *intel,
553 drm_intel_bo *bo)
554 {
555 if (intel->intelScreen->kernel_exec_fencing)
556 drm_intel_gem_bo_unmap_gtt(bo);
557 else
558 drm_intel_bo_unmap(bo);
559 }
560
561 #endif