1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #ifndef INTELCONTEXT_INC
29 #define INTELCONTEXT_INC
33 #include "main/mtypes.h"
38 /* Evil hack for using libdrm in a c++ compiler. */
43 #include "intel_bufmgr.h"
45 #include "intel_screen.h"
46 #include "intel_tex_obj.h"
54 #include "tnl/t_vertex.h"
56 #define TAG(x) intel##x
57 #include "tnl_dd/t_dd_vertex.h"
60 #define DV_PF_555 (1<<8)
61 #define DV_PF_565 (2<<8)
62 #define DV_PF_8888 (3<<8)
63 #define DV_PF_4444 (8<<8)
64 #define DV_PF_1555 (9<<8)
69 typedef void (*intel_tri_func
) (struct intel_context
*, intelVertex
*,
70 intelVertex
*, intelVertex
*);
71 typedef void (*intel_line_func
) (struct intel_context
*, intelVertex
*,
73 typedef void (*intel_point_func
) (struct intel_context
*, intelVertex
*);
76 * Bits for intel->Fallback field
79 #define INTEL_FALLBACK_DRAW_BUFFER 0x1
80 #define INTEL_FALLBACK_READ_BUFFER 0x2
81 #define INTEL_FALLBACK_DEPTH_BUFFER 0x4
82 #define INTEL_FALLBACK_STENCIL_BUFFER 0x8
83 #define INTEL_FALLBACK_USER 0x10
84 #define INTEL_FALLBACK_RENDERMODE 0x20
85 #define INTEL_FALLBACK_TEXTURE 0x40
86 #define INTEL_FALLBACK_DRIVER 0x1000 /**< first for drivers */
89 extern void intelFallback(struct intel_context
*intel
, GLbitfield bit
,
91 #define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
94 #define INTEL_WRITE_PART 0x1
95 #define INTEL_WRITE_FULL 0x2
96 #define INTEL_READ 0x4
98 #define INTEL_MAX_FIXUP 64
102 #define likely(expr) (__builtin_expect(expr, 1))
103 #define unlikely(expr) (__builtin_expect(expr, 0))
105 #define likely(expr) (expr)
106 #define unlikely(expr) (expr)
110 struct intel_sync_object
{
111 struct gl_sync_object Base
;
113 /** Batch associated with this sync object */
120 * intel_context is derived from Mesa's context class: struct gl_context.
124 struct gl_context ctx
; /**< base class, must be first field */
128 void (*destroy
) (struct intel_context
* intel
);
129 void (*emit_state
) (struct intel_context
* intel
);
130 void (*finish_batch
) (struct intel_context
* intel
);
131 void (*new_batch
) (struct intel_context
* intel
);
132 void (*emit_invarient_state
) (struct intel_context
* intel
);
133 void (*update_texture_state
) (struct intel_context
* intel
);
135 void (*render_start
) (struct intel_context
* intel
);
136 void (*render_prevalidate
) (struct intel_context
* intel
);
137 void (*set_draw_region
) (struct intel_context
* intel
,
138 struct intel_region
* draw_regions
[],
139 struct intel_region
* depth_region
,
141 void (*update_draw_buffer
)(struct intel_context
*intel
);
143 void (*reduced_primitive_state
) (struct intel_context
* intel
,
146 bool (*check_vertex_size
) (struct intel_context
* intel
,
148 void (*invalidate_state
) (struct intel_context
*intel
,
151 void (*assert_not_dirty
) (struct intel_context
*intel
);
153 void (*debug_batch
)(struct intel_context
*intel
);
154 bool (*render_target_supported
)(gl_format format
);
156 /** Can HiZ be enabled on a depthbuffer of the given format? */
157 bool (*is_hiz_depth_format
)(struct intel_context
*intel
,
161 * \name HiZ operations
163 * See the following sections of the Sandy Bridge PRM, Volume 1, Part2:
164 * - 7.5.3.1 Depth Buffer Clear
165 * - 7.5.3.2 Depth Buffer Resolve
166 * - 7.5.3.3 Hierarchical Depth Buffer Resolve
169 void (*hiz_resolve_depthbuffer
)(struct intel_context
*intel
,
170 struct intel_region
*depth_region
);
171 void (*hiz_resolve_hizbuffer
)(struct intel_context
*intel
,
172 struct intel_region
*depth_region
);
176 * Surface state operations (i965+ only)
179 void (*update_texture_surface
)(struct gl_context
*ctx
, unsigned unit
);
180 void (*update_renderbuffer_surface
)(struct brw_context
*brw
,
181 struct gl_renderbuffer
*rb
,
183 void (*update_null_renderbuffer_surface
)(struct brw_context
*brw
,
185 void (*create_constant_surface
)(struct brw_context
*brw
,
188 uint32_t *out_offset
);
192 GLbitfield Fallback
; /**< mask of INTEL_FALLBACK_x bits */
196 unsigned int maxBatchSize
;
199 * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
206 bool has_separate_stencil
;
207 bool must_use_separate_stencil
;
212 struct intel_batchbuffer
{
213 /** Current batchbuffer being queued up. */
215 /** Last BO submitted to the hardware. Used for glFinish(). */
216 drm_intel_bo
*last_bo
;
217 /** BO for post-sync nonzero writes for gen6 workaround. */
218 drm_intel_bo
*workaround_bo
;
219 bool need_workaround_flush
;
221 struct cached_batch_item
*cached_items
;
223 uint16_t emit
, total
;
224 uint16_t used
, reserved_space
;
226 #define BATCH_SZ (8192*sizeof(uint32_t))
228 uint32_t state_batch_offset
;
237 drm_intel_bo
*first_post_swapbuffers_batch
;
240 bool tnl_pipeline_running
; /**< Set while i915's _tnl_run_pipeline. */
245 uint32_t start_ptr
; /**< for i8xx */
246 uint32_t primitive
; /**< Current hardware primitive type */
247 void (*flush
) (struct intel_context
*);
250 unsigned int start_offset
; /**< Byte offset of primitive sequence */
251 unsigned int current_offset
; /**< Byte offset of next vertex */
252 unsigned int count
; /**< Number of vertices in current primitive */
259 uint32_t buffer_offset
;
265 /* Offsets of fields within the current vertex:
271 struct tnl_attr_map vertex_attrs
[VERT_ATTRIB_MAX
];
272 GLuint vertex_attr_count
;
274 GLfloat polygon_offset_scale
; /* dependent on depth_scale, bpp */
278 bool depth_buffer_is_float
;
280 bool always_flush_batch
;
281 bool always_flush_cache
;
283 /* 0 - nonconformant, best performance;
284 * 1 - fallback to sw for known conformance bugs
285 * 2 - always fallback to sw
287 GLuint conformance_mode
;
289 /* State for intelvb.c and inteltris.c.
292 GLmatrix ViewportMatrix
;
293 GLenum render_primitive
;
294 GLenum reduced_primitive
; /*< Only gen < 6 */
296 GLubyte
*verts
; /* points to tnl->clipspace.vertex_buf */
298 /* Fallback rasterization functions
300 intel_point_func draw_point
;
301 intel_line_func draw_line
;
302 intel_tri_func draw_tri
;
305 * Set if rendering has occured to the drawable's front buffer.
307 * This is used in the DRI2 case to detect that glFlush should also copy
308 * the contents of the fake front buffer to the real front buffer.
310 bool front_buffer_dirty
;
313 * Track whether front-buffer rendering is currently enabled
315 * A separate flag is used to track this in order to support MRT more
318 bool is_front_buffer_rendering
;
320 * Track whether front-buffer is the current read target.
322 * This is closely associated with is_front_buffer_rendering, but may
323 * be set separately. The DRI2 fake front buffer must be referenced
326 bool is_front_buffer_reading
;
329 * Count of intel_regions that are mapped.
331 * This allows us to assert that no batch buffer is emitted if a
334 int num_mapped_regions
;
336 bool use_texture_tiling
;
341 __DRIcontext
*driContext
;
342 struct intel_screen
*intelScreen
;
343 void (*saved_viewport
)(struct gl_context
* ctx
,
344 GLint x
, GLint y
, GLsizei width
, GLsizei height
);
347 * Configuration cache
349 driOptionCache optionCache
;
352 extern char *__progname
;
355 #define SUBPIXEL_X 0.125
356 #define SUBPIXEL_Y 0.125
358 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
361 * Align a value up to an alignment value
363 * If \c value is not already aligned to the requested alignment value, it
364 * will be rounded up.
366 * \param value Value to be rounded
367 * \param alignment Alignment value to be used. This must be a power of two.
369 * \sa ROUND_DOWN_TO()
371 #define ALIGN(value, alignment) (((value) + alignment - 1) & ~(alignment - 1))
374 * Align a value down to an alignment value
376 * If \c value is not already aligned to the requested alignment value, it
377 * will be rounded down.
379 * \param value Value to be rounded
380 * \param alignment Alignment value to be used. This must be a power of two.
384 #define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1))
386 #define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0)
388 static INLINE
uint32_t
389 U_FIXED(float value
, uint32_t frac_bits
)
391 value
*= (1 << frac_bits
);
392 return value
< 0 ? 0 : value
;
395 static INLINE
uint32_t
396 S_FIXED(float value
, uint32_t frac_bits
)
398 return value
* (1 << frac_bits
);
401 #define INTEL_FIREVERTICES(intel) \
403 if ((intel)->prim.flush) \
404 (intel)->prim.flush(intel); \
407 /* ================================================================
408 * From linux kernel i386 header files, copes with odd sizes better
409 * than COPY_DWORDS would:
410 * XXX Put this in src/mesa/main/imports.h ???
412 #if defined(i386) || defined(__i386__)
413 static INLINE
void * __memcpy(void * to
, const void * from
, size_t n
)
416 __asm__
__volatile__(
421 "1:\ttestb $1,%b4\n\t"
425 : "=&c" (d0
), "=&D" (d1
), "=&S" (d2
)
426 :"0" (n
/4), "q" (n
),"1" ((long) to
),"2" ((long) from
)
431 #define __memcpy(a,b,c) memcpy(a,b,c)
435 /* ================================================================
438 extern int INTEL_DEBUG
;
440 #define DEBUG_TEXTURE 0x1
441 #define DEBUG_STATE 0x2
442 #define DEBUG_IOCTL 0x4
443 #define DEBUG_BLIT 0x8
444 #define DEBUG_MIPTREE 0x10
445 #define DEBUG_FALLBACKS 0x20
446 #define DEBUG_VERBOSE 0x40
447 #define DEBUG_BATCH 0x80
448 #define DEBUG_PIXEL 0x100
449 #define DEBUG_BUFMGR 0x200
450 #define DEBUG_REGION 0x400
451 #define DEBUG_FBO 0x800
452 #define DEBUG_GS 0x1000
453 #define DEBUG_SYNC 0x2000
454 #define DEBUG_PRIMS 0x4000
455 #define DEBUG_VERTS 0x8000
456 #define DEBUG_DRI 0x10000
457 #define DEBUG_SF 0x20000
458 #define DEBUG_SANITY 0x40000
459 #define DEBUG_SLEEP 0x80000
460 #define DEBUG_STATS 0x100000
461 #define DEBUG_TILE 0x200000
462 #define DEBUG_WM 0x400000
463 #define DEBUG_URB 0x800000
464 #define DEBUG_VS 0x1000000
465 #define DEBUG_CLIP 0x2000000
467 #define DBG(...) do { \
468 if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG)) \
469 printf(__VA_ARGS__); \
472 #define fallback_debug(...) do { \
473 if (unlikely(INTEL_DEBUG & DEBUG_FALLBACKS)) \
474 printf(__VA_ARGS__); \
477 #define PCI_CHIP_845_G 0x2562
478 #define PCI_CHIP_I830_M 0x3577
479 #define PCI_CHIP_I855_GM 0x3582
480 #define PCI_CHIP_I865_G 0x2572
481 #define PCI_CHIP_I915_G 0x2582
482 #define PCI_CHIP_I915_GM 0x2592
483 #define PCI_CHIP_I945_G 0x2772
484 #define PCI_CHIP_I945_GM 0x27A2
485 #define PCI_CHIP_I945_GME 0x27AE
486 #define PCI_CHIP_G33_G 0x29C2
487 #define PCI_CHIP_Q35_G 0x29B2
488 #define PCI_CHIP_Q33_G 0x29D2
491 /* ================================================================
495 extern bool intelInitContext(struct intel_context
*intel
,
497 const struct gl_config
* mesaVis
,
498 __DRIcontext
* driContextPriv
,
499 void *sharedContextPrivate
,
500 struct dd_function_table
*functions
);
502 extern void intelFinish(struct gl_context
* ctx
);
503 extern void intel_flush_rendering_to_batch(struct gl_context
*ctx
);
504 extern void intel_flush(struct gl_context
* ctx
);
506 extern void intelInitDriverFunctions(struct dd_function_table
*functions
);
508 void intel_init_syncobj_functions(struct dd_function_table
*functions
);
511 /* ================================================================
514 extern void intelInitStateFuncs(struct dd_function_table
*functions
);
516 #define COMPAREFUNC_ALWAYS 0
517 #define COMPAREFUNC_NEVER 0x1
518 #define COMPAREFUNC_LESS 0x2
519 #define COMPAREFUNC_EQUAL 0x3
520 #define COMPAREFUNC_LEQUAL 0x4
521 #define COMPAREFUNC_GREATER 0x5
522 #define COMPAREFUNC_NOTEQUAL 0x6
523 #define COMPAREFUNC_GEQUAL 0x7
525 #define STENCILOP_KEEP 0
526 #define STENCILOP_ZERO 0x1
527 #define STENCILOP_REPLACE 0x2
528 #define STENCILOP_INCRSAT 0x3
529 #define STENCILOP_DECRSAT 0x4
530 #define STENCILOP_INCR 0x5
531 #define STENCILOP_DECR 0x6
532 #define STENCILOP_INVERT 0x7
534 #define LOGICOP_CLEAR 0
535 #define LOGICOP_NOR 0x1
536 #define LOGICOP_AND_INV 0x2
537 #define LOGICOP_COPY_INV 0x3
538 #define LOGICOP_AND_RVRSE 0x4
539 #define LOGICOP_INV 0x5
540 #define LOGICOP_XOR 0x6
541 #define LOGICOP_NAND 0x7
542 #define LOGICOP_AND 0x8
543 #define LOGICOP_EQUIV 0x9
544 #define LOGICOP_NOOP 0xa
545 #define LOGICOP_OR_INV 0xb
546 #define LOGICOP_COPY 0xc
547 #define LOGICOP_OR_RVRSE 0xd
548 #define LOGICOP_OR 0xe
549 #define LOGICOP_SET 0xf
551 #define BLENDFACT_ZERO 0x01
552 #define BLENDFACT_ONE 0x02
553 #define BLENDFACT_SRC_COLR 0x03
554 #define BLENDFACT_INV_SRC_COLR 0x04
555 #define BLENDFACT_SRC_ALPHA 0x05
556 #define BLENDFACT_INV_SRC_ALPHA 0x06
557 #define BLENDFACT_DST_ALPHA 0x07
558 #define BLENDFACT_INV_DST_ALPHA 0x08
559 #define BLENDFACT_DST_COLR 0x09
560 #define BLENDFACT_INV_DST_COLR 0x0a
561 #define BLENDFACT_SRC_ALPHA_SATURATE 0x0b
562 #define BLENDFACT_CONST_COLOR 0x0c
563 #define BLENDFACT_INV_CONST_COLOR 0x0d
564 #define BLENDFACT_CONST_ALPHA 0x0e
565 #define BLENDFACT_INV_CONST_ALPHA 0x0f
566 #define BLENDFACT_MASK 0x0f
569 DRI_CONF_BO_REUSE_DISABLED
,
570 DRI_CONF_BO_REUSE_ALL
573 extern int intel_translate_shadow_compare_func(GLenum func
);
574 extern int intel_translate_compare_func(GLenum func
);
575 extern int intel_translate_stencil_op(GLenum op
);
576 extern int intel_translate_blend_factor(GLenum factor
);
577 extern int intel_translate_logic_op(GLenum opcode
);
579 void intel_update_renderbuffers(__DRIcontext
*context
,
580 __DRIdrawable
*drawable
);
581 void intel_prepare_render(struct intel_context
*intel
);
583 void i915_set_buf_info_for_region(uint32_t *state
, struct intel_region
*region
,
586 /*======================================================================
587 * Inline conversion functions.
588 * These are better-typed than the macros used previously:
590 static INLINE
struct intel_context
*
591 intel_context(struct gl_context
* ctx
)
593 return (struct intel_context
*) ctx
;
597 is_power_of_two(uint32_t value
)
599 return (value
& (value
- 1)) == 0;