1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #ifndef INTELCONTEXT_INC
29 #define INTELCONTEXT_INC
33 #include "main/mtypes.h"
38 /* Evil hack for using libdrm in a c++ compiler. */
43 #include "intel_bufmgr.h"
45 #include "intel_screen.h"
46 #include "intel_tex_obj.h"
54 #include "tnl/t_vertex.h"
56 #define TAG(x) intel##x
57 #include "tnl_dd/t_dd_vertex.h"
60 #define DV_PF_555 (1<<8)
61 #define DV_PF_565 (2<<8)
62 #define DV_PF_8888 (3<<8)
63 #define DV_PF_4444 (8<<8)
64 #define DV_PF_1555 (9<<8)
69 typedef void (*intel_tri_func
) (struct intel_context
*, intelVertex
*,
70 intelVertex
*, intelVertex
*);
71 typedef void (*intel_line_func
) (struct intel_context
*, intelVertex
*,
73 typedef void (*intel_point_func
) (struct intel_context
*, intelVertex
*);
76 * Bits for intel->Fallback field
79 #define INTEL_FALLBACK_DRAW_BUFFER 0x1
80 #define INTEL_FALLBACK_READ_BUFFER 0x2
81 #define INTEL_FALLBACK_DEPTH_BUFFER 0x4
82 #define INTEL_FALLBACK_STENCIL_BUFFER 0x8
83 #define INTEL_FALLBACK_USER 0x10
84 #define INTEL_FALLBACK_RENDERMODE 0x20
85 #define INTEL_FALLBACK_TEXTURE 0x40
86 #define INTEL_FALLBACK_DRIVER 0x1000 /**< first for drivers */
89 extern void intelFallback(struct intel_context
*intel
, GLbitfield bit
,
91 #define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
94 #define INTEL_WRITE_PART 0x1
95 #define INTEL_WRITE_FULL 0x2
96 #define INTEL_READ 0x4
98 #define INTEL_MAX_FIXUP 64
102 #define likely(expr) (__builtin_expect(expr, 1))
103 #define unlikely(expr) (__builtin_expect(expr, 0))
105 #define likely(expr) (expr)
106 #define unlikely(expr) (expr)
110 struct intel_sync_object
{
111 struct gl_sync_object Base
;
113 /** Batch associated with this sync object */
120 * intel_context is derived from Mesa's context class: struct gl_context.
124 struct gl_context ctx
; /**< base class, must be first field */
128 void (*destroy
) (struct intel_context
* intel
);
129 void (*emit_state
) (struct intel_context
* intel
);
130 void (*finish_batch
) (struct intel_context
* intel
);
131 void (*new_batch
) (struct intel_context
* intel
);
132 void (*emit_invarient_state
) (struct intel_context
* intel
);
133 void (*update_texture_state
) (struct intel_context
* intel
);
135 void (*render_start
) (struct intel_context
* intel
);
136 void (*render_prevalidate
) (struct intel_context
* intel
);
137 void (*set_draw_region
) (struct intel_context
* intel
,
138 struct intel_region
* draw_regions
[],
139 struct intel_region
* depth_region
,
141 void (*update_draw_buffer
)(struct intel_context
*intel
);
143 void (*reduced_primitive_state
) (struct intel_context
* intel
,
146 bool (*check_vertex_size
) (struct intel_context
* intel
,
148 void (*invalidate_state
) (struct intel_context
*intel
,
151 void (*assert_not_dirty
) (struct intel_context
*intel
);
153 void (*debug_batch
)(struct intel_context
*intel
);
154 bool (*render_target_supported
)(struct intel_context
*intel
,
157 /** Can HiZ be enabled on a depthbuffer of the given format? */
158 bool (*is_hiz_depth_format
)(struct intel_context
*intel
,
162 * \name HiZ operations
164 * See the following sections of the Sandy Bridge PRM, Volume 1, Part2:
165 * - 7.5.3.1 Depth Buffer Clear
166 * - 7.5.3.2 Depth Buffer Resolve
167 * - 7.5.3.3 Hierarchical Depth Buffer Resolve
170 void (*resolve_hiz_slice
)(struct intel_context
*intel
,
171 struct intel_mipmap_tree
*mt
,
175 void (*resolve_depth_slice
)(struct intel_context
*intel
,
176 struct intel_mipmap_tree
*mt
,
182 * Surface state operations (i965+ only)
185 void (*update_texture_surface
)(struct gl_context
*ctx
, unsigned unit
);
186 void (*update_renderbuffer_surface
)(struct brw_context
*brw
,
187 struct gl_renderbuffer
*rb
,
189 void (*update_null_renderbuffer_surface
)(struct brw_context
*brw
,
191 void (*create_constant_surface
)(struct brw_context
*brw
,
194 uint32_t *out_offset
);
198 GLbitfield Fallback
; /**< mask of INTEL_FALLBACK_x bits */
202 unsigned int maxBatchSize
;
205 * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
212 bool has_separate_stencil
;
213 bool must_use_separate_stencil
;
218 struct intel_batchbuffer
{
219 /** Current batchbuffer being queued up. */
221 /** Last BO submitted to the hardware. Used for glFinish(). */
222 drm_intel_bo
*last_bo
;
223 /** BO for post-sync nonzero writes for gen6 workaround. */
224 drm_intel_bo
*workaround_bo
;
225 bool need_workaround_flush
;
227 struct cached_batch_item
*cached_items
;
229 uint16_t emit
, total
;
230 uint16_t used
, reserved_space
;
232 #define BATCH_SZ (8192*sizeof(uint32_t))
234 uint32_t state_batch_offset
;
236 bool needs_sol_reset
;
244 drm_intel_bo
*first_post_swapbuffers_batch
;
247 bool tnl_pipeline_running
; /**< Set while i915's _tnl_run_pipeline. */
252 uint32_t start_ptr
; /**< for i8xx */
253 uint32_t primitive
; /**< Current hardware primitive type */
254 void (*flush
) (struct intel_context
*);
257 unsigned int start_offset
; /**< Byte offset of primitive sequence */
258 unsigned int current_offset
; /**< Byte offset of next vertex */
259 unsigned int count
; /**< Number of vertices in current primitive */
266 uint32_t buffer_offset
;
272 /* Offsets of fields within the current vertex:
278 struct tnl_attr_map vertex_attrs
[VERT_ATTRIB_MAX
];
279 GLuint vertex_attr_count
;
281 GLfloat polygon_offset_scale
; /* dependent on depth_scale, bpp */
286 bool always_flush_batch
;
287 bool always_flush_cache
;
289 /* 0 - nonconformant, best performance;
290 * 1 - fallback to sw for known conformance bugs
291 * 2 - always fallback to sw
293 GLuint conformance_mode
;
295 /* State for intelvb.c and inteltris.c.
298 GLmatrix ViewportMatrix
;
299 GLenum render_primitive
;
300 GLenum reduced_primitive
; /*< Only gen < 6 */
302 GLubyte
*verts
; /* points to tnl->clipspace.vertex_buf */
304 /* Fallback rasterization functions
306 intel_point_func draw_point
;
307 intel_line_func draw_line
;
308 intel_tri_func draw_tri
;
311 * Set if rendering has occured to the drawable's front buffer.
313 * This is used in the DRI2 case to detect that glFlush should also copy
314 * the contents of the fake front buffer to the real front buffer.
316 bool front_buffer_dirty
;
319 * Track whether front-buffer rendering is currently enabled
321 * A separate flag is used to track this in order to support MRT more
324 bool is_front_buffer_rendering
;
326 * Track whether front-buffer is the current read target.
328 * This is closely associated with is_front_buffer_rendering, but may
329 * be set separately. The DRI2 fake front buffer must be referenced
332 bool is_front_buffer_reading
;
335 * Count of intel_regions that are mapped.
337 * This allows us to assert that no batch buffer is emitted if a
340 int num_mapped_regions
;
342 bool use_texture_tiling
;
347 __DRIcontext
*driContext
;
348 struct intel_screen
*intelScreen
;
349 void (*saved_viewport
)(struct gl_context
* ctx
,
350 GLint x
, GLint y
, GLsizei width
, GLsizei height
);
353 * Configuration cache
355 driOptionCache optionCache
;
358 extern char *__progname
;
361 #define SUBPIXEL_X 0.125
362 #define SUBPIXEL_Y 0.125
364 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
367 * Align a value up to an alignment value
369 * If \c value is not already aligned to the requested alignment value, it
370 * will be rounded up.
372 * \param value Value to be rounded
373 * \param alignment Alignment value to be used. This must be a power of two.
375 * \sa ROUND_DOWN_TO()
377 #define ALIGN(value, alignment) (((value) + alignment - 1) & ~(alignment - 1))
380 * Align a value down to an alignment value
382 * If \c value is not already aligned to the requested alignment value, it
383 * will be rounded down.
385 * \param value Value to be rounded
386 * \param alignment Alignment value to be used. This must be a power of two.
390 #define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1))
392 #define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0)
394 static INLINE
uint32_t
395 U_FIXED(float value
, uint32_t frac_bits
)
397 value
*= (1 << frac_bits
);
398 return value
< 0 ? 0 : value
;
401 static INLINE
uint32_t
402 S_FIXED(float value
, uint32_t frac_bits
)
404 return value
* (1 << frac_bits
);
407 #define INTEL_FIREVERTICES(intel) \
409 if ((intel)->prim.flush) \
410 (intel)->prim.flush(intel); \
413 /* ================================================================
414 * From linux kernel i386 header files, copes with odd sizes better
415 * than COPY_DWORDS would:
416 * XXX Put this in src/mesa/main/imports.h ???
418 #if defined(i386) || defined(__i386__)
419 static INLINE
void * __memcpy(void * to
, const void * from
, size_t n
)
422 __asm__
__volatile__(
427 "1:\ttestb $1,%b4\n\t"
431 : "=&c" (d0
), "=&D" (d1
), "=&S" (d2
)
432 :"0" (n
/4), "q" (n
),"1" ((long) to
),"2" ((long) from
)
437 #define __memcpy(a,b,c) memcpy(a,b,c)
441 /* ================================================================
444 extern int INTEL_DEBUG
;
446 #define DEBUG_TEXTURE 0x1
447 #define DEBUG_STATE 0x2
448 #define DEBUG_IOCTL 0x4
449 #define DEBUG_BLIT 0x8
450 #define DEBUG_MIPTREE 0x10
451 #define DEBUG_FALLBACKS 0x20
452 #define DEBUG_VERBOSE 0x40
453 #define DEBUG_BATCH 0x80
454 #define DEBUG_PIXEL 0x100
455 #define DEBUG_BUFMGR 0x200
456 #define DEBUG_REGION 0x400
457 #define DEBUG_FBO 0x800
458 #define DEBUG_GS 0x1000
459 #define DEBUG_SYNC 0x2000
460 #define DEBUG_PRIMS 0x4000
461 #define DEBUG_VERTS 0x8000
462 #define DEBUG_DRI 0x10000
463 #define DEBUG_SF 0x20000
464 #define DEBUG_SANITY 0x40000
465 #define DEBUG_SLEEP 0x80000
466 #define DEBUG_STATS 0x100000
467 #define DEBUG_TILE 0x200000
468 #define DEBUG_WM 0x400000
469 #define DEBUG_URB 0x800000
470 #define DEBUG_VS 0x1000000
471 #define DEBUG_CLIP 0x2000000
473 #define DBG(...) do { \
474 if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG)) \
475 printf(__VA_ARGS__); \
478 #define fallback_debug(...) do { \
479 if (unlikely(INTEL_DEBUG & DEBUG_FALLBACKS)) \
480 printf(__VA_ARGS__); \
483 #define PCI_CHIP_845_G 0x2562
484 #define PCI_CHIP_I830_M 0x3577
485 #define PCI_CHIP_I855_GM 0x3582
486 #define PCI_CHIP_I865_G 0x2572
487 #define PCI_CHIP_I915_G 0x2582
488 #define PCI_CHIP_I915_GM 0x2592
489 #define PCI_CHIP_I945_G 0x2772
490 #define PCI_CHIP_I945_GM 0x27A2
491 #define PCI_CHIP_I945_GME 0x27AE
492 #define PCI_CHIP_G33_G 0x29C2
493 #define PCI_CHIP_Q35_G 0x29B2
494 #define PCI_CHIP_Q33_G 0x29D2
497 /* ================================================================
501 extern bool intelInitContext(struct intel_context
*intel
,
503 const struct gl_config
* mesaVis
,
504 __DRIcontext
* driContextPriv
,
505 void *sharedContextPrivate
,
506 struct dd_function_table
*functions
);
508 extern void intelFinish(struct gl_context
* ctx
);
509 extern void intel_flush_rendering_to_batch(struct gl_context
*ctx
);
510 extern void _intel_flush(struct gl_context
* ctx
, const char *file
, int line
);
512 #define intel_flush(ctx) _intel_flush(ctx, __FILE__, __LINE__)
514 extern void intelInitDriverFunctions(struct dd_function_table
*functions
);
516 void intel_init_syncobj_functions(struct dd_function_table
*functions
);
519 /* ================================================================
522 extern void intelInitStateFuncs(struct dd_function_table
*functions
);
524 #define COMPAREFUNC_ALWAYS 0
525 #define COMPAREFUNC_NEVER 0x1
526 #define COMPAREFUNC_LESS 0x2
527 #define COMPAREFUNC_EQUAL 0x3
528 #define COMPAREFUNC_LEQUAL 0x4
529 #define COMPAREFUNC_GREATER 0x5
530 #define COMPAREFUNC_NOTEQUAL 0x6
531 #define COMPAREFUNC_GEQUAL 0x7
533 #define STENCILOP_KEEP 0
534 #define STENCILOP_ZERO 0x1
535 #define STENCILOP_REPLACE 0x2
536 #define STENCILOP_INCRSAT 0x3
537 #define STENCILOP_DECRSAT 0x4
538 #define STENCILOP_INCR 0x5
539 #define STENCILOP_DECR 0x6
540 #define STENCILOP_INVERT 0x7
542 #define LOGICOP_CLEAR 0
543 #define LOGICOP_NOR 0x1
544 #define LOGICOP_AND_INV 0x2
545 #define LOGICOP_COPY_INV 0x3
546 #define LOGICOP_AND_RVRSE 0x4
547 #define LOGICOP_INV 0x5
548 #define LOGICOP_XOR 0x6
549 #define LOGICOP_NAND 0x7
550 #define LOGICOP_AND 0x8
551 #define LOGICOP_EQUIV 0x9
552 #define LOGICOP_NOOP 0xa
553 #define LOGICOP_OR_INV 0xb
554 #define LOGICOP_COPY 0xc
555 #define LOGICOP_OR_RVRSE 0xd
556 #define LOGICOP_OR 0xe
557 #define LOGICOP_SET 0xf
559 #define BLENDFACT_ZERO 0x01
560 #define BLENDFACT_ONE 0x02
561 #define BLENDFACT_SRC_COLR 0x03
562 #define BLENDFACT_INV_SRC_COLR 0x04
563 #define BLENDFACT_SRC_ALPHA 0x05
564 #define BLENDFACT_INV_SRC_ALPHA 0x06
565 #define BLENDFACT_DST_ALPHA 0x07
566 #define BLENDFACT_INV_DST_ALPHA 0x08
567 #define BLENDFACT_DST_COLR 0x09
568 #define BLENDFACT_INV_DST_COLR 0x0a
569 #define BLENDFACT_SRC_ALPHA_SATURATE 0x0b
570 #define BLENDFACT_CONST_COLOR 0x0c
571 #define BLENDFACT_INV_CONST_COLOR 0x0d
572 #define BLENDFACT_CONST_ALPHA 0x0e
573 #define BLENDFACT_INV_CONST_ALPHA 0x0f
574 #define BLENDFACT_MASK 0x0f
577 DRI_CONF_BO_REUSE_DISABLED
,
578 DRI_CONF_BO_REUSE_ALL
581 extern int intel_translate_shadow_compare_func(GLenum func
);
582 extern int intel_translate_compare_func(GLenum func
);
583 extern int intel_translate_stencil_op(GLenum op
);
584 extern int intel_translate_blend_factor(GLenum factor
);
585 extern int intel_translate_logic_op(GLenum opcode
);
587 void intel_update_renderbuffers(__DRIcontext
*context
,
588 __DRIdrawable
*drawable
);
589 void intel_prepare_render(struct intel_context
*intel
);
591 void i915_set_buf_info_for_region(uint32_t *state
, struct intel_region
*region
,
593 void intel_init_texture_formats(struct gl_context
*ctx
);
595 /*======================================================================
596 * Inline conversion functions.
597 * These are better-typed than the macros used previously:
599 static INLINE
struct intel_context
*
600 intel_context(struct gl_context
* ctx
)
602 return (struct intel_context
*) ctx
;
606 is_power_of_two(uint32_t value
)
608 return (value
& (value
- 1)) == 0;