1 /**************************************************************************
3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #include "intel_batchbuffer.h"
29 #include "intel_context.h"
30 #include "intel_mipmap_tree.h"
31 #include "intel_regions.h"
32 #include "intel_resolve_map.h"
33 #include "intel_span.h"
34 #include "intel_tex_layout.h"
35 #include "intel_tex.h"
36 #include "intel_blit.h"
38 #include "main/enums.h"
39 #include "main/formats.h"
40 #include "main/image.h"
41 #include "main/teximage.h"
43 #define FILE_DEBUG_FLAG DEBUG_MIPTREE
46 target_to_target(GLenum target
)
49 case GL_TEXTURE_CUBE_MAP_POSITIVE_X_ARB
:
50 case GL_TEXTURE_CUBE_MAP_NEGATIVE_X_ARB
:
51 case GL_TEXTURE_CUBE_MAP_POSITIVE_Y_ARB
:
52 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y_ARB
:
53 case GL_TEXTURE_CUBE_MAP_POSITIVE_Z_ARB
:
54 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z_ARB
:
55 return GL_TEXTURE_CUBE_MAP_ARB
;
61 static struct intel_mipmap_tree
*
62 intel_miptree_create_internal(struct intel_context
*intel
,
71 struct intel_mipmap_tree
*mt
= calloc(sizeof(*mt
), 1);
72 int compress_byte
= 0;
74 DBG("%s target %s format %s level %d..%d <-- %p\n", __FUNCTION__
,
75 _mesa_lookup_enum_by_nr(target
),
76 _mesa_get_format_name(format
),
77 first_level
, last_level
, mt
);
79 if (_mesa_is_format_compressed(format
))
80 compress_byte
= intel_compressed_num_bytes(format
);
82 mt
->target
= target_to_target(target
);
84 mt
->first_level
= first_level
;
85 mt
->last_level
= last_level
;
87 mt
->height0
= height0
;
88 mt
->cpp
= compress_byte
? compress_byte
: _mesa_get_format_bytes(mt
->format
);
89 mt
->compressed
= compress_byte
? 1 : 0;
92 intel_get_texture_alignment_unit(intel
, format
,
93 &mt
->align_w
, &mt
->align_h
);
95 if (target
== GL_TEXTURE_CUBE_MAP
) {
102 if (format
== MESA_FORMAT_S8
) {
103 /* The stencil buffer has quirky pitch requirements. From Vol 2a,
104 * 11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface Pitch":
105 * The pitch must be set to 2x the value computed based on width, as
106 * the stencil buffer is stored with two rows interleaved.
108 assert(intel
->has_separate_stencil
);
115 i945_miptree_layout(mt
);
117 i915_miptree_layout(mt
);
119 brw_miptree_layout(intel
, mt
);
122 if (_mesa_is_depthstencil_format(_mesa_get_format_base_format(format
)) &&
123 (intel
->must_use_separate_stencil
||
124 (intel
->has_separate_stencil
&&
125 intel
->vtbl
.is_hiz_depth_format(intel
, format
)))) {
126 mt
->stencil_mt
= intel_miptree_create(intel
,
135 if (!mt
->stencil_mt
) {
136 intel_miptree_release(&mt
);
140 /* Fix up the Z miptree format for how we're splitting out separate
141 * stencil. Gen7 expects there to be no stencil bits in its depth buffer.
143 if (mt
->format
== MESA_FORMAT_S8_Z24
) {
144 mt
->format
= MESA_FORMAT_X8_Z24
;
146 _mesa_problem("Unknown format %s in separate stencil\n",
147 _mesa_get_format_name(mt
->format
));
155 struct intel_mipmap_tree
*
156 intel_miptree_create(struct intel_context
*intel
,
164 bool expect_accelerated_upload
)
166 struct intel_mipmap_tree
*mt
;
167 uint32_t tiling
= I915_TILING_NONE
;
168 GLenum base_format
= _mesa_get_format_base_format(format
);
170 if (intel
->use_texture_tiling
&& !_mesa_is_format_compressed(format
)) {
171 if (intel
->gen
>= 4 &&
172 (base_format
== GL_DEPTH_COMPONENT
||
173 base_format
== GL_DEPTH_STENCIL_EXT
))
174 tiling
= I915_TILING_Y
;
175 else if (width0
>= 64)
176 tiling
= I915_TILING_X
;
179 if (format
== MESA_FORMAT_S8
) {
180 /* The stencil buffer is W tiled. However, we request from the kernel a
181 * non-tiled buffer because the GTT is incapable of W fencing.
183 * The stencil buffer has quirky pitch requirements. From Vol 2a,
184 * 11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface Pitch":
185 * The pitch must be set to 2x the value computed based on width, as
186 * the stencil buffer is stored with two rows interleaved.
187 * To accomplish this, we resort to the nasty hack of doubling the drm
188 * region's cpp and halving its height.
190 * If we neglect to double the pitch, then render corruption occurs.
192 tiling
= I915_TILING_NONE
;
193 width0
= ALIGN(width0
, 64);
194 height0
= ALIGN((height0
+ 1) / 2, 64);
197 mt
= intel_miptree_create_internal(intel
, target
, format
,
198 first_level
, last_level
, width0
,
201 * pitch == 0 || height == 0 indicates the null texture
203 if (!mt
|| !mt
->total_width
|| !mt
->total_height
) {
208 mt
->region
= intel_region_alloc(intel
->intelScreen
,
213 expect_accelerated_upload
);
224 struct intel_mipmap_tree
*
225 intel_miptree_create_for_region(struct intel_context
*intel
,
228 struct intel_region
*region
)
230 struct intel_mipmap_tree
*mt
;
232 mt
= intel_miptree_create_internal(intel
, target
, format
,
234 region
->width
, region
->height
, 1);
238 intel_region_reference(&mt
->region
, region
);
243 struct intel_mipmap_tree
*
244 intel_miptree_create_for_renderbuffer(struct intel_context
*intel
,
249 struct intel_mipmap_tree
*mt
;
251 mt
= intel_miptree_create(intel
, GL_TEXTURE_2D
, format
, 0, 0,
252 width
, height
, 1, true);
258 intel_miptree_reference(struct intel_mipmap_tree
**dst
,
259 struct intel_mipmap_tree
*src
)
264 intel_miptree_release(dst
);
268 DBG("%s %p refcount now %d\n", __FUNCTION__
, src
, src
->refcount
);
276 intel_miptree_release(struct intel_mipmap_tree
**mt
)
281 DBG("%s %p refcount will be %d\n", __FUNCTION__
, *mt
, (*mt
)->refcount
- 1);
282 if (--(*mt
)->refcount
<= 0) {
285 DBG("%s deleting %p\n", __FUNCTION__
, *mt
);
287 intel_region_release(&((*mt
)->region
));
288 intel_miptree_release(&(*mt
)->stencil_mt
);
289 intel_miptree_release(&(*mt
)->hiz_mt
);
290 intel_resolve_map_clear(&(*mt
)->hiz_map
);
292 for (i
= 0; i
< MAX_TEXTURE_LEVELS
; i
++) {
293 free((*mt
)->level
[i
].slice
);
302 intel_miptree_get_dimensions_for_image(struct gl_texture_image
*image
,
303 int *width
, int *height
, int *depth
)
305 switch (image
->TexObject
->Target
) {
306 case GL_TEXTURE_1D_ARRAY
:
307 *width
= image
->Width
;
309 *depth
= image
->Height
;
312 *width
= image
->Width
;
313 *height
= image
->Height
;
314 *depth
= image
->Depth
;
320 * Can the image be pulled into a unified mipmap tree? This mirrors
321 * the completeness test in a lot of ways.
323 * Not sure whether I want to pass gl_texture_image here.
326 intel_miptree_match_image(struct intel_mipmap_tree
*mt
,
327 struct gl_texture_image
*image
)
329 struct intel_texture_image
*intelImage
= intel_texture_image(image
);
330 GLuint level
= intelImage
->base
.Base
.Level
;
331 int width
, height
, depth
;
333 if (image
->TexFormat
!= mt
->format
&&
334 !(image
->TexFormat
== MESA_FORMAT_S8_Z24
&&
335 mt
->format
== MESA_FORMAT_X8_Z24
&&
340 intel_miptree_get_dimensions_for_image(image
, &width
, &height
, &depth
);
342 /* Test image dimensions against the base level image adjusted for
343 * minification. This will also catch images not present in the
344 * tree, changed targets, etc.
346 if (width
!= mt
->level
[level
].width
||
347 height
!= mt
->level
[level
].height
||
348 depth
!= mt
->level
[level
].depth
)
356 intel_miptree_set_level_info(struct intel_mipmap_tree
*mt
,
359 GLuint w
, GLuint h
, GLuint d
)
361 mt
->level
[level
].width
= w
;
362 mt
->level
[level
].height
= h
;
363 mt
->level
[level
].depth
= d
;
364 mt
->level
[level
].level_x
= x
;
365 mt
->level
[level
].level_y
= y
;
367 DBG("%s level %d size: %d,%d,%d offset %d,%d\n", __FUNCTION__
,
368 level
, w
, h
, d
, x
, y
);
370 assert(mt
->level
[level
].slice
== NULL
);
372 mt
->level
[level
].slice
= calloc(d
, sizeof(*mt
->level
[0].slice
));
373 mt
->level
[level
].slice
[0].x_offset
= mt
->level
[level
].level_x
;
374 mt
->level
[level
].slice
[0].y_offset
= mt
->level
[level
].level_y
;
379 intel_miptree_set_image_offset(struct intel_mipmap_tree
*mt
,
380 GLuint level
, GLuint img
,
383 if (img
== 0 && level
== 0)
384 assert(x
== 0 && y
== 0);
386 assert(img
< mt
->level
[level
].depth
);
388 mt
->level
[level
].slice
[img
].x_offset
= mt
->level
[level
].level_x
+ x
;
389 mt
->level
[level
].slice
[img
].y_offset
= mt
->level
[level
].level_y
+ y
;
391 DBG("%s level %d img %d pos %d,%d\n",
392 __FUNCTION__
, level
, img
,
393 mt
->level
[level
].slice
[img
].x_offset
,
394 mt
->level
[level
].slice
[img
].y_offset
);
399 * For cube map textures, either the \c face parameter can be used, of course,
400 * or the cube face can be interpreted as a depth layer and the \c layer
404 intel_miptree_get_image_offset(struct intel_mipmap_tree
*mt
,
405 GLuint level
, GLuint face
, GLuint layer
,
406 GLuint
*x
, GLuint
*y
)
411 assert(mt
->target
== GL_TEXTURE_CUBE_MAP
);
416 /* This branch may be taken even if the texture target is a cube map. In
417 * that case, the caller chose to interpret each cube face as a layer.
423 *x
= mt
->level
[level
].slice
[slice
].x_offset
;
424 *y
= mt
->level
[level
].slice
[slice
].y_offset
;
428 intel_miptree_copy_slice(struct intel_context
*intel
,
429 struct intel_mipmap_tree
*dst_mt
,
430 struct intel_mipmap_tree
*src_mt
,
436 gl_format format
= src_mt
->format
;
437 uint32_t width
= src_mt
->level
[level
].width
;
438 uint32_t height
= src_mt
->level
[level
].height
;
440 assert(depth
< src_mt
->level
[level
].depth
);
442 if (dst_mt
->compressed
) {
443 height
= ALIGN(height
, dst_mt
->align_h
) / dst_mt
->align_h
;
444 width
= ALIGN(width
, dst_mt
->align_w
);
447 uint32_t dst_x
, dst_y
, src_x
, src_y
;
448 intel_miptree_get_image_offset(dst_mt
, level
, face
, depth
,
450 intel_miptree_get_image_offset(src_mt
, level
, face
, depth
,
453 DBG("validate blit mt %p %d,%d/%d -> mt %p %d,%d/%d (%dx%d)\n",
454 src_mt
, src_x
, src_y
, src_mt
->region
->pitch
* src_mt
->region
->cpp
,
455 dst_mt
, dst_x
, dst_y
, dst_mt
->region
->pitch
* dst_mt
->region
->cpp
,
458 if (!intelEmitCopyBlit(intel
,
460 src_mt
->region
->pitch
, src_mt
->region
->bo
,
461 0, src_mt
->region
->tiling
,
462 dst_mt
->region
->pitch
, dst_mt
->region
->bo
,
463 0, dst_mt
->region
->tiling
,
469 fallback_debug("miptree validate blit for %s failed\n",
470 _mesa_get_format_name(format
));
471 void *dst
= intel_region_map(intel
, dst_mt
->region
, GL_MAP_WRITE_BIT
);
472 void *src
= intel_region_map(intel
, src_mt
->region
, GL_MAP_READ_BIT
);
476 dst_mt
->region
->pitch
,
479 src
, src_mt
->region
->pitch
,
482 intel_region_unmap(intel
, dst_mt
->region
);
483 intel_region_unmap(intel
, src_mt
->region
);
486 if (src_mt
->stencil_mt
) {
487 intel_miptree_copy_slice(intel
,
488 dst_mt
->stencil_mt
, src_mt
->stencil_mt
,
494 * Copies the image's current data to the given miptree, and associates that
495 * miptree with the image.
498 intel_miptree_copy_teximage(struct intel_context
*intel
,
499 struct intel_texture_image
*intelImage
,
500 struct intel_mipmap_tree
*dst_mt
)
502 struct intel_mipmap_tree
*src_mt
= intelImage
->mt
;
503 int level
= intelImage
->base
.Base
.Level
;
504 int face
= intelImage
->base
.Base
.Face
;
505 GLuint depth
= intelImage
->base
.Base
.Depth
;
507 for (int slice
= 0; slice
< depth
; slice
++) {
508 intel_miptree_copy_slice(intel
, dst_mt
, src_mt
, level
, face
, slice
);
511 intel_miptree_reference(&intelImage
->mt
, dst_mt
);
515 intel_miptree_alloc_hiz(struct intel_context
*intel
,
516 struct intel_mipmap_tree
*mt
)
518 assert(mt
->hiz_mt
== NULL
);
519 mt
->hiz_mt
= intel_miptree_create(intel
,
532 /* Mark that all slices need a HiZ resolve. */
533 struct intel_resolve_map
*head
= &mt
->hiz_map
;
534 for (int level
= mt
->first_level
; level
<= mt
->last_level
; ++level
) {
535 for (int layer
= 0; layer
< mt
->level
[level
].depth
; ++layer
) {
536 head
->next
= malloc(sizeof(*head
->next
));
537 head
->next
->prev
= head
;
538 head
->next
->next
= NULL
;
543 head
->need
= INTEL_NEED_HIZ_RESOLVE
;
551 intel_miptree_slice_set_needs_hiz_resolve(struct intel_mipmap_tree
*mt
,
555 intel_miptree_check_level_layer(mt
, level
, layer
);
560 intel_resolve_map_set(&mt
->hiz_map
,
561 level
, layer
, INTEL_NEED_HIZ_RESOLVE
);
566 intel_miptree_slice_set_needs_depth_resolve(struct intel_mipmap_tree
*mt
,
570 intel_miptree_check_level_layer(mt
, level
, layer
);
575 intel_resolve_map_set(&mt
->hiz_map
,
576 level
, layer
, INTEL_NEED_DEPTH_RESOLVE
);
579 typedef void (*resolve_func_t
)(struct intel_context
*intel
,
580 struct intel_mipmap_tree
*mt
,
585 intel_miptree_slice_resolve(struct intel_context
*intel
,
586 struct intel_mipmap_tree
*mt
,
589 enum intel_need_resolve need
,
592 intel_miptree_check_level_layer(mt
, level
, layer
);
594 struct intel_resolve_map
*item
=
595 intel_resolve_map_get(&mt
->hiz_map
, level
, layer
);
597 if (!item
|| item
->need
!= need
)
600 func(intel
, mt
, level
, layer
);
601 intel_resolve_map_remove(item
);
606 intel_miptree_slice_resolve_hiz(struct intel_context
*intel
,
607 struct intel_mipmap_tree
*mt
,
611 return intel_miptree_slice_resolve(intel
, mt
, level
, layer
,
612 INTEL_NEED_HIZ_RESOLVE
,
613 intel
->vtbl
.resolve_hiz_slice
);
617 intel_miptree_slice_resolve_depth(struct intel_context
*intel
,
618 struct intel_mipmap_tree
*mt
,
622 return intel_miptree_slice_resolve(intel
, mt
, level
, layer
,
623 INTEL_NEED_DEPTH_RESOLVE
,
624 intel
->vtbl
.resolve_depth_slice
);
628 intel_miptree_all_slices_resolve(struct intel_context
*intel
,
629 struct intel_mipmap_tree
*mt
,
630 enum intel_need_resolve need
,
633 bool did_resolve
= false;
634 struct intel_resolve_map
*i
;
636 for (i
= mt
->hiz_map
.next
; i
; i
= i
->next
) {
639 func(intel
, mt
, i
->level
, i
->layer
);
640 intel_resolve_map_remove(i
);
648 intel_miptree_all_slices_resolve_hiz(struct intel_context
*intel
,
649 struct intel_mipmap_tree
*mt
)
651 return intel_miptree_all_slices_resolve(intel
, mt
,
652 INTEL_NEED_HIZ_RESOLVE
,
653 intel
->vtbl
.resolve_hiz_slice
);
657 intel_miptree_all_slices_resolve_depth(struct intel_context
*intel
,
658 struct intel_mipmap_tree
*mt
)
660 return intel_miptree_all_slices_resolve(intel
, mt
,
661 INTEL_NEED_DEPTH_RESOLVE
,
662 intel
->vtbl
.resolve_depth_slice
);
666 intel_miptree_map_gtt(struct intel_context
*intel
,
667 struct intel_mipmap_tree
*mt
,
668 struct intel_miptree_map
*map
,
669 unsigned int level
, unsigned int slice
)
673 unsigned int image_x
, image_y
;
677 /* For compressed formats, the stride is the number of bytes per
678 * row of blocks. intel_miptree_get_image_offset() already does
681 _mesa_get_format_block_size(mt
->format
, &bw
, &bh
);
685 base
= intel_region_map(intel
, mt
->region
, map
->mode
);
686 /* Note that in the case of cube maps, the caller must have passed the slice
687 * number referencing the face.
689 intel_miptree_get_image_offset(mt
, level
, 0, slice
, &image_x
, &image_y
);
693 map
->stride
= mt
->region
->pitch
* mt
->cpp
;
694 map
->ptr
= base
+ y
* map
->stride
+ x
* mt
->cpp
;
696 DBG("%s: %d,%d %dx%d from mt %p (%s) %d,%d = %p/%d\n", __FUNCTION__
,
697 map
->x
, map
->y
, map
->w
, map
->h
,
698 mt
, _mesa_get_format_name(mt
->format
),
699 x
, y
, map
->ptr
, map
->stride
);
703 intel_miptree_unmap_gtt(struct intel_context
*intel
,
704 struct intel_mipmap_tree
*mt
,
705 struct intel_miptree_map
*map
,
709 intel_region_unmap(intel
, mt
->region
);
713 intel_miptree_map_blit(struct intel_context
*intel
,
714 struct intel_mipmap_tree
*mt
,
715 struct intel_miptree_map
*map
,
716 unsigned int level
, unsigned int slice
)
718 unsigned int image_x
, image_y
;
723 /* The blitter requires the pitch to be aligned to 4. */
724 map
->stride
= ALIGN(map
->w
* mt
->region
->cpp
, 4);
726 map
->bo
= drm_intel_bo_alloc(intel
->bufmgr
, "intel_miptree_map_blit() temp",
727 map
->stride
* map
->h
, 4096);
729 fprintf(stderr
, "Failed to allocate blit temporary\n");
733 intel_miptree_get_image_offset(mt
, level
, 0, slice
, &image_x
, &image_y
);
737 if (!intelEmitCopyBlit(intel
,
739 mt
->region
->pitch
, mt
->region
->bo
,
740 0, mt
->region
->tiling
,
741 map
->stride
/ mt
->region
->cpp
, map
->bo
,
747 fprintf(stderr
, "Failed to blit\n");
751 intel_batchbuffer_flush(intel
);
752 ret
= drm_intel_bo_map(map
->bo
, (map
->mode
& GL_MAP_WRITE_BIT
) != 0);
754 fprintf(stderr
, "Failed to map blit temporary\n");
758 map
->ptr
= map
->bo
->virtual;
760 DBG("%s: %d,%d %dx%d from mt %p (%s) %d,%d = %p/%d\n", __FUNCTION__
,
761 map
->x
, map
->y
, map
->w
, map
->h
,
762 mt
, _mesa_get_format_name(mt
->format
),
763 x
, y
, map
->ptr
, map
->stride
);
768 drm_intel_bo_unreference(map
->bo
);
774 intel_miptree_unmap_blit(struct intel_context
*intel
,
775 struct intel_mipmap_tree
*mt
,
776 struct intel_miptree_map
*map
,
780 assert(!(map
->mode
& GL_MAP_WRITE_BIT
));
782 drm_intel_bo_unmap(map
->bo
);
783 drm_intel_bo_unreference(map
->bo
);
787 intel_miptree_map_s8(struct intel_context
*intel
,
788 struct intel_mipmap_tree
*mt
,
789 struct intel_miptree_map
*map
,
790 unsigned int level
, unsigned int slice
)
792 map
->stride
= map
->w
;
793 map
->buffer
= map
->ptr
= malloc(map
->stride
* map
->h
);
797 /* One of either READ_BIT or WRITE_BIT or both is set. READ_BIT implies no
798 * INVALIDATE_RANGE_BIT. WRITE_BIT needs the original values read in unless
799 * invalidate is set, since we'll be writing the whole rectangle from our
800 * temporary buffer back out.
802 if (!(map
->mode
& GL_MAP_INVALIDATE_RANGE_BIT
)) {
803 uint8_t *untiled_s8_map
= map
->ptr
;
804 uint8_t *tiled_s8_map
= intel_region_map(intel
, mt
->region
,
806 unsigned int image_x
, image_y
;
808 intel_miptree_get_image_offset(mt
, level
, 0, slice
, &image_x
, &image_y
);
810 for (uint32_t y
= 0; y
< map
->h
; y
++) {
811 for (uint32_t x
= 0; x
< map
->w
; x
++) {
812 ptrdiff_t offset
= intel_offset_S8(mt
->region
->pitch
,
813 x
+ image_x
+ map
->x
,
814 y
+ image_y
+ map
->y
);
815 untiled_s8_map
[y
* map
->w
+ x
] = tiled_s8_map
[offset
];
819 intel_region_unmap(intel
, mt
->region
);
821 DBG("%s: %d,%d %dx%d from mt %p %d,%d = %p/%d\n", __FUNCTION__
,
822 map
->x
, map
->y
, map
->w
, map
->h
,
823 mt
, map
->x
+ image_x
, map
->y
+ image_y
, map
->ptr
, map
->stride
);
825 DBG("%s: %d,%d %dx%d from mt %p = %p/%d\n", __FUNCTION__
,
826 map
->x
, map
->y
, map
->w
, map
->h
,
827 mt
, map
->ptr
, map
->stride
);
832 intel_miptree_unmap_s8(struct intel_context
*intel
,
833 struct intel_mipmap_tree
*mt
,
834 struct intel_miptree_map
*map
,
838 if (map
->mode
& GL_MAP_WRITE_BIT
) {
839 unsigned int image_x
, image_y
;
840 uint8_t *untiled_s8_map
= map
->ptr
;
841 uint8_t *tiled_s8_map
= intel_region_map(intel
, mt
->region
, map
->mode
);
843 intel_miptree_get_image_offset(mt
, level
, 0, slice
, &image_x
, &image_y
);
845 for (uint32_t y
= 0; y
< map
->h
; y
++) {
846 for (uint32_t x
= 0; x
< map
->w
; x
++) {
847 ptrdiff_t offset
= intel_offset_S8(mt
->region
->pitch
,
850 tiled_s8_map
[offset
] = untiled_s8_map
[y
* map
->w
+ x
];
854 intel_region_unmap(intel
, mt
->region
);
861 * Mapping function for packed depth/stencil miptrees backed by real separate
862 * miptrees for depth and stencil.
864 * On gen7, and to support HiZ pre-gen7, we have to have the stencil buffer
865 * separate from the depth buffer. Yet at the GL API level, we have to expose
866 * packed depth/stencil textures and FBO attachments, and Mesa core expects to
867 * be able to map that memory for texture storage and glReadPixels-type
868 * operations. We give Mesa core that access by mallocing a temporary and
869 * copying the data between the actual backing store and the temporary.
872 intel_miptree_map_depthstencil(struct intel_context
*intel
,
873 struct intel_mipmap_tree
*mt
,
874 struct intel_miptree_map
*map
,
875 unsigned int level
, unsigned int slice
)
877 struct intel_mipmap_tree
*z_mt
= mt
;
878 struct intel_mipmap_tree
*s_mt
= mt
->stencil_mt
;
879 bool map_z32f_x24s8
= mt
->format
== MESA_FORMAT_Z32_FLOAT
;
880 int packed_bpp
= map_z32f_x24s8
? 8 : 4;
882 map
->stride
= map
->w
* packed_bpp
;
883 map
->buffer
= map
->ptr
= malloc(map
->stride
* map
->h
);
887 /* One of either READ_BIT or WRITE_BIT or both is set. READ_BIT implies no
888 * INVALIDATE_RANGE_BIT. WRITE_BIT needs the original values read in unless
889 * invalidate is set, since we'll be writing the whole rectangle from our
890 * temporary buffer back out.
892 if (!(map
->mode
& GL_MAP_INVALIDATE_RANGE_BIT
)) {
893 uint32_t *packed_map
= map
->ptr
;
894 uint8_t *s_map
= intel_region_map(intel
, s_mt
->region
, GL_MAP_READ_BIT
);
895 uint32_t *z_map
= intel_region_map(intel
, z_mt
->region
, GL_MAP_READ_BIT
);
896 unsigned int s_image_x
, s_image_y
;
897 unsigned int z_image_x
, z_image_y
;
899 intel_miptree_get_image_offset(s_mt
, level
, 0, slice
,
900 &s_image_x
, &s_image_y
);
901 intel_miptree_get_image_offset(z_mt
, level
, 0, slice
,
902 &z_image_x
, &z_image_y
);
904 for (uint32_t y
= 0; y
< map
->h
; y
++) {
905 for (uint32_t x
= 0; x
< map
->w
; x
++) {
906 int map_x
= map
->x
+ x
, map_y
= map
->y
+ y
;
907 ptrdiff_t s_offset
= intel_offset_S8(s_mt
->region
->pitch
,
910 ptrdiff_t z_offset
= ((map_y
+ z_image_y
) * z_mt
->region
->pitch
+
911 (map_x
+ z_image_x
));
912 uint8_t s
= s_map
[s_offset
];
913 uint32_t z
= z_map
[z_offset
];
915 if (map_z32f_x24s8
) {
916 packed_map
[(y
* map
->w
+ x
) * 2 + 0] = z
;
917 packed_map
[(y
* map
->w
+ x
) * 2 + 1] = s
;
919 packed_map
[y
* map
->w
+ x
] = (s
<< 24) | (z
& 0x00ffffff);
924 intel_region_unmap(intel
, s_mt
->region
);
925 intel_region_unmap(intel
, z_mt
->region
);
927 DBG("%s: %d,%d %dx%d from z mt %p %d,%d, s mt %p %d,%d = %p/%d\n",
929 map
->x
, map
->y
, map
->w
, map
->h
,
930 z_mt
, map
->x
+ z_image_x
, map
->y
+ z_image_y
,
931 s_mt
, map
->x
+ s_image_x
, map
->y
+ s_image_y
,
932 map
->ptr
, map
->stride
);
934 DBG("%s: %d,%d %dx%d from mt %p = %p/%d\n", __FUNCTION__
,
935 map
->x
, map
->y
, map
->w
, map
->h
,
936 mt
, map
->ptr
, map
->stride
);
941 intel_miptree_unmap_depthstencil(struct intel_context
*intel
,
942 struct intel_mipmap_tree
*mt
,
943 struct intel_miptree_map
*map
,
947 struct intel_mipmap_tree
*z_mt
= mt
;
948 struct intel_mipmap_tree
*s_mt
= mt
->stencil_mt
;
949 bool map_z32f_x24s8
= mt
->format
== MESA_FORMAT_Z32_FLOAT
;
951 if (map
->mode
& GL_MAP_WRITE_BIT
) {
952 uint32_t *packed_map
= map
->ptr
;
953 uint8_t *s_map
= intel_region_map(intel
, s_mt
->region
, map
->mode
);
954 uint32_t *z_map
= intel_region_map(intel
, z_mt
->region
, map
->mode
);
955 unsigned int s_image_x
, s_image_y
;
956 unsigned int z_image_x
, z_image_y
;
958 intel_miptree_get_image_offset(s_mt
, level
, 0, slice
,
959 &s_image_x
, &s_image_y
);
960 intel_miptree_get_image_offset(z_mt
, level
, 0, slice
,
961 &z_image_x
, &z_image_y
);
963 for (uint32_t y
= 0; y
< map
->h
; y
++) {
964 for (uint32_t x
= 0; x
< map
->w
; x
++) {
965 ptrdiff_t s_offset
= intel_offset_S8(s_mt
->region
->pitch
,
966 x
+ s_image_x
+ map
->x
,
967 y
+ s_image_y
+ map
->y
);
968 ptrdiff_t z_offset
= ((y
+ z_image_y
) * z_mt
->region
->pitch
+
971 if (map_z32f_x24s8
) {
972 z_map
[z_offset
] = packed_map
[(y
* map
->w
+ x
) * 2 + 0];
973 s_map
[s_offset
] = packed_map
[(y
* map
->w
+ x
) * 2 + 1];
975 uint32_t packed
= packed_map
[y
* map
->w
+ x
];
976 s_map
[s_offset
] = packed
>> 24;
977 z_map
[z_offset
] = packed
;
982 intel_region_unmap(intel
, s_mt
->region
);
983 intel_region_unmap(intel
, z_mt
->region
);
985 DBG("%s: %d,%d %dx%d from z mt %p (%s) %d,%d, s mt %p %d,%d = %p/%d\n",
987 map
->x
, map
->y
, map
->w
, map
->h
,
988 z_mt
, _mesa_get_format_name(z_mt
->format
),
989 map
->x
+ z_image_x
, map
->y
+ z_image_y
,
990 s_mt
, map
->x
+ s_image_x
, map
->y
+ s_image_y
,
991 map
->ptr
, map
->stride
);
998 intel_miptree_map(struct intel_context
*intel
,
999 struct intel_mipmap_tree
*mt
,
1010 struct intel_miptree_map
*map
;
1012 map
= calloc(1, sizeof(struct intel_miptree_map
));
1019 assert(!mt
->level
[level
].slice
[slice
].map
);
1020 mt
->level
[level
].slice
[slice
].map
= map
;
1027 intel_miptree_slice_resolve_depth(intel
, mt
, level
, slice
);
1028 if (map
->mode
& GL_MAP_WRITE_BIT
) {
1029 intel_miptree_slice_set_needs_hiz_resolve(mt
, level
, slice
);
1032 if (mt
->format
== MESA_FORMAT_S8
) {
1033 intel_miptree_map_s8(intel
, mt
, map
, level
, slice
);
1034 } else if (mt
->stencil_mt
) {
1035 intel_miptree_map_depthstencil(intel
, mt
, map
, level
, slice
);
1036 } else if (intel
->gen
>= 6 &&
1037 !(mode
& GL_MAP_WRITE_BIT
) &&
1039 mt
->region
->tiling
== I915_TILING_X
) {
1040 intel_miptree_map_blit(intel
, mt
, map
, level
, slice
);
1042 intel_miptree_map_gtt(intel
, mt
, map
, level
, slice
);
1045 *out_ptr
= map
->ptr
;
1046 *out_stride
= map
->stride
;
1050 intel_miptree_unmap(struct intel_context
*intel
,
1051 struct intel_mipmap_tree
*mt
,
1055 struct intel_miptree_map
*map
= mt
->level
[level
].slice
[slice
].map
;
1060 DBG("%s: mt %p (%s) level %d slice %d\n", __FUNCTION__
,
1061 mt
, _mesa_get_format_name(mt
->format
), level
, slice
);
1063 if (mt
->format
== MESA_FORMAT_S8
) {
1064 intel_miptree_unmap_s8(intel
, mt
, map
, level
, slice
);
1065 } else if (mt
->stencil_mt
) {
1066 intel_miptree_unmap_depthstencil(intel
, mt
, map
, level
, slice
);
1067 } else if (map
->bo
) {
1068 intel_miptree_unmap_blit(intel
, mt
, map
, level
, slice
);
1070 intel_miptree_unmap_gtt(intel
, mt
, map
, level
, slice
);
1073 mt
->level
[level
].slice
[slice
].map
= NULL
;