Merge branch 'hiz' of ssh://people.freedesktop.org/~chadversary/mesa
[mesa.git] / src / mesa / drivers / dri / intel / intel_mipmap_tree.c
1 /**************************************************************************
2 *
3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include "intel_batchbuffer.h"
29 #include "intel_context.h"
30 #include "intel_mipmap_tree.h"
31 #include "intel_regions.h"
32 #include "intel_resolve_map.h"
33 #include "intel_span.h"
34 #include "intel_tex_layout.h"
35 #include "intel_tex.h"
36 #include "intel_blit.h"
37
38 #include "main/enums.h"
39 #include "main/formats.h"
40 #include "main/image.h"
41 #include "main/teximage.h"
42
43 #define FILE_DEBUG_FLAG DEBUG_MIPTREE
44
45 static GLenum
46 target_to_target(GLenum target)
47 {
48 switch (target) {
49 case GL_TEXTURE_CUBE_MAP_POSITIVE_X_ARB:
50 case GL_TEXTURE_CUBE_MAP_NEGATIVE_X_ARB:
51 case GL_TEXTURE_CUBE_MAP_POSITIVE_Y_ARB:
52 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y_ARB:
53 case GL_TEXTURE_CUBE_MAP_POSITIVE_Z_ARB:
54 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z_ARB:
55 return GL_TEXTURE_CUBE_MAP_ARB;
56 default:
57 return target;
58 }
59 }
60
61 static struct intel_mipmap_tree *
62 intel_miptree_create_internal(struct intel_context *intel,
63 GLenum target,
64 gl_format format,
65 GLuint first_level,
66 GLuint last_level,
67 GLuint width0,
68 GLuint height0,
69 GLuint depth0)
70 {
71 struct intel_mipmap_tree *mt = calloc(sizeof(*mt), 1);
72 int compress_byte = 0;
73
74 DBG("%s target %s format %s level %d..%d <-- %p\n", __FUNCTION__,
75 _mesa_lookup_enum_by_nr(target),
76 _mesa_get_format_name(format),
77 first_level, last_level, mt);
78
79 if (_mesa_is_format_compressed(format))
80 compress_byte = intel_compressed_num_bytes(format);
81
82 mt->target = target_to_target(target);
83 mt->format = format;
84 mt->first_level = first_level;
85 mt->last_level = last_level;
86 mt->width0 = width0;
87 mt->height0 = height0;
88 mt->cpp = compress_byte ? compress_byte : _mesa_get_format_bytes(mt->format);
89 mt->compressed = compress_byte ? 1 : 0;
90 mt->refcount = 1;
91
92 intel_get_texture_alignment_unit(intel, format,
93 &mt->align_w, &mt->align_h);
94
95 if (target == GL_TEXTURE_CUBE_MAP) {
96 assert(depth0 == 1);
97 mt->depth0 = 6;
98 } else {
99 mt->depth0 = depth0;
100 }
101
102 if (format == MESA_FORMAT_S8) {
103 /* The stencil buffer has quirky pitch requirements. From Vol 2a,
104 * 11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface Pitch":
105 * The pitch must be set to 2x the value computed based on width, as
106 * the stencil buffer is stored with two rows interleaved.
107 */
108 assert(intel->has_separate_stencil);
109 mt->cpp = 2;
110 }
111
112 #ifdef I915
113 (void) intel;
114 if (intel->is_945)
115 i945_miptree_layout(mt);
116 else
117 i915_miptree_layout(mt);
118 #else
119 brw_miptree_layout(intel, mt);
120 #endif
121
122 if (intel->has_separate_stencil &&
123 _mesa_is_depthstencil_format(_mesa_get_format_base_format(format))) {
124 mt->stencil_mt = intel_miptree_create(intel,
125 mt->target,
126 MESA_FORMAT_S8,
127 mt->first_level,
128 mt->last_level,
129 mt->width0,
130 mt->height0,
131 mt->depth0,
132 true);
133 if (!mt->stencil_mt) {
134 intel_miptree_release(&mt);
135 return NULL;
136 }
137 }
138
139 return mt;
140 }
141
142
143 struct intel_mipmap_tree *
144 intel_miptree_create(struct intel_context *intel,
145 GLenum target,
146 gl_format format,
147 GLuint first_level,
148 GLuint last_level,
149 GLuint width0,
150 GLuint height0,
151 GLuint depth0,
152 bool expect_accelerated_upload)
153 {
154 struct intel_mipmap_tree *mt;
155 uint32_t tiling = I915_TILING_NONE;
156 GLenum base_format = _mesa_get_format_base_format(format);
157
158 if (intel->use_texture_tiling && !_mesa_is_format_compressed(format)) {
159 if (intel->gen >= 4 &&
160 (base_format == GL_DEPTH_COMPONENT ||
161 base_format == GL_DEPTH_STENCIL_EXT))
162 tiling = I915_TILING_Y;
163 else if (format == MESA_FORMAT_S8)
164 tiling = I915_TILING_NONE;
165 else if (width0 >= 64)
166 tiling = I915_TILING_X;
167 }
168
169 mt = intel_miptree_create_internal(intel, target, format,
170 first_level, last_level, width0,
171 height0, depth0);
172 /*
173 * pitch == 0 || height == 0 indicates the null texture
174 */
175 if (!mt || !mt->total_width || !mt->total_height) {
176 free(mt);
177 return NULL;
178 }
179
180 mt->region = intel_region_alloc(intel->intelScreen,
181 tiling,
182 mt->cpp,
183 mt->total_width,
184 mt->total_height,
185 expect_accelerated_upload);
186
187 if (!mt->region) {
188 free(mt);
189 return NULL;
190 }
191
192 return mt;
193 }
194
195
196 struct intel_mipmap_tree *
197 intel_miptree_create_for_region(struct intel_context *intel,
198 GLenum target,
199 gl_format format,
200 struct intel_region *region)
201 {
202 struct intel_mipmap_tree *mt;
203
204 mt = intel_miptree_create_internal(intel, target, format,
205 0, 0,
206 region->width, region->height, 1);
207 if (!mt)
208 return mt;
209
210 intel_region_reference(&mt->region, region);
211
212 return mt;
213 }
214
215 struct intel_mipmap_tree*
216 intel_miptree_create_for_renderbuffer(struct intel_context *intel,
217 gl_format format,
218 uint32_t tiling,
219 uint32_t cpp,
220 uint32_t width,
221 uint32_t height)
222 {
223 struct intel_region *region;
224 struct intel_mipmap_tree *mt;
225
226 region = intel_region_alloc(intel->intelScreen,
227 tiling, cpp, width, height, true);
228 if (!region)
229 return NULL;
230
231 mt = intel_miptree_create_for_region(intel, GL_TEXTURE_2D, format, region);
232 intel_region_release(&region);
233 return mt;
234 }
235
236 void
237 intel_miptree_reference(struct intel_mipmap_tree **dst,
238 struct intel_mipmap_tree *src)
239 {
240 if (*dst == src)
241 return;
242
243 intel_miptree_release(dst);
244
245 if (src) {
246 src->refcount++;
247 DBG("%s %p refcount now %d\n", __FUNCTION__, src, src->refcount);
248 }
249
250 *dst = src;
251 }
252
253
254 void
255 intel_miptree_release(struct intel_mipmap_tree **mt)
256 {
257 if (!*mt)
258 return;
259
260 DBG("%s %p refcount will be %d\n", __FUNCTION__, *mt, (*mt)->refcount - 1);
261 if (--(*mt)->refcount <= 0) {
262 GLuint i;
263
264 DBG("%s deleting %p\n", __FUNCTION__, *mt);
265
266 intel_region_release(&((*mt)->region));
267 intel_miptree_release(&(*mt)->stencil_mt);
268 intel_miptree_release(&(*mt)->hiz_mt);
269 intel_resolve_map_clear(&(*mt)->hiz_map);
270
271 for (i = 0; i < MAX_TEXTURE_LEVELS; i++) {
272 free((*mt)->level[i].slice);
273 }
274
275 free(*mt);
276 }
277 *mt = NULL;
278 }
279
280 void
281 intel_miptree_get_dimensions_for_image(struct gl_texture_image *image,
282 int *width, int *height, int *depth)
283 {
284 switch (image->TexObject->Target) {
285 case GL_TEXTURE_1D_ARRAY:
286 *width = image->Width;
287 *height = 1;
288 *depth = image->Height;
289 break;
290 default:
291 *width = image->Width;
292 *height = image->Height;
293 *depth = image->Depth;
294 break;
295 }
296 }
297
298 /**
299 * Can the image be pulled into a unified mipmap tree? This mirrors
300 * the completeness test in a lot of ways.
301 *
302 * Not sure whether I want to pass gl_texture_image here.
303 */
304 bool
305 intel_miptree_match_image(struct intel_mipmap_tree *mt,
306 struct gl_texture_image *image)
307 {
308 struct intel_texture_image *intelImage = intel_texture_image(image);
309 GLuint level = intelImage->base.Base.Level;
310 int width, height, depth;
311
312 if (image->TexFormat != mt->format)
313 return false;
314
315 intel_miptree_get_dimensions_for_image(image, &width, &height, &depth);
316
317 /* Test image dimensions against the base level image adjusted for
318 * minification. This will also catch images not present in the
319 * tree, changed targets, etc.
320 */
321 if (width != mt->level[level].width ||
322 height != mt->level[level].height ||
323 depth != mt->level[level].depth)
324 return false;
325
326 return true;
327 }
328
329
330 void
331 intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
332 GLuint level,
333 GLuint x, GLuint y,
334 GLuint w, GLuint h, GLuint d)
335 {
336 mt->level[level].width = w;
337 mt->level[level].height = h;
338 mt->level[level].depth = d;
339 mt->level[level].level_x = x;
340 mt->level[level].level_y = y;
341
342 DBG("%s level %d size: %d,%d,%d offset %d,%d\n", __FUNCTION__,
343 level, w, h, d, x, y);
344
345 assert(mt->level[level].slice == NULL);
346
347 mt->level[level].slice = malloc(d * sizeof(*mt->level[0].slice));
348 mt->level[level].slice[0].x_offset = mt->level[level].level_x;
349 mt->level[level].slice[0].y_offset = mt->level[level].level_y;
350 }
351
352
353 void
354 intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
355 GLuint level, GLuint img,
356 GLuint x, GLuint y)
357 {
358 if (img == 0 && level == 0)
359 assert(x == 0 && y == 0);
360
361 assert(img < mt->level[level].depth);
362
363 mt->level[level].slice[img].x_offset = mt->level[level].level_x + x;
364 mt->level[level].slice[img].y_offset = mt->level[level].level_y + y;
365
366 DBG("%s level %d img %d pos %d,%d\n",
367 __FUNCTION__, level, img,
368 mt->level[level].slice[img].x_offset,
369 mt->level[level].slice[img].y_offset);
370 }
371
372
373 /**
374 * For cube map textures, either the \c face parameter can be used, of course,
375 * or the cube face can be interpreted as a depth layer and the \c layer
376 * parameter used.
377 */
378 void
379 intel_miptree_get_image_offset(struct intel_mipmap_tree *mt,
380 GLuint level, GLuint face, GLuint layer,
381 GLuint *x, GLuint *y)
382 {
383 int slice;
384
385 if (face > 0) {
386 assert(mt->target == GL_TEXTURE_CUBE_MAP);
387 assert(face < 6);
388 assert(layer == 0);
389 slice = face;
390 } else {
391 /* This branch may be taken even if the texture target is a cube map. In
392 * that case, the caller chose to interpret each cube face as a layer.
393 */
394 assert(face == 0);
395 slice = layer;
396 }
397
398 *x = mt->level[level].slice[slice].x_offset;
399 *y = mt->level[level].slice[slice].y_offset;
400 }
401
402 static void
403 intel_miptree_copy_slice(struct intel_context *intel,
404 struct intel_mipmap_tree *dst_mt,
405 struct intel_mipmap_tree *src_mt,
406 int level,
407 int face,
408 int depth)
409
410 {
411 gl_format format = src_mt->format;
412 uint32_t width = src_mt->level[level].width;
413 uint32_t height = src_mt->level[level].height;
414
415 assert(depth < src_mt->level[level].depth);
416
417 if (dst_mt->compressed) {
418 height = ALIGN(height, dst_mt->align_h) / dst_mt->align_h;
419 width = ALIGN(width, dst_mt->align_w);
420 }
421
422 uint32_t dst_x, dst_y, src_x, src_y;
423 intel_miptree_get_image_offset(dst_mt, level, face, depth,
424 &dst_x, &dst_y);
425 intel_miptree_get_image_offset(src_mt, level, face, depth,
426 &src_x, &src_y);
427
428 DBG("validate blit mt %p %d,%d/%d -> mt %p %d,%d/%d (%dx%d)\n",
429 src_mt, src_x, src_y, src_mt->region->pitch * src_mt->region->cpp,
430 dst_mt, dst_x, dst_y, dst_mt->region->pitch * dst_mt->region->cpp,
431 width, height);
432
433 if (!intelEmitCopyBlit(intel,
434 dst_mt->region->cpp,
435 src_mt->region->pitch, src_mt->region->bo,
436 0, src_mt->region->tiling,
437 dst_mt->region->pitch, dst_mt->region->bo,
438 0, dst_mt->region->tiling,
439 src_x, src_y,
440 dst_x, dst_y,
441 width, height,
442 GL_COPY)) {
443
444 fallback_debug("miptree validate blit for %s failed\n",
445 _mesa_get_format_name(format));
446 void *dst = intel_region_map(intel, dst_mt->region, GL_MAP_WRITE_BIT);
447 void *src = intel_region_map(intel, src_mt->region, GL_MAP_READ_BIT);
448
449 _mesa_copy_rect(dst,
450 dst_mt->cpp,
451 dst_mt->region->pitch,
452 dst_x, dst_y,
453 width, height,
454 src, src_mt->region->pitch,
455 src_x, src_y);
456
457 intel_region_unmap(intel, dst_mt->region);
458 intel_region_unmap(intel, src_mt->region);
459 }
460
461 if (src_mt->stencil_mt) {
462 intel_miptree_copy_slice(intel,
463 dst_mt->stencil_mt, src_mt->stencil_mt,
464 level, face, depth);
465 }
466 }
467
468 /**
469 * Copies the image's current data to the given miptree, and associates that
470 * miptree with the image.
471 */
472 void
473 intel_miptree_copy_teximage(struct intel_context *intel,
474 struct intel_texture_image *intelImage,
475 struct intel_mipmap_tree *dst_mt)
476 {
477 struct intel_mipmap_tree *src_mt = intelImage->mt;
478 int level = intelImage->base.Base.Level;
479 int face = intelImage->base.Base.Face;
480 GLuint depth = intelImage->base.Base.Depth;
481
482 for (int slice = 0; slice < depth; slice++) {
483 intel_miptree_copy_slice(intel, dst_mt, src_mt, level, face, slice);
484 }
485
486 intel_miptree_reference(&intelImage->mt, dst_mt);
487 }
488
489 /**
490 * \param scatter Scatter if true. Gather if false.
491 *
492 * \see intel_miptree_s8z24_scatter()
493 * \see intel_miptree_s8z24_gather()
494 */
495 static void
496 intel_miptree_s8z24_scattergather(struct intel_context *intel,
497 struct intel_mipmap_tree *mt,
498 uint32_t level,
499 uint32_t layer,
500 bool scatter)
501 {
502 /* Check function inputs. */
503 assert(level >= mt->first_level);
504 assert(level <= mt->last_level);
505 assert(layer < mt->level[level].depth);
506
507 /* Label everything and its bit layout, just to make the code easier to
508 * read.
509 */
510 struct intel_mipmap_tree *s8_mt = mt->stencil_mt;
511 struct intel_mipmap_level *s8_level = &s8_mt->level[level];
512 struct intel_mipmap_slice *s8_slice = &s8_mt->level[level].slice[layer];
513
514 struct intel_mipmap_tree *s8z24_mt = mt;
515 struct intel_mipmap_level *s8z24_level = &s8z24_mt->level[level];
516 struct intel_mipmap_slice *s8z24_slice = &s8z24_mt->level[level].slice[layer];
517
518 /* Check that both miptree levels have the same dimensions. */
519 assert(s8_level->width == s8z24_level->width);
520 assert(s8_level->height == s8z24_level->height);
521 assert(s8_level->depth == s8z24_level->depth);
522
523 /* Map the buffers. */
524 if (drm_intel_bo_references(intel->batch.bo, s8_mt->region->bo) ||
525 drm_intel_bo_references(intel->batch.bo, s8z24_mt->region->bo)) {
526 intel_batchbuffer_flush(intel);
527 }
528 drm_intel_gem_bo_map_gtt(s8_mt->region->bo);
529 drm_intel_gem_bo_map_gtt(s8z24_mt->region->bo);
530
531 /* Define the invariant values outside the for loop, because I don't trust
532 * GCC to do it for us.
533 */
534 uint8_t *s8_map = s8_mt->region->bo->virtual
535 + s8_slice->x_offset
536 + s8_slice->y_offset;
537
538 uint8_t *s8z24_map = s8z24_mt->region->bo->virtual
539 + s8z24_slice->x_offset
540 + s8z24_slice->y_offset;
541
542 ptrdiff_t s8z24_stride = s8z24_mt->region->pitch * s8z24_mt->region->cpp;
543
544 uint32_t w = s8_level->width;
545 uint32_t h = s8_level->height;
546
547 for (uint32_t y = 0; y < h; ++y) {
548 for (uint32_t x = 0; x < w; ++x) {
549 ptrdiff_t s8_offset = intel_offset_S8(s8_mt->region->pitch, x, y);
550 ptrdiff_t s8z24_offset = y * s8z24_stride
551 + x * 4
552 + 3;
553 if (scatter) {
554 s8_map[s8_offset] = s8z24_map[s8z24_offset];
555 } else {
556 s8z24_map[s8z24_offset] = s8_map[s8_offset];
557 }
558 }
559 }
560
561 drm_intel_gem_bo_unmap_gtt(s8_mt->region->bo);
562 drm_intel_gem_bo_unmap_gtt(s8z24_mt->region->bo);
563 }
564
565 void
566 intel_miptree_s8z24_scatter(struct intel_context *intel,
567 struct intel_mipmap_tree *mt,
568 uint32_t level,
569 uint32_t layer)
570 {
571 intel_miptree_s8z24_scattergather(intel, mt, level, layer, true);
572 }
573
574 void
575 intel_miptree_s8z24_gather(struct intel_context *intel,
576 struct intel_mipmap_tree *mt,
577 uint32_t level,
578 uint32_t layer)
579 {
580 intel_miptree_s8z24_scattergather(intel, mt, level, layer, false);
581 }
582
583 bool
584 intel_miptree_alloc_hiz(struct intel_context *intel,
585 struct intel_mipmap_tree *mt)
586 {
587 assert(mt->hiz_mt == NULL);
588 mt->hiz_mt = intel_miptree_create(intel,
589 mt->target,
590 MESA_FORMAT_X8_Z24,
591 mt->first_level,
592 mt->last_level,
593 mt->width0,
594 mt->height0,
595 mt->depth0,
596 true);
597
598 if (!mt->hiz_mt)
599 return false;
600
601 /* Mark that all slices need a HiZ resolve. */
602 struct intel_resolve_map *head = &mt->hiz_map;
603 for (int level = mt->first_level; level <= mt->last_level; ++level) {
604 for (int layer = 0; layer < mt->level[level].depth; ++layer) {
605 head->next = malloc(sizeof(*head->next));
606 head->next->prev = head;
607 head->next->next = NULL;
608 head = head->next;
609
610 head->level = level;
611 head->layer = layer;
612 head->need = INTEL_NEED_HIZ_RESOLVE;
613 }
614 }
615
616 return true;
617 }
618
619 void
620 intel_miptree_slice_set_needs_hiz_resolve(struct intel_mipmap_tree *mt,
621 uint32_t level,
622 uint32_t layer)
623 {
624 intel_miptree_check_level_layer(mt, level, layer);
625
626 if (!mt->hiz_mt)
627 return;
628
629 intel_resolve_map_set(&mt->hiz_map,
630 level, layer, INTEL_NEED_HIZ_RESOLVE);
631 }
632
633
634 void
635 intel_miptree_slice_set_needs_depth_resolve(struct intel_mipmap_tree *mt,
636 uint32_t level,
637 uint32_t layer)
638 {
639 intel_miptree_check_level_layer(mt, level, layer);
640
641 if (!mt->hiz_mt)
642 return;
643
644 intel_resolve_map_set(&mt->hiz_map,
645 level, layer, INTEL_NEED_DEPTH_RESOLVE);
646 }
647
648 typedef void (*resolve_func_t)(struct intel_context *intel,
649 struct intel_mipmap_tree *mt,
650 uint32_t level,
651 uint32_t layer);
652
653 static bool
654 intel_miptree_slice_resolve(struct intel_context *intel,
655 struct intel_mipmap_tree *mt,
656 uint32_t level,
657 uint32_t layer,
658 enum intel_need_resolve need,
659 resolve_func_t func)
660 {
661 intel_miptree_check_level_layer(mt, level, layer);
662
663 struct intel_resolve_map *item =
664 intel_resolve_map_get(&mt->hiz_map, level, layer);
665
666 if (!item || item->need != need)
667 return false;
668
669 func(intel, mt, level, layer);
670 intel_resolve_map_remove(item);
671 return true;
672 }
673
674 bool
675 intel_miptree_slice_resolve_hiz(struct intel_context *intel,
676 struct intel_mipmap_tree *mt,
677 uint32_t level,
678 uint32_t layer)
679 {
680 return intel_miptree_slice_resolve(intel, mt, level, layer,
681 INTEL_NEED_HIZ_RESOLVE,
682 intel->vtbl.resolve_hiz_slice);
683 }
684
685 bool
686 intel_miptree_slice_resolve_depth(struct intel_context *intel,
687 struct intel_mipmap_tree *mt,
688 uint32_t level,
689 uint32_t layer)
690 {
691 return intel_miptree_slice_resolve(intel, mt, level, layer,
692 INTEL_NEED_DEPTH_RESOLVE,
693 intel->vtbl.resolve_depth_slice);
694 }
695
696 static bool
697 intel_miptree_all_slices_resolve(struct intel_context *intel,
698 struct intel_mipmap_tree *mt,
699 enum intel_need_resolve need,
700 resolve_func_t func)
701 {
702 bool did_resolve = false;
703 struct intel_resolve_map *i;
704
705 for (i = mt->hiz_map.next; i; i = i->next) {
706 if (i->need != need)
707 continue;
708 func(intel, mt, i->level, i->layer);
709 intel_resolve_map_remove(i);
710 did_resolve = true;
711 }
712
713 return did_resolve;
714 }
715
716 bool
717 intel_miptree_all_slices_resolve_hiz(struct intel_context *intel,
718 struct intel_mipmap_tree *mt)
719 {
720 return intel_miptree_all_slices_resolve(intel, mt,
721 INTEL_NEED_HIZ_RESOLVE,
722 intel->vtbl.resolve_hiz_slice);
723 }
724
725 bool
726 intel_miptree_all_slices_resolve_depth(struct intel_context *intel,
727 struct intel_mipmap_tree *mt)
728 {
729 return intel_miptree_all_slices_resolve(intel, mt,
730 INTEL_NEED_DEPTH_RESOLVE,
731 intel->vtbl.resolve_depth_slice);
732 }