src/mesa/drivers/dri/intel/intel_mipmap_tree.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #ifndef INTEL_MIPMAP_TREE_H
  29 #define INTEL_MIPMAP_TREE_H
  30
  31 #include <assert.h>
  32
  33 #include "intel_regions.h"
  34 #include "intel_resolve_map.h"
  35
  36 #ifdef __cplusplus
  37 extern "C" {
  38 #endif
  39
  40 /* A layer on top of the intel_regions code which adds:
  41  *
  42  * - Code to size and layout a region to hold a set of mipmaps.
  43  * - Query to determine if a new image fits in an existing tree.
  44  * - More refcounting
  45  *     - maybe able to remove refcounting from intel_region?
  46  * - ?
  47  *
  48  * The fixed mipmap layout of intel hardware where one offset
  49  * specifies the position of all images in a mipmap hierachy
  50  * complicates the implementation of GL texture image commands,
  51  * compared to hardware where each image is specified with an
  52  * independent offset.
  53  *
  54  * In an ideal world, each texture object would be associated with a
  55  * single bufmgr buffer or 2d intel_region, and all the images within
  56  * the texture object would slot into the tree as they arrive.  The
  57  * reality can be a little messier, as images can arrive from the user
  58  * with sizes that don't fit in the existing tree, or in an order
  59  * where the tree layout cannot be guessed immediately.
  60  *
  61  * This structure encodes an idealized mipmap tree.  The GL image
  62  * commands build these where possible, otherwise store the images in
  63  * temporary system buffers.
  64  */
  65
  66 struct intel_resolve_map;
  67 struct intel_texture_image;
  68
  69 struct intel_miptree_map {
  70    /** Bitfield of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT, GL_MAP_INVALIDATE_BIT */
  71    GLbitfield mode;
  72    /** Region of interest for the map. */
  73    int x, y, w, h;
  74    /** Possibly malloced temporary buffer for the mapping. */
  75    void *buffer;
  76    /** Possible pointer to a BO temporary for the mapping. */
  77    drm_intel_bo *bo;
  78    /** Pointer to the start of (map_x, map_y) returned by the mapping. */
  79    void *ptr;
  80    /** Stride of the mapping. */
  81    int stride;
  82
  83    /**
  84     * intel_mipmap_tree::singlesample_mt is temporary storage that persists
  85     * only for the duration of the map.
  86     */
  87    bool singlesample_mt_is_tmp;
  88 };
  89
  90 /**
  91  * Describes the location of each texture image within a texture region.
  92  */
  93 struct intel_mipmap_level
  94 {
  95    /** Offset to this miptree level, used in computing x_offset. */
  96    GLuint level_x;
  97    /** Offset to this miptree level, used in computing y_offset. */
  98    GLuint level_y;
  99    GLuint width;
 100    GLuint height;
 101
 102    /**
 103     * \brief Number of 2D slices in this miplevel.
 104     *
 105     * The exact semantics of depth varies according to the texture target:
 106     *    - For GL_TEXTURE_CUBE_MAP, depth is 6.
 107     *    - For GL_TEXTURE_2D_ARRAY, depth is the number of array slices. It is
 108     *      identical for all miplevels in the texture.
 109     *    - For GL_TEXTURE_3D, it is the texture's depth at this miplevel. Its
 110     *      value, like width and height, varies with miplevel.
 111     *    - For other texture types, depth is 1.
 112     */
 113    GLuint depth;
 114
 115    /**
 116     * \brief List of 2D images in this mipmap level.
 117     *
 118     * This may be a list of cube faces, array slices in 2D array texture, or
 119     * layers in a 3D texture. The list's length is \c depth.
 120     */
 121    struct intel_mipmap_slice {
 122       /**
 123        * \name Offset to slice
 124        * \{
 125        *
 126        * Hardware formats are so diverse that that there is no unified way to
 127        * compute the slice offsets, so we store them in this table.
 128        *
 129        * The (x, y) offset to slice \c s at level \c l relative the miptrees
 130        * base address is
 131        * \code
 132        *     x = mt->level[l].slice[s].x_offset
 133        *     y = mt->level[l].slice[s].y_offset
 134        */
 135       GLuint x_offset;
 136       GLuint y_offset;
 137       /** \} */
 138
 139       /**
 140        * Mapping information. Persistent for the duration of
 141        * intel_miptree_map/unmap on this slice.
 142        */
 143       struct intel_miptree_map *map;
 144    } *slice;
 145 };
 146
 147 /**
 148  * Enum for keeping track of the different MSAA layouts supported by Gen7.
 149  */
 150 enum intel_msaa_layout
 151 {
 152    /**
 153     * Ordinary surface with no MSAA.
 154     */
 155    INTEL_MSAA_LAYOUT_NONE,
 156
 157    /**
 158     * Interleaved Multisample Surface.  The additional samples are
 159     * accommodated by scaling up the width and the height of the surface so
 160     * that all the samples corresponding to a pixel are located at nearby
 161     * memory locations.
 162     */
 163    INTEL_MSAA_LAYOUT_IMS,
 164
 165    /**
 166     * Uncompressed Multisample Surface.  The surface is stored as a 2D array,
 167     * with array slice n containing all pixel data for sample n.
 168     */
 169    INTEL_MSAA_LAYOUT_UMS,
 170
 171    /**
 172     * Compressed Multisample Surface.  The surface is stored as in
 173     * INTEL_MSAA_LAYOUT_UMS, but there is an additional buffer called the MCS
 174     * (Multisample Control Surface) buffer.  Each pixel in the MCS buffer
 175     * indicates the mapping from sample number to array slice.  This allows
 176     * the common case (where all samples constituting a pixel have the same
 177     * color value) to be stored efficiently by just using a single array
 178     * slice.
 179     */
 180    INTEL_MSAA_LAYOUT_CMS,
 181 };
 182
 183 struct intel_mipmap_tree
 184 {
 185    /* Effectively the key:
 186     */
 187    GLenum target;
 188
 189    /**
 190     * Generally, this is just the same as the gl_texture_image->TexFormat or
 191     * gl_renderbuffer->Format.
 192     *
 193     * However, for textures and renderbuffers with packed depth/stencil formats
 194     * on hardware where we want or need to use separate stencil, there will be
 195     * two miptrees for storing the data.  If the depthstencil texture or rb is
 196     * MESA_FORMAT_Z32_FLOAT_X24S8, then mt->format will be
 197     * MESA_FORMAT_Z32_FLOAT, otherwise for MESA_FORMAT_S8_Z24 objects it will be
 198     * MESA_FORMAT_X8_Z24.
 199     *
 200     * For ETC1 textures, this is MESA_FORMAT_RGBX8888_REV if the hardware
 201     * lacks support for ETC1. See @ref wraps_etc1.
 202     */
 203    gl_format format;
 204
 205    /**
 206     * The X offset of each image in the miptree must be aligned to this. See
 207     * the "Alignment Unit Size" section of the BSpec.
 208     */
 209    unsigned int align_w;
 210    unsigned int align_h; /**< \see align_w */
 211
 212    GLuint first_level;
 213    GLuint last_level;
 214
 215    GLuint width0, height0, depth0; /**< Level zero image dimensions */
 216    GLuint cpp;
 217    GLuint num_samples;
 218    bool compressed;
 219
 220    /**
 221     * If num_samples > 0, then singlesample_width0 is the value that width0
 222     * would have if instead a singlesample miptree were created. Note that,
 223     * for non-interleaved msaa layouts, the two values are the same.
 224     *
 225     * If num_samples == 0, then singlesample_width0 is undefined.
 226     */
 227    uint32_t singlesample_width0;
 228
 229    /** \see singlesample_width0 */
 230    uint32_t singlesample_height0;
 231
 232    /**
 233     * For 1D array, 2D array, cube, and 2D multisampled surfaces on Gen7: true
 234     * if the surface only contains LOD 0, and hence no space is for LOD's
 235     * other than 0 in between array slices.
 236     *
 237     * Corresponds to the surface_array_spacing bit in gen7_surface_state.
 238     */
 239    bool array_spacing_lod0;
 240
 241    /**
 242     * MSAA layout used by this buffer.
 243     */
 244    enum intel_msaa_layout msaa_layout;
 245
 246    /* Derived from the above:
 247     */
 248    GLuint total_width;
 249    GLuint total_height;
 250
 251    /* The 3DSTATE_CLEAR_PARAMS value associated with the last depth clear to
 252     * this depth mipmap tree, if any.
 253     */
 254    uint32_t depth_clear_value;
 255
 256    /* Includes image offset tables:
 257     */
 258    struct intel_mipmap_level level[MAX_TEXTURE_LEVELS];
 259
 260    /* The data is held here:
 261     */
 262    struct intel_region *region;
 263
 264    /* Offset into region bo where miptree starts:
 265     */
 266    uint32_t offset;
 267
 268    /**
 269     * \brief Singlesample miptree.
 270     *
 271     * This is used under two cases.
 272     *
 273     * --- Case 1: As persistent singlesample storage for multisample window
 274     *  system front and back buffers ---
 275     *
 276     * Suppose that the window system FBO was created with a multisample
 277     * config.  Let `back_irb` be the `intel_renderbuffer` for the FBO's back
 278     * buffer. Then `back_irb` contains two miptrees: a parent multisample
 279     * miptree (back_irb->mt) and a child singlesample miptree
 280     * (back_irb->mt->singlesample_mt).  The DRM buffer shared with DRI2
 281     * belongs to `back_irb->mt->singlesample_mt` and contains singlesample
 282     * data.  The singlesample miptree is created at the same time as and
 283     * persists for the lifetime of its parent multisample miptree.
 284     *
 285     * When access to the singlesample data is needed, such as at
 286     * eglSwapBuffers and glReadPixels, an automatic downsample occurs from
 287     * `back_rb->mt` to `back_rb->mt->singlesample_mt` when necessary.
 288     *
 289     * This description of the back buffer applies analogously to the front
 290     * buffer.
 291     *
 292     *
 293     * --- Case 2: As temporary singlesample storage for mapping multisample
 294     *  miptrees ---
 295     *
 296     * Suppose the intel_miptree_map is called on a multisample miptree, `mt`,
 297     * for which case 1 does not apply (that is, `mt` does not belong to
 298     * a front or back buffer).  Then `mt->singlesample_mt` is null at the
 299     * start of the call. intel_miptree_map will create a temporary
 300     * singlesample miptree, store it at `mt->singlesample_mt`, downsample from
 301     * `mt` to `mt->singlesample_mt` if necessary, then map
 302     * `mt->singlesample_mt`. The temporary miptree is later deleted during
 303     * intel_miptree_unmap.
 304     */
 305    struct intel_mipmap_tree *singlesample_mt;
 306
 307    /**
 308     * \brief A downsample is needed from this miptree to singlesample_mt.
 309     */
 310    bool need_downsample;
 311
 312    /**
 313     * \brief HiZ miptree
 314     *
 315     * This is non-null only if HiZ is enabled for this miptree.
 316     *
 317     * \see intel_miptree_alloc_hiz()
 318     */
 319    struct intel_mipmap_tree *hiz_mt;
 320
 321    /**
 322     * \brief Map of miptree slices to needed resolves.
 323     *
 324     * This is used only when the miptree has a child HiZ miptree.
 325     *
 326     * Let \c mt be a depth miptree with HiZ enabled. Then the resolve map is
 327     * \c mt->hiz_map. The resolve map of the child HiZ miptree, \c
 328     * mt->hiz_mt->hiz_map, is unused.
 329     */
 330    struct intel_resolve_map hiz_map;
 331
 332    /**
 333     * \brief Stencil miptree for depthstencil textures.
 334     *
 335     * This miptree is used for depthstencil textures and renderbuffers that
 336     * require separate stencil.  It always has the true copy of the stencil
 337     * bits, regardless of mt->format.
 338     *
 339     * \see intel_miptree_map_depthstencil()
 340     * \see intel_miptree_unmap_depthstencil()
 341     */
 342    struct intel_mipmap_tree *stencil_mt;
 343
 344    /**
 345     * \brief MCS miptree for multisampled textures.
 346     *
 347     * This miptree contains the "multisample control surface", which stores
 348     * the necessary information to implement compressed MSAA on Gen7+
 349     * (INTEL_MSAA_FORMAT_CMS).
 350     */
 351    struct intel_mipmap_tree *mcs_mt;
 352
 353    /**
 354     * \brief The miptree contains RGBX data that was originally ETC1 data.
 355     *
 356     * On hardware that lacks support for ETC1 textures, we do the
 357     * following on calls to glCompressedTexImage2D(GL_ETC1_RGB8_OES):
 358     *   1. Create a miptree whose format is MESA_FORMAT_RGBX8888_REV with
 359     *      the wraps_etc1 flag set.
 360     *   2. Translate the ETC1 data into RGBX.
 361     *   3. Store the RGBX data into the miptree and discard the ETC1 data.
 362     */
 363    bool wraps_etc1;
 364
 365    /* These are also refcounted:
 366     */
 367    GLuint refcount;
 368 };
 369
 370
 371
 372 struct intel_mipmap_tree *intel_miptree_create(struct intel_context *intel,
 373                                                GLenum target,
 374                                                gl_format format,
 375                                                GLuint first_level,
 376                                                GLuint last_level,
 377                                                GLuint width0,
 378                                                GLuint height0,
 379                                                GLuint depth0,
 380                                                bool expect_accelerated_upload,
 381                                                GLuint num_samples,
 382                                                enum intel_msaa_layout msaa_layout);
 383
 384 struct intel_mipmap_tree *
 385 intel_miptree_create_for_region(struct intel_context *intel,
 386                                 GLenum target,
 387                                 gl_format format,
 388                                 struct intel_region *region);
 389
 390 struct intel_mipmap_tree*
 391 intel_miptree_create_for_dri2_buffer(struct intel_context *intel,
 392                                      unsigned dri_attachment,
 393                                      gl_format format,
 394                                      uint32_t num_samples,
 395                                      struct intel_region *region);
 396
 397 /**
 398  * Create a miptree appropriate as the storage for a non-texture renderbuffer.
 399  * The miptree has the following properties:
 400  *     - The target is GL_TEXTURE_2D.
 401  *     - There are no levels other than the base level 0.
 402  *     - Depth is 1.
 403  */
 404 struct intel_mipmap_tree*
 405 intel_miptree_create_for_renderbuffer(struct intel_context *intel,
 406                                       gl_format format,
 407                                       uint32_t width,
 408                                       uint32_t height,
 409                                       uint32_t num_samples);
 410
 411 /** \brief Assert that the level and layer are valid for the miptree. */
 412 static inline void
 413 intel_miptree_check_level_layer(struct intel_mipmap_tree *mt,
 414                                 uint32_t level,
 415                                 uint32_t layer)
 416 {
 417    assert(level >= mt->first_level);
 418    assert(level <= mt->last_level);
 419    assert(layer < mt->level[level].depth);
 420 }
 421
 422 int intel_miptree_pitch_align (struct intel_context *intel,
 423                                struct intel_mipmap_tree *mt,
 424                                uint32_t tiling,
 425                                int pitch);
 426
 427 void intel_miptree_reference(struct intel_mipmap_tree **dst,
 428                              struct intel_mipmap_tree *src);
 429
 430 void intel_miptree_release(struct intel_mipmap_tree **mt);
 431
 432 /* Check if an image fits an existing mipmap tree layout
 433  */
 434 bool intel_miptree_match_image(struct intel_mipmap_tree *mt,
 435                                     struct gl_texture_image *image);
 436
 437 void
 438 intel_miptree_get_image_offset(struct intel_mipmap_tree *mt,
 439                                GLuint level, GLuint face, GLuint depth,
 440                                GLuint *x, GLuint *y);
 441
 442 void
 443 intel_miptree_get_dimensions_for_image(struct gl_texture_image *image,
 444                                        int *width, int *height, int *depth);
 445
 446 void intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
 447                                   GLuint level,
 448                                   GLuint x, GLuint y,
 449                                   GLuint w, GLuint h, GLuint d);
 450
 451 void intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
 452                                     GLuint level,
 453                                     GLuint img, GLuint x, GLuint y);
 454
 455 void
 456 intel_miptree_copy_teximage(struct intel_context *intel,
 457                             struct intel_texture_image *intelImage,
 458                             struct intel_mipmap_tree *dst_mt);
 459
 460 /**
 461  * Copy the stencil data from \c mt->stencil_mt->region to \c mt->region for
 462  * the given miptree slice.
 463  *
 464  * \see intel_mipmap_tree::stencil_mt
 465  */
 466 void
 467 intel_miptree_s8z24_scatter(struct intel_context *intel,
 468                             struct intel_mipmap_tree *mt,
 469                             uint32_t level,
 470                             uint32_t slice);
 471
 472 /**
 473  * Copy the stencil data in \c mt->stencil_mt->region to \c mt->region for the
 474  * given miptree slice.
 475  *
 476  * \see intel_mipmap_tree::stencil_mt
 477  */
 478 void
 479 intel_miptree_s8z24_gather(struct intel_context *intel,
 480                            struct intel_mipmap_tree *mt,
 481                            uint32_t level,
 482                            uint32_t layer);
 483
 484 bool
 485 intel_miptree_alloc_mcs(struct intel_context *intel,
 486                         struct intel_mipmap_tree *mt,
 487                         GLuint num_samples);
 488
 489 /**
 490  * \name Miptree HiZ functions
 491  * \{
 492  *
 493  * It is safe to call the "slice_set_need_resolve" and "slice_resolve"
 494  * functions on a miptree without HiZ. In that case, each function is a no-op.
 495  */
 496
 497 /**
 498  * \brief Allocate the miptree's embedded HiZ miptree.
 499  * \see intel_mipmap_tree:hiz_mt
 500  * \return false if allocation failed
 501  */
 502
 503 bool
 504 intel_miptree_alloc_hiz(struct intel_context *intel,
 505                         struct intel_mipmap_tree *mt,
 506                         GLuint num_samples);
 507
 508 void
 509 intel_miptree_slice_set_needs_hiz_resolve(struct intel_mipmap_tree *mt,
 510                                           uint32_t level,
 511                                           uint32_t depth);
 512 void
 513 intel_miptree_slice_set_needs_depth_resolve(struct intel_mipmap_tree *mt,
 514                                             uint32_t level,
 515                                             uint32_t depth);
 516 void
 517 intel_miptree_all_slices_set_need_hiz_resolve(struct intel_mipmap_tree *mt);
 518
 519 void
 520 intel_miptree_all_slices_set_need_depth_resolve(struct intel_mipmap_tree *mt);
 521
 522 /**
 523  * \return false if no resolve was needed
 524  */
 525 bool
 526 intel_miptree_slice_resolve_hiz(struct intel_context *intel,
 527                                 struct intel_mipmap_tree *mt,
 528                                 unsigned int level,
 529                                 unsigned int depth);
 530
 531 /**
 532  * \return false if no resolve was needed
 533  */
 534 bool
 535 intel_miptree_slice_resolve_depth(struct intel_context *intel,
 536                                   struct intel_mipmap_tree *mt,
 537                                   unsigned int level,
 538                                   unsigned int depth);
 539
 540 /**
 541  * \return false if no resolve was needed
 542  */
 543 bool
 544 intel_miptree_all_slices_resolve_hiz(struct intel_context *intel,
 545                                      struct intel_mipmap_tree *mt);
 546
 547 /**
 548  * \return false if no resolve was needed
 549  */
 550 bool
 551 intel_miptree_all_slices_resolve_depth(struct intel_context *intel,
 552                                        struct intel_mipmap_tree *mt);
 553
 554 /**\}*/
 555
 556 void
 557 intel_miptree_downsample(struct intel_context *intel,
 558                          struct intel_mipmap_tree *mt);
 559
 560 void
 561 intel_miptree_upsample(struct intel_context *intel,
 562                        struct intel_mipmap_tree *mt);
 563
 564 /* i915_mipmap_tree.c:
 565  */
 566 void i915_miptree_layout(struct intel_mipmap_tree *mt);
 567 void i945_miptree_layout(struct intel_mipmap_tree *mt);
 568 void brw_miptree_layout(struct intel_context *intel,
 569                         struct intel_mipmap_tree *mt);
 570
 571 void
 572 intel_miptree_map(struct intel_context *intel,
 573                   struct intel_mipmap_tree *mt,
 574                   unsigned int level,
 575                   unsigned int slice,
 576                   unsigned int x,
 577                   unsigned int y,
 578                   unsigned int w,
 579                   unsigned int h,
 580                   GLbitfield mode,
 581                   void **out_ptr,
 582                   int *out_stride);
 583
 584 void
 585 intel_miptree_unmap(struct intel_context *intel,
 586                     struct intel_mipmap_tree *mt,
 587                     unsigned int level,
 588                     unsigned int slice);
 589
 590 #ifdef I915
 591 static inline void
 592 intel_hiz_exec(struct intel_context *intel, struct intel_mipmap_tree *mt,
 593                unsigned int level, unsigned int layer, enum gen6_hiz_op op)
 594 {
 595    /* Stub on i915.  It would be nice if we didn't execute resolve code at all
 596     * there.
 597     */
 598 }
 599 #else
 600 void
 601 intel_hiz_exec(struct intel_context *intel, struct intel_mipmap_tree *mt,
 602                unsigned int level, unsigned int layer, enum gen6_hiz_op op);
 603 #endif
 604
 605 #ifdef __cplusplus
 606 }
 607 #endif
 608
 609 #endif