i965: Add hardware context support.
[mesa.git] / src / mesa / drivers / dri / intel / intel_mipmap_tree.h
1 /**************************************************************************
2 *
3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef INTEL_MIPMAP_TREE_H
29 #define INTEL_MIPMAP_TREE_H
30
31 #include <assert.h>
32
33 #include "intel_regions.h"
34 #include "intel_resolve_map.h"
35
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
39
40 /* A layer on top of the intel_regions code which adds:
41 *
42 * - Code to size and layout a region to hold a set of mipmaps.
43 * - Query to determine if a new image fits in an existing tree.
44 * - More refcounting
45 * - maybe able to remove refcounting from intel_region?
46 * - ?
47 *
48 * The fixed mipmap layout of intel hardware where one offset
49 * specifies the position of all images in a mipmap hierachy
50 * complicates the implementation of GL texture image commands,
51 * compared to hardware where each image is specified with an
52 * independent offset.
53 *
54 * In an ideal world, each texture object would be associated with a
55 * single bufmgr buffer or 2d intel_region, and all the images within
56 * the texture object would slot into the tree as they arrive. The
57 * reality can be a little messier, as images can arrive from the user
58 * with sizes that don't fit in the existing tree, or in an order
59 * where the tree layout cannot be guessed immediately.
60 *
61 * This structure encodes an idealized mipmap tree. The GL image
62 * commands build these where possible, otherwise store the images in
63 * temporary system buffers.
64 */
65
66 struct intel_resolve_map;
67 struct intel_texture_image;
68
69 struct intel_miptree_map {
70 /** Bitfield of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT, GL_MAP_INVALIDATE_BIT */
71 GLbitfield mode;
72 /** Region of interest for the map. */
73 int x, y, w, h;
74 /** Possibly malloced temporary buffer for the mapping. */
75 void *buffer;
76 /** Possible pointer to a BO temporary for the mapping. */
77 drm_intel_bo *bo;
78 /** Pointer to the start of (map_x, map_y) returned by the mapping. */
79 void *ptr;
80 /** Stride of the mapping. */
81 int stride;
82 };
83
84 /**
85 * Describes the location of each texture image within a texture region.
86 */
87 struct intel_mipmap_level
88 {
89 /** Offset to this miptree level, used in computing x_offset. */
90 GLuint level_x;
91 /** Offset to this miptree level, used in computing y_offset. */
92 GLuint level_y;
93 GLuint width;
94 GLuint height;
95
96 /**
97 * \brief Number of 2D slices in this miplevel.
98 *
99 * The exact semantics of depth varies according to the texture target:
100 * - For GL_TEXTURE_CUBE_MAP, depth is 6.
101 * - For GL_TEXTURE_2D_ARRAY, depth is the number of array slices. It is
102 * identical for all miplevels in the texture.
103 * - For GL_TEXTURE_3D, it is the texture's depth at this miplevel. Its
104 * value, like width and height, varies with miplevel.
105 * - For other texture types, depth is 1.
106 */
107 GLuint depth;
108
109 /**
110 * \brief List of 2D images in this mipmap level.
111 *
112 * This may be a list of cube faces, array slices in 2D array texture, or
113 * layers in a 3D texture. The list's length is \c depth.
114 */
115 struct intel_mipmap_slice {
116 /**
117 * \name Offset to slice
118 * \{
119 *
120 * Hardware formats are so diverse that that there is no unified way to
121 * compute the slice offsets, so we store them in this table.
122 *
123 * The (x, y) offset to slice \c s at level \c l relative the miptrees
124 * base address is
125 * \code
126 * x = mt->level[l].slice[s].x_offset
127 * y = mt->level[l].slice[s].y_offset
128 */
129 GLuint x_offset;
130 GLuint y_offset;
131 /** \} */
132
133 /**
134 * Pointer to mapping information, present across
135 * intel_tex_image_map()/unmap of the slice.
136 */
137 struct intel_miptree_map *map;
138 } *slice;
139 };
140
141 struct intel_mipmap_tree
142 {
143 /* Effectively the key:
144 */
145 GLenum target;
146
147 /**
148 * Generally, this is just the same as the gl_texture_image->TexFormat or
149 * gl_renderbuffer->Format.
150 *
151 * However, for textures and renderbuffers with packed depth/stencil formats
152 * on hardware where we want or need to use separate stencil, there will be
153 * two miptrees for storing the data. If the depthstencil texture or rb is
154 * MESA_FORMAT_Z32_FLOAT_X24S8, then mt->format will be
155 * MESA_FORMAT_Z32_FLOAT, otherwise for MESA_FORMAT_S8_Z24 objects it will be
156 * MESA_FORMAT_X8_Z24.
157 */
158 gl_format format;
159
160 /**
161 * The X offset of each image in the miptree must be aligned to this. See
162 * the "Alignment Unit Size" section of the BSpec.
163 */
164 unsigned int align_w;
165 unsigned int align_h; /**< \see align_w */
166
167 GLuint first_level;
168 GLuint last_level;
169
170 GLuint width0, height0, depth0; /**< Level zero image dimensions */
171 GLuint cpp;
172 GLuint num_samples;
173 bool compressed;
174
175 /**
176 * For 1D array, 2D array, cube, and 2D multisampled surfaces on Gen7: true
177 * if the surface only contains LOD 0, and hence no space is for LOD's
178 * other than 0 in between array slices.
179 *
180 * Corresponds to the surface_array_spacing bit in gen7_surface_state.
181 */
182 bool array_spacing_lod0;
183
184 /**
185 * For MSAA buffers, there are two possible layouts:
186 * - Interleaved, in which the additional samples are accommodated
187 * by scaling up the width and height of the surface.
188 * - Sliced, in which the surface is stored as a 2D array, with
189 * array slice n containing all pixel data for sample n.
190 *
191 * This value is true if num_samples > 0 and the format is interleaved.
192 */
193 bool msaa_is_interleaved;
194
195 /* Derived from the above:
196 */
197 GLuint total_width;
198 GLuint total_height;
199
200 /* The 3DSTATE_CLEAR_PARAMS value associated with the last depth clear to
201 * this depth mipmap tree, if any.
202 */
203 uint32_t depth_clear_value;
204
205 /* Includes image offset tables:
206 */
207 struct intel_mipmap_level level[MAX_TEXTURE_LEVELS];
208
209 /* The data is held here:
210 */
211 struct intel_region *region;
212
213 /**
214 * \brief HiZ miptree
215 *
216 * This is non-null only if HiZ is enabled for this miptree.
217 *
218 * \see intel_miptree_alloc_hiz()
219 */
220 struct intel_mipmap_tree *hiz_mt;
221
222 /**
223 * \brief Map of miptree slices to needed resolves.
224 *
225 * This is used only when the miptree has a child HiZ miptree.
226 *
227 * Let \c mt be a depth miptree with HiZ enabled. Then the resolve map is
228 * \c mt->hiz_map. The resolve map of the child HiZ miptree, \c
229 * mt->hiz_mt->hiz_map, is unused.
230 */
231 struct intel_resolve_map hiz_map;
232
233 /**
234 * \brief Stencil miptree for depthstencil textures.
235 *
236 * This miptree is used for depthstencil textures and renderbuffers that
237 * require separate stencil. It always has the true copy of the stencil
238 * bits, regardless of mt->format.
239 *
240 * \see intel_miptree_map_depthstencil()
241 * \see intel_miptree_unmap_depthstencil()
242 */
243 struct intel_mipmap_tree *stencil_mt;
244
245 /* These are also refcounted:
246 */
247 GLuint refcount;
248 };
249
250
251
252 struct intel_mipmap_tree *intel_miptree_create(struct intel_context *intel,
253 GLenum target,
254 gl_format format,
255 GLuint first_level,
256 GLuint last_level,
257 GLuint width0,
258 GLuint height0,
259 GLuint depth0,
260 bool expect_accelerated_upload,
261 GLuint num_samples,
262 bool msaa_is_interleaved);
263
264 struct intel_mipmap_tree *
265 intel_miptree_create_for_region(struct intel_context *intel,
266 GLenum target,
267 gl_format format,
268 struct intel_region *region);
269
270 /**
271 * Create a miptree appropriate as the storage for a non-texture renderbuffer.
272 * The miptree has the following properties:
273 * - The target is GL_TEXTURE_2D.
274 * - There are no levels other than the base level 0.
275 * - Depth is 1.
276 */
277 struct intel_mipmap_tree*
278 intel_miptree_create_for_renderbuffer(struct intel_context *intel,
279 gl_format format,
280 uint32_t width,
281 uint32_t height,
282 uint32_t num_samples);
283
284 /** \brief Assert that the level and layer are valid for the miptree. */
285 static inline void
286 intel_miptree_check_level_layer(struct intel_mipmap_tree *mt,
287 uint32_t level,
288 uint32_t layer)
289 {
290 assert(level >= mt->first_level);
291 assert(level <= mt->last_level);
292 assert(layer < mt->level[level].depth);
293 }
294
295 int intel_miptree_pitch_align (struct intel_context *intel,
296 struct intel_mipmap_tree *mt,
297 uint32_t tiling,
298 int pitch);
299
300 void intel_miptree_reference(struct intel_mipmap_tree **dst,
301 struct intel_mipmap_tree *src);
302
303 void intel_miptree_release(struct intel_mipmap_tree **mt);
304
305 /* Check if an image fits an existing mipmap tree layout
306 */
307 bool intel_miptree_match_image(struct intel_mipmap_tree *mt,
308 struct gl_texture_image *image);
309
310 void
311 intel_miptree_get_image_offset(struct intel_mipmap_tree *mt,
312 GLuint level, GLuint face, GLuint depth,
313 GLuint *x, GLuint *y);
314
315 void
316 intel_miptree_get_dimensions_for_image(struct gl_texture_image *image,
317 int *width, int *height, int *depth);
318
319 void intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
320 GLuint level,
321 GLuint x, GLuint y,
322 GLuint w, GLuint h, GLuint d);
323
324 void intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
325 GLuint level,
326 GLuint img, GLuint x, GLuint y);
327
328 void
329 intel_miptree_copy_teximage(struct intel_context *intel,
330 struct intel_texture_image *intelImage,
331 struct intel_mipmap_tree *dst_mt);
332
333 /**
334 * Copy the stencil data from \c mt->stencil_mt->region to \c mt->region for
335 * the given miptree slice.
336 *
337 * \see intel_mipmap_tree::stencil_mt
338 */
339 void
340 intel_miptree_s8z24_scatter(struct intel_context *intel,
341 struct intel_mipmap_tree *mt,
342 uint32_t level,
343 uint32_t slice);
344
345 /**
346 * Copy the stencil data in \c mt->stencil_mt->region to \c mt->region for the
347 * given miptree slice.
348 *
349 * \see intel_mipmap_tree::stencil_mt
350 */
351 void
352 intel_miptree_s8z24_gather(struct intel_context *intel,
353 struct intel_mipmap_tree *mt,
354 uint32_t level,
355 uint32_t layer);
356
357 /**
358 * \name Miptree HiZ functions
359 * \{
360 *
361 * It is safe to call the "slice_set_need_resolve" and "slice_resolve"
362 * functions on a miptree without HiZ. In that case, each function is a no-op.
363 */
364
365 /**
366 * \brief Allocate the miptree's embedded HiZ miptree.
367 * \see intel_mipmap_tree:hiz_mt
368 * \return false if allocation failed
369 */
370
371 bool
372 intel_miptree_alloc_hiz(struct intel_context *intel,
373 struct intel_mipmap_tree *mt,
374 GLuint num_samples);
375
376 void
377 intel_miptree_slice_set_needs_hiz_resolve(struct intel_mipmap_tree *mt,
378 uint32_t level,
379 uint32_t depth);
380 void
381 intel_miptree_slice_set_needs_depth_resolve(struct intel_mipmap_tree *mt,
382 uint32_t level,
383 uint32_t depth);
384 void
385 intel_miptree_all_slices_set_need_hiz_resolve(struct intel_mipmap_tree *mt);
386
387 void
388 intel_miptree_all_slices_set_need_depth_resolve(struct intel_mipmap_tree *mt);
389
390 /**
391 * \return false if no resolve was needed
392 */
393 bool
394 intel_miptree_slice_resolve_hiz(struct intel_context *intel,
395 struct intel_mipmap_tree *mt,
396 unsigned int level,
397 unsigned int depth);
398
399 /**
400 * \return false if no resolve was needed
401 */
402 bool
403 intel_miptree_slice_resolve_depth(struct intel_context *intel,
404 struct intel_mipmap_tree *mt,
405 unsigned int level,
406 unsigned int depth);
407
408 /**
409 * \return false if no resolve was needed
410 */
411 bool
412 intel_miptree_all_slices_resolve_hiz(struct intel_context *intel,
413 struct intel_mipmap_tree *mt);
414
415 /**
416 * \return false if no resolve was needed
417 */
418 bool
419 intel_miptree_all_slices_resolve_depth(struct intel_context *intel,
420 struct intel_mipmap_tree *mt);
421
422 /**\}*/
423
424 /* i915_mipmap_tree.c:
425 */
426 void i915_miptree_layout(struct intel_mipmap_tree *mt);
427 void i945_miptree_layout(struct intel_mipmap_tree *mt);
428 void brw_miptree_layout(struct intel_context *intel,
429 struct intel_mipmap_tree *mt);
430
431 void
432 intel_miptree_map(struct intel_context *intel,
433 struct intel_mipmap_tree *mt,
434 unsigned int level,
435 unsigned int slice,
436 unsigned int x,
437 unsigned int y,
438 unsigned int w,
439 unsigned int h,
440 GLbitfield mode,
441 void **out_ptr,
442 int *out_stride);
443
444 void
445 intel_miptree_unmap(struct intel_context *intel,
446 struct intel_mipmap_tree *mt,
447 unsigned int level,
448 unsigned int slice);
449
450 #ifdef I915
451 static inline void
452 intel_hiz_exec(struct intel_context *intel, struct intel_mipmap_tree *mt,
453 unsigned int level, unsigned int layer, enum gen6_hiz_op op)
454 {
455 /* Stub on i915. It would be nice if we didn't execute resolve code at all
456 * there.
457 */
458 }
459 #else
460 void
461 intel_hiz_exec(struct intel_context *intel, struct intel_mipmap_tree *mt,
462 unsigned int level, unsigned int layer, enum gen6_hiz_op op);
463 #endif
464
465 #ifdef __cplusplus
466 }
467 #endif
468
469 #endif