src/mesa/drivers/dri/intel/intel_mipmap_tree.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
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  11  * permit persons to whom the Software is furnished to do so, subject to
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  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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  27
  28 #ifndef INTEL_MIPMAP_TREE_H
  29 #define INTEL_MIPMAP_TREE_H
  30
  31 #include <assert.h>
  32
  33 #include "intel_regions.h"
  34 #include "intel_resolve_map.h"
  35
  36 #ifdef __cplusplus
  37 extern "C" {
  38 #endif
  39
  40 /* A layer on top of the intel_regions code which adds:
  41  *
  42  * - Code to size and layout a region to hold a set of mipmaps.
  43  * - Query to determine if a new image fits in an existing tree.
  44  * - More refcounting
  45  *     - maybe able to remove refcounting from intel_region?
  46  * - ?
  47  *
  48  * The fixed mipmap layout of intel hardware where one offset
  49  * specifies the position of all images in a mipmap hierachy
  50  * complicates the implementation of GL texture image commands,
  51  * compared to hardware where each image is specified with an
  52  * independent offset.
  53  *
  54  * In an ideal world, each texture object would be associated with a
  55  * single bufmgr buffer or 2d intel_region, and all the images within
  56  * the texture object would slot into the tree as they arrive.  The
  57  * reality can be a little messier, as images can arrive from the user
  58  * with sizes that don't fit in the existing tree, or in an order
  59  * where the tree layout cannot be guessed immediately.
  60  *
  61  * This structure encodes an idealized mipmap tree.  The GL image
  62  * commands build these where possible, otherwise store the images in
  63  * temporary system buffers.
  64  */
  65
  66 struct intel_resolve_map;
  67 struct intel_texture_image;
  68
  69 /**
  70  * When calling intel_miptree_map() on an ETC-transcoded-to-RGB miptree or a
  71  * depthstencil-split-to-separate-stencil miptree, we'll normally make a
  72  * tmeporary and recreate the kind of data requested by Mesa core, since we're
  73  * satisfying some glGetTexImage() request or something.
  74  *
  75  * However, occasionally you want to actually map the miptree's current data
  76  * without transcoding back.  This flag to intel_miptree_map() gets you that.
  77  */
  78 #define BRW_MAP_DIRECT_BIT      0x80000000
  79
  80 struct intel_miptree_map {
  81    /** Bitfield of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT, GL_MAP_INVALIDATE_BIT */
  82    GLbitfield mode;
  83    /** Region of interest for the map. */
  84    int x, y, w, h;
  85    /** Possibly malloced temporary buffer for the mapping. */
  86    void *buffer;
  87    /** Possible pointer to a BO temporary for the mapping. */
  88    drm_intel_bo *bo;
  89    /** Pointer to the start of (map_x, map_y) returned by the mapping. */
  90    void *ptr;
  91    /** Stride of the mapping. */
  92    int stride;
  93
  94    /**
  95     * intel_mipmap_tree::singlesample_mt is temporary storage that persists
  96     * only for the duration of the map.
  97     */
  98    bool singlesample_mt_is_tmp;
  99 };
 100
 101 /**
 102  * Describes the location of each texture image within a texture region.
 103  */
 104 struct intel_mipmap_level
 105 {
 106    /** Offset to this miptree level, used in computing x_offset. */
 107    GLuint level_x;
 108    /** Offset to this miptree level, used in computing y_offset. */
 109    GLuint level_y;
 110    GLuint width;
 111    GLuint height;
 112
 113    /**
 114     * \brief Number of 2D slices in this miplevel.
 115     *
 116     * The exact semantics of depth varies according to the texture target:
 117     *    - For GL_TEXTURE_CUBE_MAP, depth is 6.
 118     *    - For GL_TEXTURE_2D_ARRAY, depth is the number of array slices. It is
 119     *      identical for all miplevels in the texture.
 120     *    - For GL_TEXTURE_3D, it is the texture's depth at this miplevel. Its
 121     *      value, like width and height, varies with miplevel.
 122     *    - For other texture types, depth is 1.
 123     */
 124    GLuint depth;
 125
 126    /**
 127     * \brief List of 2D images in this mipmap level.
 128     *
 129     * This may be a list of cube faces, array slices in 2D array texture, or
 130     * layers in a 3D texture. The list's length is \c depth.
 131     */
 132    struct intel_mipmap_slice {
 133       /**
 134        * \name Offset to slice
 135        * \{
 136        *
 137        * Hardware formats are so diverse that that there is no unified way to
 138        * compute the slice offsets, so we store them in this table.
 139        *
 140        * The (x, y) offset to slice \c s at level \c l relative the miptrees
 141        * base address is
 142        * \code
 143        *     x = mt->level[l].slice[s].x_offset
 144        *     y = mt->level[l].slice[s].y_offset
 145        */
 146       GLuint x_offset;
 147       GLuint y_offset;
 148       /** \} */
 149
 150       /**
 151        * Mapping information. Persistent for the duration of
 152        * intel_miptree_map/unmap on this slice.
 153        */
 154       struct intel_miptree_map *map;
 155    } *slice;
 156 };
 157
 158 /**
 159  * Enum for keeping track of the different MSAA layouts supported by Gen7.
 160  */
 161 enum intel_msaa_layout
 162 {
 163    /**
 164     * Ordinary surface with no MSAA.
 165     */
 166    INTEL_MSAA_LAYOUT_NONE,
 167
 168    /**
 169     * Interleaved Multisample Surface.  The additional samples are
 170     * accommodated by scaling up the width and the height of the surface so
 171     * that all the samples corresponding to a pixel are located at nearby
 172     * memory locations.
 173     */
 174    INTEL_MSAA_LAYOUT_IMS,
 175
 176    /**
 177     * Uncompressed Multisample Surface.  The surface is stored as a 2D array,
 178     * with array slice n containing all pixel data for sample n.
 179     */
 180    INTEL_MSAA_LAYOUT_UMS,
 181
 182    /**
 183     * Compressed Multisample Surface.  The surface is stored as in
 184     * INTEL_MSAA_LAYOUT_UMS, but there is an additional buffer called the MCS
 185     * (Multisample Control Surface) buffer.  Each pixel in the MCS buffer
 186     * indicates the mapping from sample number to array slice.  This allows
 187     * the common case (where all samples constituting a pixel have the same
 188     * color value) to be stored efficiently by just using a single array
 189     * slice.
 190     */
 191    INTEL_MSAA_LAYOUT_CMS,
 192 };
 193
 194 struct intel_mipmap_tree
 195 {
 196    /* Effectively the key:
 197     */
 198    GLenum target;
 199
 200    /**
 201     * Generally, this is just the same as the gl_texture_image->TexFormat or
 202     * gl_renderbuffer->Format.
 203     *
 204     * However, for textures and renderbuffers with packed depth/stencil formats
 205     * on hardware where we want or need to use separate stencil, there will be
 206     * two miptrees for storing the data.  If the depthstencil texture or rb is
 207     * MESA_FORMAT_Z32_FLOAT_X24S8, then mt->format will be
 208     * MESA_FORMAT_Z32_FLOAT, otherwise for MESA_FORMAT_S8_Z24 objects it will be
 209     * MESA_FORMAT_X8_Z24.
 210     *
 211     * For ETC1/ETC2 textures, this is one of the uncompressed mesa texture
 212     * formats if the hardware lacks support for ETC1/ETC2. See @ref wraps_etc.
 213     */
 214    gl_format format;
 215
 216    /** This variable stores the value of ETC compressed texture format */
 217    gl_format etc_format;
 218
 219    /**
 220     * The X offset of each image in the miptree must be aligned to this. See
 221     * the "Alignment Unit Size" section of the BSpec.
 222     */
 223    unsigned int align_w;
 224    unsigned int align_h; /**< \see align_w */
 225
 226    GLuint first_level;
 227    GLuint last_level;
 228
 229    /**
 230     * Level zero image dimensions.  These dimensions correspond to the
 231     * physical layout of data in memory.  Accordingly, they account for the
 232     * extra width, height, and or depth that must be allocated in order to
 233     * accommodate multisample formats, and they account for the extra factor
 234     * of 6 in depth that must be allocated in order to accommodate cubemap
 235     * textures.
 236     */
 237    GLuint physical_width0, physical_height0, physical_depth0;
 238
 239    GLuint cpp;
 240    GLuint num_samples;
 241    bool compressed;
 242
 243    /**
 244     * Level zero image dimensions.  These dimensions correspond to the
 245     * logical width, height, and depth of the region as seen by client code.
 246     * Accordingly, they do not account for the extra width, height, and/or
 247     * depth that must be allocated in order to accommodate multisample
 248     * formats, nor do they account for the extra factor of 6 in depth that
 249     * must be allocated in order to accommodate cubemap textures.
 250     */
 251    uint32_t logical_width0, logical_height0, logical_depth0;
 252
 253    /**
 254     * For 1D array, 2D array, cube, and 2D multisampled surfaces on Gen7: true
 255     * if the surface only contains LOD 0, and hence no space is for LOD's
 256     * other than 0 in between array slices.
 257     *
 258     * Corresponds to the surface_array_spacing bit in gen7_surface_state.
 259     */
 260    bool array_spacing_lod0;
 261
 262    /**
 263     * MSAA layout used by this buffer.
 264     */
 265    enum intel_msaa_layout msaa_layout;
 266
 267    /* Derived from the above:
 268     */
 269    GLuint total_width;
 270    GLuint total_height;
 271
 272    /* The 3DSTATE_CLEAR_PARAMS value associated with the last depth clear to
 273     * this depth mipmap tree, if any.
 274     */
 275    uint32_t depth_clear_value;
 276
 277    /* Includes image offset tables:
 278     */
 279    struct intel_mipmap_level level[MAX_TEXTURE_LEVELS];
 280
 281    /* The data is held here:
 282     */
 283    struct intel_region *region;
 284
 285    /* Offset into region bo where miptree starts:
 286     */
 287    uint32_t offset;
 288
 289    /**
 290     * \brief Singlesample miptree.
 291     *
 292     * This is used under two cases.
 293     *
 294     * --- Case 1: As persistent singlesample storage for multisample window
 295     *  system front and back buffers ---
 296     *
 297     * Suppose that the window system FBO was created with a multisample
 298     * config.  Let `back_irb` be the `intel_renderbuffer` for the FBO's back
 299     * buffer. Then `back_irb` contains two miptrees: a parent multisample
 300     * miptree (back_irb->mt) and a child singlesample miptree
 301     * (back_irb->mt->singlesample_mt).  The DRM buffer shared with DRI2
 302     * belongs to `back_irb->mt->singlesample_mt` and contains singlesample
 303     * data.  The singlesample miptree is created at the same time as and
 304     * persists for the lifetime of its parent multisample miptree.
 305     *
 306     * When access to the singlesample data is needed, such as at
 307     * eglSwapBuffers and glReadPixels, an automatic downsample occurs from
 308     * `back_rb->mt` to `back_rb->mt->singlesample_mt` when necessary.
 309     *
 310     * This description of the back buffer applies analogously to the front
 311     * buffer.
 312     *
 313     *
 314     * --- Case 2: As temporary singlesample storage for mapping multisample
 315     *  miptrees ---
 316     *
 317     * Suppose the intel_miptree_map is called on a multisample miptree, `mt`,
 318     * for which case 1 does not apply (that is, `mt` does not belong to
 319     * a front or back buffer).  Then `mt->singlesample_mt` is null at the
 320     * start of the call. intel_miptree_map will create a temporary
 321     * singlesample miptree, store it at `mt->singlesample_mt`, downsample from
 322     * `mt` to `mt->singlesample_mt` if necessary, then map
 323     * `mt->singlesample_mt`. The temporary miptree is later deleted during
 324     * intel_miptree_unmap.
 325     */
 326    struct intel_mipmap_tree *singlesample_mt;
 327
 328    /**
 329     * \brief A downsample is needed from this miptree to singlesample_mt.
 330     */
 331    bool need_downsample;
 332
 333    /**
 334     * \brief HiZ miptree
 335     *
 336     * This is non-null only if HiZ is enabled for this miptree.
 337     *
 338     * \see intel_miptree_alloc_hiz()
 339     */
 340    struct intel_mipmap_tree *hiz_mt;
 341
 342    /**
 343     * \brief Map of miptree slices to needed resolves.
 344     *
 345     * This is used only when the miptree has a child HiZ miptree.
 346     *
 347     * Let \c mt be a depth miptree with HiZ enabled. Then the resolve map is
 348     * \c mt->hiz_map. The resolve map of the child HiZ miptree, \c
 349     * mt->hiz_mt->hiz_map, is unused.
 350     */
 351    struct intel_resolve_map hiz_map;
 352
 353    /**
 354     * \brief Stencil miptree for depthstencil textures.
 355     *
 356     * This miptree is used for depthstencil textures and renderbuffers that
 357     * require separate stencil.  It always has the true copy of the stencil
 358     * bits, regardless of mt->format.
 359     *
 360     * \see intel_miptree_map_depthstencil()
 361     * \see intel_miptree_unmap_depthstencil()
 362     */
 363    struct intel_mipmap_tree *stencil_mt;
 364
 365    /**
 366     * \brief MCS miptree for multisampled textures.
 367     *
 368     * This miptree contains the "multisample control surface", which stores
 369     * the necessary information to implement compressed MSAA on Gen7+
 370     * (INTEL_MSAA_FORMAT_CMS).
 371     */
 372    struct intel_mipmap_tree *mcs_mt;
 373
 374    /* These are also refcounted:
 375     */
 376    GLuint refcount;
 377 };
 378
 379
 380
 381 struct intel_mipmap_tree *intel_miptree_create(struct intel_context *intel,
 382                                                GLenum target,
 383                                                gl_format format,
 384                                                GLuint first_level,
 385                                                GLuint last_level,
 386                                                GLuint width0,
 387                                                GLuint height0,
 388                                                GLuint depth0,
 389                                                bool expect_accelerated_upload,
 390                                                GLuint num_samples,
 391                                                bool force_y_tiling);
 392
 393 struct intel_mipmap_tree *
 394 intel_miptree_create_layout(struct intel_context *intel,
 395                             GLenum target,
 396                             gl_format format,
 397                             GLuint first_level,
 398                             GLuint last_level,
 399                             GLuint width0,
 400                             GLuint height0,
 401                             GLuint depth0,
 402                             bool for_region,
 403                             GLuint num_samples);
 404
 405 struct intel_mipmap_tree *
 406 intel_miptree_create_for_region(struct intel_context *intel,
 407                                 GLenum target,
 408                                 gl_format format,
 409                                 struct intel_region *region);
 410
 411 struct intel_mipmap_tree*
 412 intel_miptree_create_for_dri2_buffer(struct intel_context *intel,
 413                                      unsigned dri_attachment,
 414                                      gl_format format,
 415                                      uint32_t num_samples,
 416                                      struct intel_region *region);
 417
 418 /**
 419  * Create a miptree appropriate as the storage for a non-texture renderbuffer.
 420  * The miptree has the following properties:
 421  *     - The target is GL_TEXTURE_2D.
 422  *     - There are no levels other than the base level 0.
 423  *     - Depth is 1.
 424  */
 425 struct intel_mipmap_tree*
 426 intel_miptree_create_for_renderbuffer(struct intel_context *intel,
 427                                       gl_format format,
 428                                       uint32_t width,
 429                                       uint32_t height,
 430                                       uint32_t num_samples);
 431
 432 /** \brief Assert that the level and layer are valid for the miptree. */
 433 static inline void
 434 intel_miptree_check_level_layer(struct intel_mipmap_tree *mt,
 435                                 uint32_t level,
 436                                 uint32_t layer)
 437 {
 438    assert(level >= mt->first_level);
 439    assert(level <= mt->last_level);
 440    assert(layer < mt->level[level].depth);
 441 }
 442
 443 int intel_miptree_pitch_align (struct intel_context *intel,
 444                                struct intel_mipmap_tree *mt,
 445                                uint32_t tiling,
 446                                int pitch);
 447
 448 void intel_miptree_reference(struct intel_mipmap_tree **dst,
 449                              struct intel_mipmap_tree *src);
 450
 451 void intel_miptree_release(struct intel_mipmap_tree **mt);
 452
 453 /* Check if an image fits an existing mipmap tree layout
 454  */
 455 bool intel_miptree_match_image(struct intel_mipmap_tree *mt,
 456                                     struct gl_texture_image *image);
 457
 458 void
 459 intel_miptree_get_image_offset(struct intel_mipmap_tree *mt,
 460                                GLuint level, GLuint slice,
 461                                GLuint *x, GLuint *y);
 462
 463 void
 464 intel_miptree_get_dimensions_for_image(struct gl_texture_image *image,
 465                                        int *width, int *height, int *depth);
 466
 467 void
 468 intel_miptree_get_tile_offsets(struct intel_mipmap_tree *mt,
 469                                GLuint level, GLuint slice,
 470                                uint32_t *tile_x,
 471                                uint32_t *tile_y);
 472
 473 void intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
 474                                   GLuint level,
 475                                   GLuint x, GLuint y,
 476                                   GLuint w, GLuint h, GLuint d);
 477
 478 void intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
 479                                     GLuint level,
 480                                     GLuint img, GLuint x, GLuint y);
 481
 482 void
 483 intel_miptree_copy_teximage(struct intel_context *intel,
 484                             struct intel_texture_image *intelImage,
 485                             struct intel_mipmap_tree *dst_mt);
 486
 487 /**
 488  * Copy the stencil data from \c mt->stencil_mt->region to \c mt->region for
 489  * the given miptree slice.
 490  *
 491  * \see intel_mipmap_tree::stencil_mt
 492  */
 493 void
 494 intel_miptree_s8z24_scatter(struct intel_context *intel,
 495                             struct intel_mipmap_tree *mt,
 496                             uint32_t level,
 497                             uint32_t slice);
 498
 499 /**
 500  * Copy the stencil data in \c mt->stencil_mt->region to \c mt->region for the
 501  * given miptree slice.
 502  *
 503  * \see intel_mipmap_tree::stencil_mt
 504  */
 505 void
 506 intel_miptree_s8z24_gather(struct intel_context *intel,
 507                            struct intel_mipmap_tree *mt,
 508                            uint32_t level,
 509                            uint32_t layer);
 510
 511 bool
 512 intel_miptree_alloc_mcs(struct intel_context *intel,
 513                         struct intel_mipmap_tree *mt,
 514                         GLuint num_samples);
 515
 516 /**
 517  * \name Miptree HiZ functions
 518  * \{
 519  *
 520  * It is safe to call the "slice_set_need_resolve" and "slice_resolve"
 521  * functions on a miptree without HiZ. In that case, each function is a no-op.
 522  */
 523
 524 /**
 525  * \brief Allocate the miptree's embedded HiZ miptree.
 526  * \see intel_mipmap_tree:hiz_mt
 527  * \return false if allocation failed
 528  */
 529
 530 bool
 531 intel_miptree_alloc_hiz(struct intel_context *intel,
 532                         struct intel_mipmap_tree *mt,
 533                         GLuint num_samples);
 534
 535 void
 536 intel_miptree_slice_set_needs_hiz_resolve(struct intel_mipmap_tree *mt,
 537                                           uint32_t level,
 538                                           uint32_t depth);
 539 void
 540 intel_miptree_slice_set_needs_depth_resolve(struct intel_mipmap_tree *mt,
 541                                             uint32_t level,
 542                                             uint32_t depth);
 543
 544 /**
 545  * \return false if no resolve was needed
 546  */
 547 bool
 548 intel_miptree_slice_resolve_hiz(struct intel_context *intel,
 549                                 struct intel_mipmap_tree *mt,
 550                                 unsigned int level,
 551                                 unsigned int depth);
 552
 553 /**
 554  * \return false if no resolve was needed
 555  */
 556 bool
 557 intel_miptree_slice_resolve_depth(struct intel_context *intel,
 558                                   struct intel_mipmap_tree *mt,
 559                                   unsigned int level,
 560                                   unsigned int depth);
 561
 562 /**
 563  * \return false if no resolve was needed
 564  */
 565 bool
 566 intel_miptree_all_slices_resolve_hiz(struct intel_context *intel,
 567                                      struct intel_mipmap_tree *mt);
 568
 569 /**
 570  * \return false if no resolve was needed
 571  */
 572 bool
 573 intel_miptree_all_slices_resolve_depth(struct intel_context *intel,
 574                                        struct intel_mipmap_tree *mt);
 575
 576 /**\}*/
 577
 578 void
 579 intel_miptree_downsample(struct intel_context *intel,
 580                          struct intel_mipmap_tree *mt);
 581
 582 void
 583 intel_miptree_upsample(struct intel_context *intel,
 584                        struct intel_mipmap_tree *mt);
 585
 586 /* i915_mipmap_tree.c:
 587  */
 588 void i915_miptree_layout(struct intel_mipmap_tree *mt);
 589 void i945_miptree_layout(struct intel_mipmap_tree *mt);
 590 void brw_miptree_layout(struct intel_context *intel,
 591                         struct intel_mipmap_tree *mt);
 592
 593 void *intel_miptree_map_raw(struct intel_context *intel,
 594                             struct intel_mipmap_tree *mt);
 595
 596 void intel_miptree_unmap_raw(struct intel_context *intel,
 597                              struct intel_mipmap_tree *mt);
 598
 599 void
 600 intel_miptree_map(struct intel_context *intel,
 601                   struct intel_mipmap_tree *mt,
 602                   unsigned int level,
 603                   unsigned int slice,
 604                   unsigned int x,
 605                   unsigned int y,
 606                   unsigned int w,
 607                   unsigned int h,
 608                   GLbitfield mode,
 609                   void **out_ptr,
 610                   int *out_stride);
 611
 612 void
 613 intel_miptree_unmap(struct intel_context *intel,
 614                     struct intel_mipmap_tree *mt,
 615                     unsigned int level,
 616                     unsigned int slice);
 617
 618 #ifdef I915
 619 static inline void
 620 intel_hiz_exec(struct intel_context *intel, struct intel_mipmap_tree *mt,
 621                unsigned int level, unsigned int layer, enum gen6_hiz_op op)
 622 {
 623    /* Stub on i915.  It would be nice if we didn't execute resolve code at all
 624     * there.
 625     */
 626 }
 627 #else
 628 void
 629 intel_hiz_exec(struct intel_context *intel, struct intel_mipmap_tree *mt,
 630                unsigned int level, unsigned int layer, enum gen6_hiz_op op);
 631 #endif
 632
 633 #ifdef __cplusplus
 634 }
 635 #endif
 636
 637 #endif