1 /**************************************************************************
3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
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28 #ifndef INTEL_MIPMAP_TREE_H
29 #define INTEL_MIPMAP_TREE_H
33 #include "intel_regions.h"
34 #include "intel_resolve_map.h"
40 /* A layer on top of the intel_regions code which adds:
42 * - Code to size and layout a region to hold a set of mipmaps.
43 * - Query to determine if a new image fits in an existing tree.
45 * - maybe able to remove refcounting from intel_region?
48 * The fixed mipmap layout of intel hardware where one offset
49 * specifies the position of all images in a mipmap hierachy
50 * complicates the implementation of GL texture image commands,
51 * compared to hardware where each image is specified with an
54 * In an ideal world, each texture object would be associated with a
55 * single bufmgr buffer or 2d intel_region, and all the images within
56 * the texture object would slot into the tree as they arrive. The
57 * reality can be a little messier, as images can arrive from the user
58 * with sizes that don't fit in the existing tree, or in an order
59 * where the tree layout cannot be guessed immediately.
61 * This structure encodes an idealized mipmap tree. The GL image
62 * commands build these where possible, otherwise store the images in
63 * temporary system buffers.
66 struct intel_resolve_map
;
67 struct intel_texture_image
;
69 struct intel_miptree_map
{
70 /** Bitfield of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT, GL_MAP_INVALIDATE_BIT */
72 /** Region of interest for the map. */
74 /** Possibly malloced temporary buffer for the mapping. */
76 /** Possible pointer to a BO temporary for the mapping. */
78 /** Pointer to the start of (map_x, map_y) returned by the mapping. */
80 /** Stride of the mapping. */
85 * Describes the location of each texture image within a texture region.
87 struct intel_mipmap_level
89 /** Offset to this miptree level, used in computing x_offset. */
91 /** Offset to this miptree level, used in computing y_offset. */
97 * \brief Number of 2D slices in this miplevel.
99 * The exact semantics of depth varies according to the texture target:
100 * - For GL_TEXTURE_CUBE_MAP, depth is 6.
101 * - For GL_TEXTURE_2D_ARRAY, depth is the number of array slices. It is
102 * identical for all miplevels in the texture.
103 * - For GL_TEXTURE_3D, it is the texture's depth at this miplevel. Its
104 * value, like width and height, varies with miplevel.
105 * - For other texture types, depth is 1.
110 * \brief List of 2D images in this mipmap level.
112 * This may be a list of cube faces, array slices in 2D array texture, or
113 * layers in a 3D texture. The list's length is \c depth.
115 struct intel_mipmap_slice
{
117 * \name Offset to slice
120 * Hardware formats are so diverse that that there is no unified way to
121 * compute the slice offsets, so we store them in this table.
123 * The (x, y) offset to slice \c s at level \c l relative the miptrees
126 * x = mt->level[l].slice[s].x_offset
127 * y = mt->level[l].slice[s].y_offset
134 * Pointer to mapping information, present across
135 * intel_tex_image_map()/unmap of the slice.
137 struct intel_miptree_map
*map
;
142 * Enum for keeping track of the different MSAA layouts supported by Gen7.
144 enum intel_msaa_layout
147 * Ordinary surface with no MSAA.
149 INTEL_MSAA_LAYOUT_NONE
,
152 * Interleaved Multisample Surface. The additional samples are
153 * accommodated by scaling up the width and the height of the surface so
154 * that all the samples corresponding to a pixel are located at nearby
157 INTEL_MSAA_LAYOUT_IMS
,
160 * Uncompressed Multisample Surface. The surface is stored as a 2D array,
161 * with array slice n containing all pixel data for sample n.
163 INTEL_MSAA_LAYOUT_UMS
,
166 * Compressed Multisample Surface. The surface is stored as in
167 * INTEL_MSAA_LAYOUT_UMS, but there is an additional buffer called the MCS
168 * (Multisample Control Surface) buffer. Each pixel in the MCS buffer
169 * indicates the mapping from sample number to array slice. This allows
170 * the common case (where all samples constituting a pixel have the same
171 * color value) to be stored efficiently by just using a single array
174 INTEL_MSAA_LAYOUT_CMS
,
177 struct intel_mipmap_tree
179 /* Effectively the key:
184 * Generally, this is just the same as the gl_texture_image->TexFormat or
185 * gl_renderbuffer->Format.
187 * However, for textures and renderbuffers with packed depth/stencil formats
188 * on hardware where we want or need to use separate stencil, there will be
189 * two miptrees for storing the data. If the depthstencil texture or rb is
190 * MESA_FORMAT_Z32_FLOAT_X24S8, then mt->format will be
191 * MESA_FORMAT_Z32_FLOAT, otherwise for MESA_FORMAT_S8_Z24 objects it will be
192 * MESA_FORMAT_X8_Z24.
194 * For ETC1 textures, this is MESA_FORMAT_RGBX8888_REV if the hardware
195 * lacks support for ETC1. See @ref wraps_etc1.
200 * The X offset of each image in the miptree must be aligned to this. See
201 * the "Alignment Unit Size" section of the BSpec.
203 unsigned int align_w
;
204 unsigned int align_h
; /**< \see align_w */
209 GLuint width0
, height0
, depth0
; /**< Level zero image dimensions */
215 * For 1D array, 2D array, cube, and 2D multisampled surfaces on Gen7: true
216 * if the surface only contains LOD 0, and hence no space is for LOD's
217 * other than 0 in between array slices.
219 * Corresponds to the surface_array_spacing bit in gen7_surface_state.
221 bool array_spacing_lod0
;
224 * MSAA layout used by this buffer.
226 enum intel_msaa_layout msaa_layout
;
228 /* Derived from the above:
233 /* The 3DSTATE_CLEAR_PARAMS value associated with the last depth clear to
234 * this depth mipmap tree, if any.
236 uint32_t depth_clear_value
;
238 /* Includes image offset tables:
240 struct intel_mipmap_level level
[MAX_TEXTURE_LEVELS
];
242 /* The data is held here:
244 struct intel_region
*region
;
246 /* Offset into region bo where miptree starts:
253 * This is non-null only if HiZ is enabled for this miptree.
255 * \see intel_miptree_alloc_hiz()
257 struct intel_mipmap_tree
*hiz_mt
;
260 * \brief Map of miptree slices to needed resolves.
262 * This is used only when the miptree has a child HiZ miptree.
264 * Let \c mt be a depth miptree with HiZ enabled. Then the resolve map is
265 * \c mt->hiz_map. The resolve map of the child HiZ miptree, \c
266 * mt->hiz_mt->hiz_map, is unused.
268 struct intel_resolve_map hiz_map
;
271 * \brief Stencil miptree for depthstencil textures.
273 * This miptree is used for depthstencil textures and renderbuffers that
274 * require separate stencil. It always has the true copy of the stencil
275 * bits, regardless of mt->format.
277 * \see intel_miptree_map_depthstencil()
278 * \see intel_miptree_unmap_depthstencil()
280 struct intel_mipmap_tree
*stencil_mt
;
283 * \brief MCS miptree for multisampled textures.
285 * This miptree contains the "multisample control surface", which stores
286 * the necessary information to implement compressed MSAA on Gen7+
287 * (INTEL_MSAA_FORMAT_CMS).
289 struct intel_mipmap_tree
*mcs_mt
;
291 /* These are also refcounted:
298 struct intel_mipmap_tree
*intel_miptree_create(struct intel_context
*intel
,
306 bool expect_accelerated_upload
,
308 enum intel_msaa_layout msaa_layout
);
310 struct intel_mipmap_tree
*
311 intel_miptree_create_for_region(struct intel_context
*intel
,
314 struct intel_region
*region
);
317 * Create a miptree appropriate as the storage for a non-texture renderbuffer.
318 * The miptree has the following properties:
319 * - The target is GL_TEXTURE_2D.
320 * - There are no levels other than the base level 0.
323 struct intel_mipmap_tree
*
324 intel_miptree_create_for_renderbuffer(struct intel_context
*intel
,
328 uint32_t num_samples
);
330 /** \brief Assert that the level and layer are valid for the miptree. */
332 intel_miptree_check_level_layer(struct intel_mipmap_tree
*mt
,
336 assert(level
>= mt
->first_level
);
337 assert(level
<= mt
->last_level
);
338 assert(layer
< mt
->level
[level
].depth
);
341 int intel_miptree_pitch_align (struct intel_context
*intel
,
342 struct intel_mipmap_tree
*mt
,
346 void intel_miptree_reference(struct intel_mipmap_tree
**dst
,
347 struct intel_mipmap_tree
*src
);
349 void intel_miptree_release(struct intel_mipmap_tree
**mt
);
351 /* Check if an image fits an existing mipmap tree layout
353 bool intel_miptree_match_image(struct intel_mipmap_tree
*mt
,
354 struct gl_texture_image
*image
);
357 intel_miptree_get_image_offset(struct intel_mipmap_tree
*mt
,
358 GLuint level
, GLuint face
, GLuint depth
,
359 GLuint
*x
, GLuint
*y
);
362 intel_miptree_get_dimensions_for_image(struct gl_texture_image
*image
,
363 int *width
, int *height
, int *depth
);
365 void intel_miptree_set_level_info(struct intel_mipmap_tree
*mt
,
368 GLuint w
, GLuint h
, GLuint d
);
370 void intel_miptree_set_image_offset(struct intel_mipmap_tree
*mt
,
372 GLuint img
, GLuint x
, GLuint y
);
375 intel_miptree_copy_teximage(struct intel_context
*intel
,
376 struct intel_texture_image
*intelImage
,
377 struct intel_mipmap_tree
*dst_mt
);
380 * Copy the stencil data from \c mt->stencil_mt->region to \c mt->region for
381 * the given miptree slice.
383 * \see intel_mipmap_tree::stencil_mt
386 intel_miptree_s8z24_scatter(struct intel_context
*intel
,
387 struct intel_mipmap_tree
*mt
,
392 * Copy the stencil data in \c mt->stencil_mt->region to \c mt->region for the
393 * given miptree slice.
395 * \see intel_mipmap_tree::stencil_mt
398 intel_miptree_s8z24_gather(struct intel_context
*intel
,
399 struct intel_mipmap_tree
*mt
,
404 intel_miptree_alloc_mcs(struct intel_context
*intel
,
405 struct intel_mipmap_tree
*mt
,
409 * \name Miptree HiZ functions
412 * It is safe to call the "slice_set_need_resolve" and "slice_resolve"
413 * functions on a miptree without HiZ. In that case, each function is a no-op.
417 * \brief Allocate the miptree's embedded HiZ miptree.
418 * \see intel_mipmap_tree:hiz_mt
419 * \return false if allocation failed
423 intel_miptree_alloc_hiz(struct intel_context
*intel
,
424 struct intel_mipmap_tree
*mt
,
428 intel_miptree_slice_set_needs_hiz_resolve(struct intel_mipmap_tree
*mt
,
432 intel_miptree_slice_set_needs_depth_resolve(struct intel_mipmap_tree
*mt
,
436 intel_miptree_all_slices_set_need_hiz_resolve(struct intel_mipmap_tree
*mt
);
439 intel_miptree_all_slices_set_need_depth_resolve(struct intel_mipmap_tree
*mt
);
442 * \return false if no resolve was needed
445 intel_miptree_slice_resolve_hiz(struct intel_context
*intel
,
446 struct intel_mipmap_tree
*mt
,
451 * \return false if no resolve was needed
454 intel_miptree_slice_resolve_depth(struct intel_context
*intel
,
455 struct intel_mipmap_tree
*mt
,
460 * \return false if no resolve was needed
463 intel_miptree_all_slices_resolve_hiz(struct intel_context
*intel
,
464 struct intel_mipmap_tree
*mt
);
467 * \return false if no resolve was needed
470 intel_miptree_all_slices_resolve_depth(struct intel_context
*intel
,
471 struct intel_mipmap_tree
*mt
);
475 /* i915_mipmap_tree.c:
477 void i915_miptree_layout(struct intel_mipmap_tree
*mt
);
478 void i945_miptree_layout(struct intel_mipmap_tree
*mt
);
479 void brw_miptree_layout(struct intel_context
*intel
,
480 struct intel_mipmap_tree
*mt
);
483 intel_miptree_map(struct intel_context
*intel
,
484 struct intel_mipmap_tree
*mt
,
496 intel_miptree_unmap(struct intel_context
*intel
,
497 struct intel_mipmap_tree
*mt
,
503 intel_hiz_exec(struct intel_context
*intel
, struct intel_mipmap_tree
*mt
,
504 unsigned int level
, unsigned int layer
, enum gen6_hiz_op op
)
506 /* Stub on i915. It would be nice if we didn't execute resolve code at all
512 intel_hiz_exec(struct intel_context
*intel
, struct intel_mipmap_tree
*mt
,
513 unsigned int level
, unsigned int layer
, enum gen6_hiz_op op
);