src/mesa/drivers/dri/intel/intel_mipmap_tree.h

   1 /**************************************************************************
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   3  * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
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  16  * of the Software.
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  27
  28 #ifndef INTEL_MIPMAP_TREE_H
  29 #define INTEL_MIPMAP_TREE_H
  30
  31 #include <assert.h>
  32
  33 #include "intel_regions.h"
  34 #include "intel_resolve_map.h"
  35
  36 #ifdef __cplusplus
  37 extern "C" {
  38 #endif
  39
  40 /* A layer on top of the intel_regions code which adds:
  41  *
  42  * - Code to size and layout a region to hold a set of mipmaps.
  43  * - Query to determine if a new image fits in an existing tree.
  44  * - More refcounting
  45  *     - maybe able to remove refcounting from intel_region?
  46  * - ?
  47  *
  48  * The fixed mipmap layout of intel hardware where one offset
  49  * specifies the position of all images in a mipmap hierachy
  50  * complicates the implementation of GL texture image commands,
  51  * compared to hardware where each image is specified with an
  52  * independent offset.
  53  *
  54  * In an ideal world, each texture object would be associated with a
  55  * single bufmgr buffer or 2d intel_region, and all the images within
  56  * the texture object would slot into the tree as they arrive.  The
  57  * reality can be a little messier, as images can arrive from the user
  58  * with sizes that don't fit in the existing tree, or in an order
  59  * where the tree layout cannot be guessed immediately.
  60  *
  61  * This structure encodes an idealized mipmap tree.  The GL image
  62  * commands build these where possible, otherwise store the images in
  63  * temporary system buffers.
  64  */
  65
  66 struct intel_resolve_map;
  67 struct intel_texture_image;
  68
  69 struct intel_miptree_map {
  70    /** Bitfield of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT, GL_MAP_INVALIDATE_BIT */
  71    GLbitfield mode;
  72    /** Region of interest for the map. */
  73    int x, y, w, h;
  74    /** Possibly malloced temporary buffer for the mapping. */
  75    void *buffer;
  76    /** Possible pointer to a BO temporary for the mapping. */
  77    drm_intel_bo *bo;
  78    /** Pointer to the start of (map_x, map_y) returned by the mapping. */
  79    void *ptr;
  80    /** Stride of the mapping. */
  81    int stride;
  82 };
  83
  84 /**
  85  * Describes the location of each texture image within a texture region.
  86  */
  87 struct intel_mipmap_level
  88 {
  89    /** Offset to this miptree level, used in computing x_offset. */
  90    GLuint level_x;
  91    /** Offset to this miptree level, used in computing y_offset. */
  92    GLuint level_y;
  93    GLuint width;
  94    GLuint height;
  95
  96    /**
  97     * \brief Number of 2D slices in this miplevel.
  98     *
  99     * The exact semantics of depth varies according to the texture target:
 100     *    - For GL_TEXTURE_CUBE_MAP, depth is 6.
 101     *    - For GL_TEXTURE_2D_ARRAY, depth is the number of array slices. It is
 102     *      identical for all miplevels in the texture.
 103     *    - For GL_TEXTURE_3D, it is the texture's depth at this miplevel. Its
 104     *      value, like width and height, varies with miplevel.
 105     *    - For other texture types, depth is 1.
 106     */
 107    GLuint depth;
 108
 109    /**
 110     * \brief List of 2D images in this mipmap level.
 111     *
 112     * This may be a list of cube faces, array slices in 2D array texture, or
 113     * layers in a 3D texture. The list's length is \c depth.
 114     */
 115    struct intel_mipmap_slice {
 116       /**
 117        * \name Offset to slice
 118        * \{
 119        *
 120        * Hardware formats are so diverse that that there is no unified way to
 121        * compute the slice offsets, so we store them in this table.
 122        *
 123        * The (x, y) offset to slice \c s at level \c l relative the miptrees
 124        * base address is
 125        * \code
 126        *     x = mt->level[l].slice[s].x_offset
 127        *     y = mt->level[l].slice[s].y_offset
 128        */
 129       GLuint x_offset;
 130       GLuint y_offset;
 131       /** \} */
 132
 133       /**
 134        * Mapping information. Persistent for the duration of
 135        * intel_miptree_map/unmap on this slice.
 136        */
 137       struct intel_miptree_map *map;
 138    } *slice;
 139 };
 140
 141 /**
 142  * Enum for keeping track of the different MSAA layouts supported by Gen7.
 143  */
 144 enum intel_msaa_layout
 145 {
 146    /**
 147     * Ordinary surface with no MSAA.
 148     */
 149    INTEL_MSAA_LAYOUT_NONE,
 150
 151    /**
 152     * Interleaved Multisample Surface.  The additional samples are
 153     * accommodated by scaling up the width and the height of the surface so
 154     * that all the samples corresponding to a pixel are located at nearby
 155     * memory locations.
 156     */
 157    INTEL_MSAA_LAYOUT_IMS,
 158
 159    /**
 160     * Uncompressed Multisample Surface.  The surface is stored as a 2D array,
 161     * with array slice n containing all pixel data for sample n.
 162     */
 163    INTEL_MSAA_LAYOUT_UMS,
 164
 165    /**
 166     * Compressed Multisample Surface.  The surface is stored as in
 167     * INTEL_MSAA_LAYOUT_UMS, but there is an additional buffer called the MCS
 168     * (Multisample Control Surface) buffer.  Each pixel in the MCS buffer
 169     * indicates the mapping from sample number to array slice.  This allows
 170     * the common case (where all samples constituting a pixel have the same
 171     * color value) to be stored efficiently by just using a single array
 172     * slice.
 173     */
 174    INTEL_MSAA_LAYOUT_CMS,
 175 };
 176
 177 struct intel_mipmap_tree
 178 {
 179    /* Effectively the key:
 180     */
 181    GLenum target;
 182
 183    /**
 184     * Generally, this is just the same as the gl_texture_image->TexFormat or
 185     * gl_renderbuffer->Format.
 186     *
 187     * However, for textures and renderbuffers with packed depth/stencil formats
 188     * on hardware where we want or need to use separate stencil, there will be
 189     * two miptrees for storing the data.  If the depthstencil texture or rb is
 190     * MESA_FORMAT_Z32_FLOAT_X24S8, then mt->format will be
 191     * MESA_FORMAT_Z32_FLOAT, otherwise for MESA_FORMAT_S8_Z24 objects it will be
 192     * MESA_FORMAT_X8_Z24.
 193     *
 194     * For ETC1 textures, this is MESA_FORMAT_RGBX8888_REV if the hardware
 195     * lacks support for ETC1. See @ref wraps_etc1.
 196     */
 197    gl_format format;
 198
 199    /**
 200     * The X offset of each image in the miptree must be aligned to this. See
 201     * the "Alignment Unit Size" section of the BSpec.
 202     */
 203    unsigned int align_w;
 204    unsigned int align_h; /**< \see align_w */
 205
 206    GLuint first_level;
 207    GLuint last_level;
 208
 209    GLuint width0, height0, depth0; /**< Level zero image dimensions */
 210    GLuint cpp;
 211    GLuint num_samples;
 212    bool compressed;
 213
 214    /**
 215     * For 1D array, 2D array, cube, and 2D multisampled surfaces on Gen7: true
 216     * if the surface only contains LOD 0, and hence no space is for LOD's
 217     * other than 0 in between array slices.
 218     *
 219     * Corresponds to the surface_array_spacing bit in gen7_surface_state.
 220     */
 221    bool array_spacing_lod0;
 222
 223    /**
 224     * MSAA layout used by this buffer.
 225     */
 226    enum intel_msaa_layout msaa_layout;
 227
 228    /* Derived from the above:
 229     */
 230    GLuint total_width;
 231    GLuint total_height;
 232
 233    /* The 3DSTATE_CLEAR_PARAMS value associated with the last depth clear to
 234     * this depth mipmap tree, if any.
 235     */
 236    uint32_t depth_clear_value;
 237
 238    /* Includes image offset tables:
 239     */
 240    struct intel_mipmap_level level[MAX_TEXTURE_LEVELS];
 241
 242    /* The data is held here:
 243     */
 244    struct intel_region *region;
 245
 246    /* Offset into region bo where miptree starts:
 247     */
 248    uint32_t offset;
 249
 250    /**
 251     * \brief Singlesample miptree.
 252     *
 253     * This is used under two cases.
 254     *
 255     * --- Case 1: As persistent singlesample storage for multisample window
 256     *  system front and back buffers ---
 257     *
 258     * Suppose that the window system FBO was created with a multisample
 259     * config.  Let `back_irb` be the `intel_renderbuffer` for the FBO's back
 260     * buffer. Then `back_irb` contains two miptrees: a parent multisample
 261     * miptree (back_irb->mt) and a child singlesample miptree
 262     * (back_irb->mt->singlesample_mt).  The DRM buffer shared with DRI2
 263     * belongs to `back_irb->mt->singlesample_mt` and contains singlesample
 264     * data.  The singlesample miptree is created at the same time as and
 265     * persists for the lifetime of its parent multisample miptree.
 266     *
 267     * When access to the singlesample data is needed, such as at
 268     * eglSwapBuffers and glReadPixels, an automatic downsample occurs from
 269     * `back_rb->mt` to `back_rb->mt->singlesample_mt` when necessary.
 270     *
 271     * This description of the back buffer applies analogously to the front
 272     * buffer.
 273     *
 274     *
 275     * --- Case 2: As temporary singlesample storage for mapping multisample
 276     *  miptrees ---
 277     *
 278     * Suppose the intel_miptree_map is called on a multisample miptree, `mt`,
 279     * for which case 1 does not apply (that is, `mt` does not belong to
 280     * a front or back buffer).  Then `mt->singlesample_mt` is null at the
 281     * start of the call. intel_miptree_map will create a temporary
 282     * singlesample miptree, store it at `mt->singlesample_mt`, downsample from
 283     * `mt` to `mt->singlesample_mt` if necessary, then map
 284     * `mt->singlesample_mt`. The temporary miptree is later deleted during
 285     * intel_miptree_unmap.
 286     */
 287    struct intel_mipmap_tree *singlesample_mt;
 288
 289    /**
 290     * \brief A downsample is needed from this miptree to singlesample_mt.
 291     */
 292    bool need_downsample;
 293
 294    /**
 295     * \brief HiZ miptree
 296     *
 297     * This is non-null only if HiZ is enabled for this miptree.
 298     *
 299     * \see intel_miptree_alloc_hiz()
 300     */
 301    struct intel_mipmap_tree *hiz_mt;
 302
 303    /**
 304     * \brief Map of miptree slices to needed resolves.
 305     *
 306     * This is used only when the miptree has a child HiZ miptree.
 307     *
 308     * Let \c mt be a depth miptree with HiZ enabled. Then the resolve map is
 309     * \c mt->hiz_map. The resolve map of the child HiZ miptree, \c
 310     * mt->hiz_mt->hiz_map, is unused.
 311     */
 312    struct intel_resolve_map hiz_map;
 313
 314    /**
 315     * \brief Stencil miptree for depthstencil textures.
 316     *
 317     * This miptree is used for depthstencil textures and renderbuffers that
 318     * require separate stencil.  It always has the true copy of the stencil
 319     * bits, regardless of mt->format.
 320     *
 321     * \see intel_miptree_map_depthstencil()
 322     * \see intel_miptree_unmap_depthstencil()
 323     */
 324    struct intel_mipmap_tree *stencil_mt;
 325
 326    /**
 327     * \brief MCS miptree for multisampled textures.
 328     *
 329     * This miptree contains the "multisample control surface", which stores
 330     * the necessary information to implement compressed MSAA on Gen7+
 331     * (INTEL_MSAA_FORMAT_CMS).
 332     */
 333    struct intel_mipmap_tree *mcs_mt;
 334
 335    /**
 336     * \brief The miptree contains RGBX data that was originally ETC1 data.
 337     *
 338     * On hardware that lacks support for ETC1 textures, we do the
 339     * following on calls to glCompressedTexImage2D(GL_ETC1_RGB8_OES):
 340     *   1. Create a miptree whose format is MESA_FORMAT_RGBX8888_REV with
 341     *      the wraps_etc1 flag set.
 342     *   2. Translate the ETC1 data into RGBX.
 343     *   3. Store the RGBX data into the miptree and discard the ETC1 data.
 344     */
 345    bool wraps_etc1;
 346
 347    /* These are also refcounted:
 348     */
 349    GLuint refcount;
 350 };
 351
 352
 353
 354 struct intel_mipmap_tree *intel_miptree_create(struct intel_context *intel,
 355                                                GLenum target,
 356                                                gl_format format,
 357                                                GLuint first_level,
 358                                                GLuint last_level,
 359                                                GLuint width0,
 360                                                GLuint height0,
 361                                                GLuint depth0,
 362                                                bool expect_accelerated_upload,
 363                                                GLuint num_samples,
 364                                                enum intel_msaa_layout msaa_layout);
 365
 366 struct intel_mipmap_tree *
 367 intel_miptree_create_for_region(struct intel_context *intel,
 368                                 GLenum target,
 369                                 gl_format format,
 370                                 struct intel_region *region);
 371
 372 struct intel_mipmap_tree*
 373 intel_miptree_create_for_dri2_buffer(struct intel_context *intel,
 374                                      unsigned dri_attachment,
 375                                      gl_format format,
 376                                      uint32_t num_samples,
 377                                      struct intel_region *region);
 378
 379 /**
 380  * Create a miptree appropriate as the storage for a non-texture renderbuffer.
 381  * The miptree has the following properties:
 382  *     - The target is GL_TEXTURE_2D.
 383  *     - There are no levels other than the base level 0.
 384  *     - Depth is 1.
 385  */
 386 struct intel_mipmap_tree*
 387 intel_miptree_create_for_renderbuffer(struct intel_context *intel,
 388                                       gl_format format,
 389                                       uint32_t width,
 390                                       uint32_t height,
 391                                       uint32_t num_samples);
 392
 393 /** \brief Assert that the level and layer are valid for the miptree. */
 394 static inline void
 395 intel_miptree_check_level_layer(struct intel_mipmap_tree *mt,
 396                                 uint32_t level,
 397                                 uint32_t layer)
 398 {
 399    assert(level >= mt->first_level);
 400    assert(level <= mt->last_level);
 401    assert(layer < mt->level[level].depth);
 402 }
 403
 404 int intel_miptree_pitch_align (struct intel_context *intel,
 405                                struct intel_mipmap_tree *mt,
 406                                uint32_t tiling,
 407                                int pitch);
 408
 409 void intel_miptree_reference(struct intel_mipmap_tree **dst,
 410                              struct intel_mipmap_tree *src);
 411
 412 void intel_miptree_release(struct intel_mipmap_tree **mt);
 413
 414 /* Check if an image fits an existing mipmap tree layout
 415  */
 416 bool intel_miptree_match_image(struct intel_mipmap_tree *mt,
 417                                     struct gl_texture_image *image);
 418
 419 void
 420 intel_miptree_get_image_offset(struct intel_mipmap_tree *mt,
 421                                GLuint level, GLuint face, GLuint depth,
 422                                GLuint *x, GLuint *y);
 423
 424 void
 425 intel_miptree_get_dimensions_for_image(struct gl_texture_image *image,
 426                                        int *width, int *height, int *depth);
 427
 428 void intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
 429                                   GLuint level,
 430                                   GLuint x, GLuint y,
 431                                   GLuint w, GLuint h, GLuint d);
 432
 433 void intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
 434                                     GLuint level,
 435                                     GLuint img, GLuint x, GLuint y);
 436
 437 void
 438 intel_miptree_copy_teximage(struct intel_context *intel,
 439                             struct intel_texture_image *intelImage,
 440                             struct intel_mipmap_tree *dst_mt);
 441
 442 /**
 443  * Copy the stencil data from \c mt->stencil_mt->region to \c mt->region for
 444  * the given miptree slice.
 445  *
 446  * \see intel_mipmap_tree::stencil_mt
 447  */
 448 void
 449 intel_miptree_s8z24_scatter(struct intel_context *intel,
 450                             struct intel_mipmap_tree *mt,
 451                             uint32_t level,
 452                             uint32_t slice);
 453
 454 /**
 455  * Copy the stencil data in \c mt->stencil_mt->region to \c mt->region for the
 456  * given miptree slice.
 457  *
 458  * \see intel_mipmap_tree::stencil_mt
 459  */
 460 void
 461 intel_miptree_s8z24_gather(struct intel_context *intel,
 462                            struct intel_mipmap_tree *mt,
 463                            uint32_t level,
 464                            uint32_t layer);
 465
 466 bool
 467 intel_miptree_alloc_mcs(struct intel_context *intel,
 468                         struct intel_mipmap_tree *mt,
 469                         GLuint num_samples);
 470
 471 /**
 472  * \name Miptree HiZ functions
 473  * \{
 474  *
 475  * It is safe to call the "slice_set_need_resolve" and "slice_resolve"
 476  * functions on a miptree without HiZ. In that case, each function is a no-op.
 477  */
 478
 479 /**
 480  * \brief Allocate the miptree's embedded HiZ miptree.
 481  * \see intel_mipmap_tree:hiz_mt
 482  * \return false if allocation failed
 483  */
 484
 485 bool
 486 intel_miptree_alloc_hiz(struct intel_context *intel,
 487                         struct intel_mipmap_tree *mt,
 488                         GLuint num_samples);
 489
 490 void
 491 intel_miptree_slice_set_needs_hiz_resolve(struct intel_mipmap_tree *mt,
 492                                           uint32_t level,
 493                                           uint32_t depth);
 494 void
 495 intel_miptree_slice_set_needs_depth_resolve(struct intel_mipmap_tree *mt,
 496                                             uint32_t level,
 497                                             uint32_t depth);
 498 void
 499 intel_miptree_all_slices_set_need_hiz_resolve(struct intel_mipmap_tree *mt);
 500
 501 void
 502 intel_miptree_all_slices_set_need_depth_resolve(struct intel_mipmap_tree *mt);
 503
 504 /**
 505  * \return false if no resolve was needed
 506  */
 507 bool
 508 intel_miptree_slice_resolve_hiz(struct intel_context *intel,
 509                                 struct intel_mipmap_tree *mt,
 510                                 unsigned int level,
 511                                 unsigned int depth);
 512
 513 /**
 514  * \return false if no resolve was needed
 515  */
 516 bool
 517 intel_miptree_slice_resolve_depth(struct intel_context *intel,
 518                                   struct intel_mipmap_tree *mt,
 519                                   unsigned int level,
 520                                   unsigned int depth);
 521
 522 /**
 523  * \return false if no resolve was needed
 524  */
 525 bool
 526 intel_miptree_all_slices_resolve_hiz(struct intel_context *intel,
 527                                      struct intel_mipmap_tree *mt);
 528
 529 /**
 530  * \return false if no resolve was needed
 531  */
 532 bool
 533 intel_miptree_all_slices_resolve_depth(struct intel_context *intel,
 534                                        struct intel_mipmap_tree *mt);
 535
 536 /**\}*/
 537
 538 void
 539 intel_miptree_downsample(struct intel_context *intel,
 540                          struct intel_mipmap_tree *mt);
 541
 542 void
 543 intel_miptree_upsample(struct intel_context *intel,
 544                        struct intel_mipmap_tree *mt);
 545
 546 /* i915_mipmap_tree.c:
 547  */
 548 void i915_miptree_layout(struct intel_mipmap_tree *mt);
 549 void i945_miptree_layout(struct intel_mipmap_tree *mt);
 550 void brw_miptree_layout(struct intel_context *intel,
 551                         struct intel_mipmap_tree *mt);
 552
 553 void
 554 intel_miptree_map(struct intel_context *intel,
 555                   struct intel_mipmap_tree *mt,
 556                   unsigned int level,
 557                   unsigned int slice,
 558                   unsigned int x,
 559                   unsigned int y,
 560                   unsigned int w,
 561                   unsigned int h,
 562                   GLbitfield mode,
 563                   void **out_ptr,
 564                   int *out_stride);
 565
 566 void
 567 intel_miptree_unmap(struct intel_context *intel,
 568                     struct intel_mipmap_tree *mt,
 569                     unsigned int level,
 570                     unsigned int slice);
 571
 572 #ifdef I915
 573 static inline void
 574 intel_hiz_exec(struct intel_context *intel, struct intel_mipmap_tree *mt,
 575                unsigned int level, unsigned int layer, enum gen6_hiz_op op)
 576 {
 577    /* Stub on i915.  It would be nice if we didn't execute resolve code at all
 578     * there.
 579     */
 580 }
 581 #else
 582 void
 583 intel_hiz_exec(struct intel_context *intel, struct intel_mipmap_tree *mt,
 584                unsigned int level, unsigned int layer, enum gen6_hiz_op op);
 585 #endif
 586
 587 #ifdef __cplusplus
 588 }
 589 #endif
 590
 591 #endif