Merge branch 'mesa_7_5_branch'
[mesa.git] / src / mesa / drivers / dri / intel / intel_reg.h
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #define CMD_MI (0x0 << 29)
29 #define CMD_2D (0x2 << 29)
30 #define CMD_3D (0x3 << 29)
31
32 #define MI_NOOP (CMD_MI | 0)
33
34 #define MI_BATCH_BUFFER_END (CMD_MI | 0xA << 23)
35
36 #define MI_FLUSH (CMD_MI | (4 << 23))
37 #define FLUSH_MAP_CACHE (1 << 0)
38 #define INHIBIT_FLUSH_RENDER_CACHE (1 << 2)
39
40 /* Stalls command execution waiting for the given events to have occurred. */
41 #define MI_WAIT_FOR_EVENT (CMD_MI | (0x3 << 23))
42 #define MI_WAIT_FOR_PLANE_B_FLIP (1<<6)
43 #define MI_WAIT_FOR_PLANE_A_FLIP (1<<2)
44
45 /* p189 */
46 #define _3DSTATE_LOAD_STATE_IMMEDIATE_1 (CMD_3D | (0x1d<<24) | (0x04<<16))
47 #define I1_LOAD_S(n) (1<<(4+n))
48
49 #define _3DSTATE_DRAWRECT_INFO (CMD_3D | (0x1d<<24) | (0x80<<16) | 0x3)
50 #define _3DSTATE_DRAWRECT_INFO_I965 (CMD_3D | (3 << 27) | (1 << 24) | 0x2)
51
52 /** @{
53 *
54 * PIPE_CONTROL operation, a combination MI_FLUSH and register write with
55 * additional flushing control.
56 */
57 #define _3DSTATE_PIPE_CONTROL (CMD_3D | (3 << 27) | (2 << 24) | 2)
58 #define PIPE_CONTROL_NO_WRITE (0 << 14)
59 #define PIPE_CONTROL_WRITE_IMMEDIATE (1 << 14)
60 #define PIPE_CONTROL_WRITE_DEPTH_COUNT (2 << 14)
61 #define PIPE_CONTROL_WRITE_TIMESTAMP (3 << 14)
62 #define PIPE_CONTROL_DEPTH_STALL (1 << 13)
63 #define PIPE_CONTROL_WRITE_FLUSH (1 << 12)
64 #define PIPE_CONTROL_INSTRUCTION_FLUSH (1 << 11)
65 #define PIPE_CONTROL_INTERRUPT_ENABLE (1 << 8)
66 #define PIPE_CONTROL_PPGTT_WRITE (0 << 2)
67 #define PIPE_CONTROL_GLOBAL_GTT_WRITE (1 << 2)
68
69 /** @} */
70
71 /** @{
72 * 915 definitions
73 */
74 #define S0_VB_OFFSET_MASK 0xffffffc0
75 #define S0_AUTO_CACHE_INV_DISABLE (1<<0)
76 /** @} */
77
78 /** @{
79 * 830 definitions
80 */
81 #define S0_VB_OFFSET_MASK_830 0xffffff80
82 #define S0_VB_PITCH_SHIFT_830 1
83 #define S0_VB_ENABLE_830 (1<<0)
84 /** @} */
85
86 #define S1_VERTEX_WIDTH_SHIFT 24
87 #define S1_VERTEX_WIDTH_MASK (0x3f<<24)
88 #define S1_VERTEX_PITCH_SHIFT 16
89 #define S1_VERTEX_PITCH_MASK (0x3f<<16)
90
91 #define TEXCOORDFMT_2D 0x0
92 #define TEXCOORDFMT_3D 0x1
93 #define TEXCOORDFMT_4D 0x2
94 #define TEXCOORDFMT_1D 0x3
95 #define TEXCOORDFMT_2D_16 0x4
96 #define TEXCOORDFMT_4D_16 0x5
97 #define TEXCOORDFMT_NOT_PRESENT 0xf
98 #define S2_TEXCOORD_FMT0_MASK 0xf
99 #define S2_TEXCOORD_FMT1_SHIFT 4
100 #define S2_TEXCOORD_FMT(unit, type) ((type)<<(unit*4))
101 #define S2_TEXCOORD_NONE (~0)
102 #define S2_TEX_COUNT_SHIFT_830 12
103 #define S2_VERTEX_1_WIDTH_SHIFT_830 0
104 #define S2_VERTEX_0_WIDTH_SHIFT_830 6
105 /* S3 not interesting */
106
107 #define S4_POINT_WIDTH_SHIFT 23
108 #define S4_POINT_WIDTH_MASK (0x1ff<<23)
109 #define S4_LINE_WIDTH_SHIFT 19
110 #define S4_LINE_WIDTH_ONE (0x2<<19)
111 #define S4_LINE_WIDTH_MASK (0xf<<19)
112 #define S4_FLATSHADE_ALPHA (1<<18)
113 #define S4_FLATSHADE_FOG (1<<17)
114 #define S4_FLATSHADE_SPECULAR (1<<16)
115 #define S4_FLATSHADE_COLOR (1<<15)
116 #define S4_CULLMODE_BOTH (0<<13)
117 #define S4_CULLMODE_NONE (1<<13)
118 #define S4_CULLMODE_CW (2<<13)
119 #define S4_CULLMODE_CCW (3<<13)
120 #define S4_CULLMODE_MASK (3<<13)
121 #define S4_VFMT_POINT_WIDTH (1<<12)
122 #define S4_VFMT_SPEC_FOG (1<<11)
123 #define S4_VFMT_COLOR (1<<10)
124 #define S4_VFMT_DEPTH_OFFSET (1<<9)
125 #define S4_VFMT_XYZ (1<<6)
126 #define S4_VFMT_XYZW (2<<6)
127 #define S4_VFMT_XY (3<<6)
128 #define S4_VFMT_XYW (4<<6)
129 #define S4_VFMT_XYZW_MASK (7<<6)
130 #define S4_FORCE_DEFAULT_DIFFUSE (1<<5)
131 #define S4_FORCE_DEFAULT_SPECULAR (1<<4)
132 #define S4_LOCAL_DEPTH_OFFSET_ENABLE (1<<3)
133 #define S4_VFMT_FOG_PARAM (1<<2)
134 #define S4_SPRITE_POINT_ENABLE (1<<1)
135 #define S4_LINE_ANTIALIAS_ENABLE (1<<0)
136
137 #define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH | \
138 S4_VFMT_SPEC_FOG | \
139 S4_VFMT_COLOR | \
140 S4_VFMT_DEPTH_OFFSET | \
141 S4_VFMT_XYZW_MASK | \
142 S4_VFMT_FOG_PARAM)
143
144
145 #define S5_WRITEDISABLE_ALPHA (1<<31)
146 #define S5_WRITEDISABLE_RED (1<<30)
147 #define S5_WRITEDISABLE_GREEN (1<<29)
148 #define S5_WRITEDISABLE_BLUE (1<<28)
149 #define S5_WRITEDISABLE_MASK (0xf<<28)
150 #define S5_FORCE_DEFAULT_POINT_SIZE (1<<27)
151 #define S5_LAST_PIXEL_ENABLE (1<<26)
152 #define S5_GLOBAL_DEPTH_OFFSET_ENABLE (1<<25)
153 #define S5_FOG_ENABLE (1<<24)
154 #define S5_STENCIL_REF_SHIFT 16
155 #define S5_STENCIL_REF_MASK (0xff<<16)
156 #define S5_STENCIL_TEST_FUNC_SHIFT 13
157 #define S5_STENCIL_TEST_FUNC_MASK (0x7<<13)
158 #define S5_STENCIL_FAIL_SHIFT 10
159 #define S5_STENCIL_FAIL_MASK (0x7<<10)
160 #define S5_STENCIL_PASS_Z_FAIL_SHIFT 7
161 #define S5_STENCIL_PASS_Z_FAIL_MASK (0x7<<7)
162 #define S5_STENCIL_PASS_Z_PASS_SHIFT 4
163 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4)
164 #define S5_STENCIL_WRITE_ENABLE (1<<3)
165 #define S5_STENCIL_TEST_ENABLE (1<<2)
166 #define S5_COLOR_DITHER_ENABLE (1<<1)
167 #define S5_LOGICOP_ENABLE (1<<0)
168
169
170 #define S6_ALPHA_TEST_ENABLE (1<<31)
171 #define S6_ALPHA_TEST_FUNC_SHIFT 28
172 #define S6_ALPHA_TEST_FUNC_MASK (0x7<<28)
173 #define S6_ALPHA_REF_SHIFT 20
174 #define S6_ALPHA_REF_MASK (0xff<<20)
175 #define S6_DEPTH_TEST_ENABLE (1<<19)
176 #define S6_DEPTH_TEST_FUNC_SHIFT 16
177 #define S6_DEPTH_TEST_FUNC_MASK (0x7<<16)
178 #define S6_CBUF_BLEND_ENABLE (1<<15)
179 #define S6_CBUF_BLEND_FUNC_SHIFT 12
180 #define S6_CBUF_BLEND_FUNC_MASK (0x7<<12)
181 #define S6_CBUF_SRC_BLEND_FACT_SHIFT 8
182 #define S6_CBUF_SRC_BLEND_FACT_MASK (0xf<<8)
183 #define S6_CBUF_DST_BLEND_FACT_SHIFT 4
184 #define S6_CBUF_DST_BLEND_FACT_MASK (0xf<<4)
185 #define S6_DEPTH_WRITE_ENABLE (1<<3)
186 #define S6_COLOR_WRITE_ENABLE (1<<2)
187 #define S6_TRISTRIP_PV_SHIFT 0
188 #define S6_TRISTRIP_PV_MASK (0x3<<0)
189
190 #define S7_DEPTH_OFFSET_CONST_MASK ~0
191
192 /* p143 */
193 #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
194 /* Dword 1 */
195 #define BUF_3D_ID_COLOR_BACK (0x3<<24)
196 #define BUF_3D_ID_DEPTH (0x7<<24)
197 #define BUF_3D_USE_FENCE (1<<23)
198 #define BUF_3D_TILED_SURFACE (1<<22)
199 #define BUF_3D_TILE_WALK_X 0
200 #define BUF_3D_TILE_WALK_Y (1<<21)
201 #define BUF_3D_PITCH(x) (((x)/4)<<2)
202 /* Dword 2 */
203 #define BUF_3D_ADDR(x) ((x) & ~0x3)
204
205 /* Primitive dispatch on 830-945 */
206 #define _3DPRIMITIVE (CMD_3D | (0x1f << 24))
207 #define PRIM_INDIRECT (1<<23)
208 #define PRIM_INLINE (0<<23)
209 #define PRIM_INDIRECT_SEQUENTIAL (0<<17)
210 #define PRIM_INDIRECT_ELTS (1<<17)
211
212 #define PRIM3D_TRILIST (0x0<<18)
213 #define PRIM3D_TRISTRIP (0x1<<18)
214 #define PRIM3D_TRISTRIP_RVRSE (0x2<<18)
215 #define PRIM3D_TRIFAN (0x3<<18)
216 #define PRIM3D_POLY (0x4<<18)
217 #define PRIM3D_LINELIST (0x5<<18)
218 #define PRIM3D_LINESTRIP (0x6<<18)
219 #define PRIM3D_RECTLIST (0x7<<18)
220 #define PRIM3D_POINTLIST (0x8<<18)
221 #define PRIM3D_DIB (0x9<<18)
222 #define PRIM3D_MASK (0x1f<<18)
223
224 #define XY_SETUP_BLT_CMD (CMD_2D | (0x01 << 22) | 6)
225
226 #define XY_COLOR_BLT_CMD (CMD_2D | (0x50 << 22) | 4)
227
228 #define XY_SRC_COPY_BLT_CMD (CMD_2D | (0x53 << 22) | 6)
229
230 #define XY_TEXT_IMMEDIATE_BLIT_CMD (CMD_2D | (0x31 << 22))
231 # define XY_TEXT_BYTE_PACKED (1 << 16)
232
233 /* BR00 */
234 #define XY_BLT_WRITE_ALPHA (1 << 21)
235 #define XY_BLT_WRITE_RGB (1 << 20)
236 #define XY_SRC_TILED (1 << 15)
237 #define XY_DST_TILED (1 << 11)
238
239 /* BR13 */
240 #define BR13_565 (0x1 << 24)
241 #define BR13_8888 (0x3 << 24)
242
243 #define FENCE_LINEAR 0
244 #define FENCE_XMAJOR 1
245 #define FENCE_YMAJOR 2