4d4ddd9798d239ea99e8e517366744dc76806af0
[mesa.git] / src / mesa / drivers / dri / intel / intel_regions.c
1 /**************************************************************************
2 *
3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /* Provide additional functionality on top of bufmgr buffers:
29 * - 2d semantics and blit operations
30 * - refcounting of buffers for multiple images in a buffer.
31 * - refcounting of buffer mappings.
32 * - some logic for moving the buffers to the best memory pools for
33 * given operations.
34 *
35 * Most of this is to make it easier to implement the fixed-layout
36 * mipmap tree required by intel hardware in the face of GL's
37 * programming interface where each image can be specifed in random
38 * order and it isn't clear what layout the tree should have until the
39 * last moment.
40 */
41
42 #include <sys/ioctl.h>
43 #include <errno.h>
44
45 #include "main/hash.h"
46 #include "intel_context.h"
47 #include "intel_regions.h"
48 #include "intel_blit.h"
49 #include "intel_buffer_objects.h"
50 #include "intel_bufmgr.h"
51 #include "intel_batchbuffer.h"
52
53 #define FILE_DEBUG_FLAG DEBUG_REGION
54
55 /* This should be set to the maximum backtrace size desired.
56 * Set it to 0 to disable backtrace debugging.
57 */
58 #define DEBUG_BACKTRACE_SIZE 0
59
60 #if DEBUG_BACKTRACE_SIZE == 0
61 /* Use the standard debug output */
62 #define _DBG(...) DBG(__VA_ARGS__)
63 #else
64 /* Use backtracing debug output */
65 #define _DBG(...) {debug_backtrace(); DBG(__VA_ARGS__);}
66
67 /* Backtracing debug support */
68 #include <execinfo.h>
69
70 static void
71 debug_backtrace(void)
72 {
73 void *trace[DEBUG_BACKTRACE_SIZE];
74 char **strings = NULL;
75 int traceSize;
76 register int i;
77
78 traceSize = backtrace(trace, DEBUG_BACKTRACE_SIZE);
79 strings = backtrace_symbols(trace, traceSize);
80 if (strings == NULL) {
81 DBG("no backtrace:");
82 return;
83 }
84
85 /* Spit out all the strings with a colon separator. Ignore
86 * the first, since we don't really care about the call
87 * to debug_backtrace() itself. Skip until the final "/" in
88 * the trace to avoid really long lines.
89 */
90 for (i = 1; i < traceSize; i++) {
91 char *p = strings[i], *slash = strings[i];
92 while (*p) {
93 if (*p++ == '/') {
94 slash = p;
95 }
96 }
97
98 DBG("%s:", slash);
99 }
100
101 /* Free up the memory, and we're done */
102 free(strings);
103 }
104
105 #endif
106
107
108
109 /* XXX: Thread safety?
110 */
111 GLubyte *
112 intel_region_map(struct intel_context *intel, struct intel_region *region)
113 {
114 intel_flush(&intel->ctx);
115
116 _DBG("%s %p\n", __FUNCTION__, region);
117 if (!region->map_refcount++) {
118 if (region->tiling != I915_TILING_NONE)
119 drm_intel_gem_bo_map_gtt(region->buffer);
120 else
121 drm_intel_bo_map(region->buffer, GL_TRUE);
122 region->map = region->buffer->virtual;
123 }
124
125 return region->map;
126 }
127
128 void
129 intel_region_unmap(struct intel_context *intel, struct intel_region *region)
130 {
131 _DBG("%s %p\n", __FUNCTION__, region);
132 if (!--region->map_refcount) {
133 if (region->tiling != I915_TILING_NONE)
134 drm_intel_gem_bo_unmap_gtt(region->buffer);
135 else
136 drm_intel_bo_unmap(region->buffer);
137 region->map = NULL;
138 }
139 }
140
141 static struct intel_region *
142 intel_region_alloc_internal(struct intel_screen *screen,
143 GLuint cpp,
144 GLuint width, GLuint height, GLuint pitch,
145 uint32_t tiling, drm_intel_bo *buffer)
146 {
147 struct intel_region *region;
148
149 region = calloc(sizeof(*region), 1);
150 if (region == NULL)
151 return region;
152
153 region->cpp = cpp;
154 region->width = width;
155 region->height = height;
156 region->pitch = pitch;
157 region->refcount = 1;
158 region->buffer = buffer;
159 region->tiling = tiling;
160 region->screen = screen;
161
162 _DBG("%s <-- %p\n", __FUNCTION__, region);
163 return region;
164 }
165
166 struct intel_region *
167 intel_region_alloc(struct intel_screen *screen,
168 uint32_t tiling,
169 GLuint cpp, GLuint width, GLuint height,
170 GLboolean expect_accelerated_upload)
171 {
172 drm_intel_bo *buffer;
173 unsigned long flags = 0;
174 unsigned long aligned_pitch;
175 struct intel_region *region;
176
177 if (expect_accelerated_upload)
178 flags |= BO_ALLOC_FOR_RENDER;
179
180 buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "region",
181 width, height, cpp,
182 &tiling, &aligned_pitch, flags);
183 if (buffer == NULL)
184 return NULL;
185
186 region = intel_region_alloc_internal(screen, cpp, width, height,
187 aligned_pitch / cpp, tiling, buffer);
188 if (region == NULL) {
189 drm_intel_bo_unreference(buffer);
190 return NULL;
191 }
192
193 return region;
194 }
195
196 GLboolean
197 intel_region_flink(struct intel_region *region, uint32_t *name)
198 {
199 if (region->name == 0) {
200 if (drm_intel_bo_flink(region->buffer, &region->name))
201 return GL_FALSE;
202
203 _mesa_HashInsert(region->screen->named_regions,
204 region->name, region);
205 }
206
207 *name = region->name;
208
209 return GL_TRUE;
210 }
211
212 struct intel_region *
213 intel_region_alloc_for_handle(struct intel_screen *screen,
214 GLuint cpp,
215 GLuint width, GLuint height, GLuint pitch,
216 GLuint handle, const char *name)
217 {
218 struct intel_region *region, *dummy;
219 drm_intel_bo *buffer;
220 int ret;
221 uint32_t bit_6_swizzle, tiling;
222
223 region = _mesa_HashLookup(screen->named_regions, handle);
224 if (region != NULL) {
225 dummy = NULL;
226 if (region->width != width || region->height != height ||
227 region->cpp != cpp || region->pitch != pitch) {
228 fprintf(stderr,
229 "Region for name %d already exists but is not compatible\n",
230 handle);
231 return NULL;
232 }
233 intel_region_reference(&dummy, region);
234 return dummy;
235 }
236
237 buffer = intel_bo_gem_create_from_name(screen->bufmgr, name, handle);
238 if (buffer == NULL)
239 return NULL;
240 ret = drm_intel_bo_get_tiling(buffer, &tiling, &bit_6_swizzle);
241 if (ret != 0) {
242 fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
243 handle, name, strerror(-ret));
244 drm_intel_bo_unreference(buffer);
245 return NULL;
246 }
247
248 region = intel_region_alloc_internal(screen, cpp,
249 width, height, pitch, tiling, buffer);
250 if (region == NULL) {
251 drm_intel_bo_unreference(buffer);
252 return NULL;
253 }
254
255 region->name = handle;
256 _mesa_HashInsert(screen->named_regions, handle, region);
257
258 return region;
259 }
260
261 void
262 intel_region_reference(struct intel_region **dst, struct intel_region *src)
263 {
264 _DBG("%s: %p(%d) -> %p(%d)\n", __FUNCTION__,
265 *dst, *dst ? (*dst)->refcount : 0, src, src ? src->refcount : 0);
266
267 if (src != *dst) {
268 if (*dst)
269 intel_region_release(dst);
270
271 if (src)
272 src->refcount++;
273 *dst = src;
274 }
275 }
276
277 void
278 intel_region_release(struct intel_region **region_handle)
279 {
280 struct intel_region *region = *region_handle;
281
282 if (region == NULL) {
283 _DBG("%s NULL\n", __FUNCTION__);
284 return;
285 }
286
287 _DBG("%s %p %d\n", __FUNCTION__, region, region->refcount - 1);
288
289 ASSERT(region->refcount > 0);
290 region->refcount--;
291
292 if (region->refcount == 0) {
293 assert(region->map_refcount == 0);
294
295 drm_intel_bo_unreference(region->buffer);
296
297 if (region->name > 0)
298 _mesa_HashRemove(region->screen->named_regions, region->name);
299
300 free(region);
301 }
302 *region_handle = NULL;
303 }
304
305 /*
306 * XXX Move this into core Mesa?
307 */
308 void
309 _mesa_copy_rect(GLubyte * dst,
310 GLuint cpp,
311 GLuint dst_pitch,
312 GLuint dst_x,
313 GLuint dst_y,
314 GLuint width,
315 GLuint height,
316 const GLubyte * src,
317 GLuint src_pitch, GLuint src_x, GLuint src_y)
318 {
319 GLuint i;
320
321 dst_pitch *= cpp;
322 src_pitch *= cpp;
323 dst += dst_x * cpp;
324 src += src_x * cpp;
325 dst += dst_y * dst_pitch;
326 src += src_y * src_pitch;
327 width *= cpp;
328
329 if (width == dst_pitch && width == src_pitch)
330 memcpy(dst, src, height * width);
331 else {
332 for (i = 0; i < height; i++) {
333 memcpy(dst, src, width);
334 dst += dst_pitch;
335 src += src_pitch;
336 }
337 }
338 }
339
340
341 /* Upload data to a rectangular sub-region. Lots of choices how to do this:
342 *
343 * - memcpy by span to current destination
344 * - upload data as new buffer and blit
345 *
346 * Currently always memcpy.
347 */
348 void
349 intel_region_data(struct intel_context *intel,
350 struct intel_region *dst,
351 GLuint dst_offset,
352 GLuint dstx, GLuint dsty,
353 const void *src, GLuint src_pitch,
354 GLuint srcx, GLuint srcy, GLuint width, GLuint height)
355 {
356 _DBG("%s\n", __FUNCTION__);
357
358 if (intel == NULL)
359 return;
360
361 intel_prepare_render(intel);
362
363 _mesa_copy_rect(intel_region_map(intel, dst) + dst_offset,
364 dst->cpp,
365 dst->pitch,
366 dstx, dsty, width, height, src, src_pitch, srcx, srcy);
367
368 intel_region_unmap(intel, dst);
369 }
370
371 /* Copy rectangular sub-regions. Need better logic about when to
372 * push buffers into AGP - will currently do so whenever possible.
373 */
374 GLboolean
375 intel_region_copy(struct intel_context *intel,
376 struct intel_region *dst,
377 GLuint dst_offset,
378 GLuint dstx, GLuint dsty,
379 struct intel_region *src,
380 GLuint src_offset,
381 GLuint srcx, GLuint srcy, GLuint width, GLuint height,
382 GLboolean flip,
383 GLenum logicop)
384 {
385 uint32_t src_pitch = src->pitch;
386
387 _DBG("%s\n", __FUNCTION__);
388
389 if (intel == NULL)
390 return GL_FALSE;
391
392 assert(src->cpp == dst->cpp);
393
394 if (flip)
395 src_pitch = -src_pitch;
396
397 return intelEmitCopyBlit(intel,
398 dst->cpp,
399 src_pitch, src->buffer, src_offset, src->tiling,
400 dst->pitch, dst->buffer, dst_offset, dst->tiling,
401 srcx, srcy, dstx, dsty, width, height,
402 logicop);
403 }
404
405 drm_intel_bo *
406 intel_region_buffer(struct intel_context *intel,
407 struct intel_region *region, GLuint flag)
408 {
409 return region->buffer;
410 }