57ffe611d1b91e84dd83ca4880dd465916ddc0a3
[mesa.git] / src / mesa / drivers / dri / intel / intel_regions.c
1 /**************************************************************************
2 *
3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /* Provide additional functionality on top of bufmgr buffers:
29 * - 2d semantics and blit operations
30 * - refcounting of buffers for multiple images in a buffer.
31 * - refcounting of buffer mappings.
32 * - some logic for moving the buffers to the best memory pools for
33 * given operations.
34 *
35 * Most of this is to make it easier to implement the fixed-layout
36 * mipmap tree required by intel hardware in the face of GL's
37 * programming interface where each image can be specifed in random
38 * order and it isn't clear what layout the tree should have until the
39 * last moment.
40 */
41
42 #include <sys/ioctl.h>
43 #include <errno.h>
44
45 #include "main/hash.h"
46 #include "intel_context.h"
47 #include "intel_regions.h"
48 #include "intel_blit.h"
49 #include "intel_buffer_objects.h"
50 #include "intel_bufmgr.h"
51 #include "intel_batchbuffer.h"
52
53 #define FILE_DEBUG_FLAG DEBUG_REGION
54
55 /* This should be set to the maximum backtrace size desired.
56 * Set it to 0 to disable backtrace debugging.
57 */
58 #define DEBUG_BACKTRACE_SIZE 0
59
60 #if DEBUG_BACKTRACE_SIZE == 0
61 /* Use the standard debug output */
62 #define _DBG(...) DBG(__VA_ARGS__)
63 #else
64 /* Use backtracing debug output */
65 #define _DBG(...) {debug_backtrace(); DBG(__VA_ARGS__);}
66
67 /* Backtracing debug support */
68 #include <execinfo.h>
69
70 static void
71 debug_backtrace(void)
72 {
73 void *trace[DEBUG_BACKTRACE_SIZE];
74 char **strings = NULL;
75 int traceSize;
76 register int i;
77
78 traceSize = backtrace(trace, DEBUG_BACKTRACE_SIZE);
79 strings = backtrace_symbols(trace, traceSize);
80 if (strings == NULL) {
81 DBG("no backtrace:");
82 return;
83 }
84
85 /* Spit out all the strings with a colon separator. Ignore
86 * the first, since we don't really care about the call
87 * to debug_backtrace() itself. Skip until the final "/" in
88 * the trace to avoid really long lines.
89 */
90 for (i = 1; i < traceSize; i++) {
91 char *p = strings[i], *slash = strings[i];
92 while (*p) {
93 if (*p++ == '/') {
94 slash = p;
95 }
96 }
97
98 DBG("%s:", slash);
99 }
100
101 /* Free up the memory, and we're done */
102 free(strings);
103 }
104
105 #endif
106
107
108
109 /* XXX: Thread safety?
110 */
111 GLubyte *
112 intel_region_map(struct intel_context *intel, struct intel_region *region)
113 {
114 intel_flush(&intel->ctx);
115
116 _DBG("%s %p\n", __FUNCTION__, region);
117 if (!region->map_refcount++) {
118 if (region->pbo)
119 intel_region_cow(intel, region);
120
121 if (region->tiling != I915_TILING_NONE)
122 drm_intel_gem_bo_map_gtt(region->buffer);
123 else
124 drm_intel_bo_map(region->buffer, GL_TRUE);
125 region->map = region->buffer->virtual;
126 }
127
128 return region->map;
129 }
130
131 void
132 intel_region_unmap(struct intel_context *intel, struct intel_region *region)
133 {
134 _DBG("%s %p\n", __FUNCTION__, region);
135 if (!--region->map_refcount) {
136 if (region->tiling != I915_TILING_NONE)
137 drm_intel_gem_bo_unmap_gtt(region->buffer);
138 else
139 drm_intel_bo_unmap(region->buffer);
140 region->map = NULL;
141 }
142 }
143
144 static struct intel_region *
145 intel_region_alloc_internal(struct intel_screen *screen,
146 GLuint cpp,
147 GLuint width, GLuint height, GLuint pitch,
148 uint32_t tiling, drm_intel_bo *buffer)
149 {
150 struct intel_region *region;
151
152 if (buffer == NULL) {
153 _DBG("%s <-- NULL\n", __FUNCTION__);
154 return NULL;
155 }
156
157 region = calloc(sizeof(*region), 1);
158 if (region == NULL)
159 return region;
160
161 region->cpp = cpp;
162 region->width = width;
163 region->height = height;
164 region->pitch = pitch;
165 region->refcount = 1;
166 region->buffer = buffer;
167 region->tiling = tiling;
168 region->screen = screen;
169
170 _DBG("%s <-- %p\n", __FUNCTION__, region);
171 return region;
172 }
173
174 struct intel_region *
175 intel_region_alloc(struct intel_screen *screen,
176 uint32_t tiling,
177 GLuint cpp, GLuint width, GLuint height,
178 GLboolean expect_accelerated_upload)
179 {
180 drm_intel_bo *buffer;
181 unsigned long flags = 0;
182 unsigned long aligned_pitch;
183
184 if (expect_accelerated_upload)
185 flags |= BO_ALLOC_FOR_RENDER;
186
187 buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "region",
188 width, height, cpp,
189 &tiling, &aligned_pitch, flags);
190
191 return intel_region_alloc_internal(screen, cpp, width, height,
192 aligned_pitch / cpp, tiling, buffer);
193 }
194
195 struct intel_region *
196 intel_region_alloc_for_handle(struct intel_screen *screen,
197 GLuint cpp,
198 GLuint width, GLuint height, GLuint pitch,
199 GLuint handle, const char *name)
200 {
201 struct intel_region *region, *dummy;
202 drm_intel_bo *buffer;
203 int ret;
204 uint32_t bit_6_swizzle, tiling;
205
206 region = _mesa_HashLookup(screen->named_regions, handle);
207 if (region != NULL) {
208 dummy = NULL;
209 if (region->width != width || region->height != height ||
210 region->cpp != cpp || region->pitch != pitch) {
211 fprintf(stderr,
212 "Region for name %d already exists but is not compatible\n",
213 handle);
214 return NULL;
215 }
216 intel_region_reference(&dummy, region);
217 return dummy;
218 }
219
220 buffer = intel_bo_gem_create_from_name(screen->bufmgr, name, handle);
221 if (buffer == NULL)
222 return NULL;
223 ret = drm_intel_bo_get_tiling(buffer, &tiling, &bit_6_swizzle);
224 if (ret != 0) {
225 fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
226 handle, name, strerror(-ret));
227 drm_intel_bo_unreference(buffer);
228 return NULL;
229 }
230
231 region = intel_region_alloc_internal(screen, cpp,
232 width, height, pitch, tiling, buffer);
233 if (region == NULL) {
234 drm_intel_bo_unreference(buffer);
235 return NULL;
236 }
237
238 region->name = handle;
239 _mesa_HashInsert(screen->named_regions, handle, region);
240
241 return region;
242 }
243
244 void
245 intel_region_reference(struct intel_region **dst, struct intel_region *src)
246 {
247 if (src)
248 _DBG("%s %p %d\n", __FUNCTION__, src, src->refcount);
249
250 assert(*dst == NULL);
251 if (src) {
252 src->refcount++;
253 *dst = src;
254 }
255 }
256
257 void
258 intel_region_release(struct intel_region **region_handle)
259 {
260 struct intel_region *region = *region_handle;
261
262 if (region == NULL) {
263 _DBG("%s NULL\n", __FUNCTION__);
264 return;
265 }
266
267 _DBG("%s %p %d\n", __FUNCTION__, region, region->refcount - 1);
268
269 ASSERT(region->refcount > 0);
270 region->refcount--;
271
272 if (region->refcount == 0) {
273 assert(region->map_refcount == 0);
274
275 if (region->pbo)
276 region->pbo->region = NULL;
277 region->pbo = NULL;
278 drm_intel_bo_unreference(region->buffer);
279
280 if (region->name > 0)
281 _mesa_HashRemove(region->screen->named_regions, region->name);
282
283 free(region);
284 }
285 *region_handle = NULL;
286 }
287
288 /*
289 * XXX Move this into core Mesa?
290 */
291 void
292 _mesa_copy_rect(GLubyte * dst,
293 GLuint cpp,
294 GLuint dst_pitch,
295 GLuint dst_x,
296 GLuint dst_y,
297 GLuint width,
298 GLuint height,
299 const GLubyte * src,
300 GLuint src_pitch, GLuint src_x, GLuint src_y)
301 {
302 GLuint i;
303
304 dst_pitch *= cpp;
305 src_pitch *= cpp;
306 dst += dst_x * cpp;
307 src += src_x * cpp;
308 dst += dst_y * dst_pitch;
309 src += src_y * src_pitch;
310 width *= cpp;
311
312 if (width == dst_pitch && width == src_pitch)
313 memcpy(dst, src, height * width);
314 else {
315 for (i = 0; i < height; i++) {
316 memcpy(dst, src, width);
317 dst += dst_pitch;
318 src += src_pitch;
319 }
320 }
321 }
322
323
324 /* Upload data to a rectangular sub-region. Lots of choices how to do this:
325 *
326 * - memcpy by span to current destination
327 * - upload data as new buffer and blit
328 *
329 * Currently always memcpy.
330 */
331 void
332 intel_region_data(struct intel_context *intel,
333 struct intel_region *dst,
334 GLuint dst_offset,
335 GLuint dstx, GLuint dsty,
336 const void *src, GLuint src_pitch,
337 GLuint srcx, GLuint srcy, GLuint width, GLuint height)
338 {
339 _DBG("%s\n", __FUNCTION__);
340
341 if (intel == NULL)
342 return;
343
344 if (dst->pbo) {
345 if (dstx == 0 &&
346 dsty == 0 && width == dst->pitch && height == dst->height)
347 intel_region_release_pbo(intel, dst);
348 else
349 intel_region_cow(intel, dst);
350 }
351
352 intel_prepare_render(intel);
353
354 _mesa_copy_rect(intel_region_map(intel, dst) + dst_offset,
355 dst->cpp,
356 dst->pitch,
357 dstx, dsty, width, height, src, src_pitch, srcx, srcy);
358
359 intel_region_unmap(intel, dst);
360 }
361
362 /* Copy rectangular sub-regions. Need better logic about when to
363 * push buffers into AGP - will currently do so whenever possible.
364 */
365 GLboolean
366 intel_region_copy(struct intel_context *intel,
367 struct intel_region *dst,
368 GLuint dst_offset,
369 GLuint dstx, GLuint dsty,
370 struct intel_region *src,
371 GLuint src_offset,
372 GLuint srcx, GLuint srcy, GLuint width, GLuint height,
373 GLboolean flip,
374 GLenum logicop)
375 {
376 uint32_t src_pitch = src->pitch;
377
378 _DBG("%s\n", __FUNCTION__);
379
380 if (intel == NULL)
381 return GL_FALSE;
382
383 if (dst->pbo) {
384 if (dstx == 0 &&
385 dsty == 0 && width == dst->pitch && height == dst->height)
386 intel_region_release_pbo(intel, dst);
387 else
388 intel_region_cow(intel, dst);
389 }
390
391 assert(src->cpp == dst->cpp);
392
393 if (flip)
394 src_pitch = -src_pitch;
395
396 return intelEmitCopyBlit(intel,
397 dst->cpp,
398 src_pitch, src->buffer, src_offset, src->tiling,
399 dst->pitch, dst->buffer, dst_offset, dst->tiling,
400 srcx, srcy, dstx, dsty, width, height,
401 logicop);
402 }
403
404 /* Attach to a pbo, discarding our data. Effectively zero-copy upload
405 * the pbo's data.
406 */
407 void
408 intel_region_attach_pbo(struct intel_context *intel,
409 struct intel_region *region,
410 struct intel_buffer_object *pbo)
411 {
412 drm_intel_bo *buffer;
413
414 if (region->pbo == pbo)
415 return;
416
417 _DBG("%s %p %p\n", __FUNCTION__, region, pbo);
418
419 /* If there is already a pbo attached, break the cow tie now.
420 * Don't call intel_region_release_pbo() as that would
421 * unnecessarily allocate a new buffer we would have to immediately
422 * discard.
423 */
424 if (region->pbo) {
425 region->pbo->region = NULL;
426 region->pbo = NULL;
427 }
428
429 if (region->buffer) {
430 drm_intel_bo_unreference(region->buffer);
431 region->buffer = NULL;
432 }
433
434 /* make sure pbo has a buffer of its own */
435 buffer = intel_bufferobj_buffer(intel, pbo, INTEL_WRITE_FULL);
436
437 region->pbo = pbo;
438 region->pbo->region = region;
439 drm_intel_bo_reference(buffer);
440 region->buffer = buffer;
441 region->tiling = I915_TILING_NONE;
442 }
443
444
445 /* Break the COW tie to the pbo and allocate a new buffer.
446 * The pbo gets to keep the data.
447 */
448 void
449 intel_region_release_pbo(struct intel_context *intel,
450 struct intel_region *region)
451 {
452 _DBG("%s %p\n", __FUNCTION__, region);
453 assert(region->buffer == region->pbo->buffer);
454 region->pbo->region = NULL;
455 region->pbo = NULL;
456 drm_intel_bo_unreference(region->buffer);
457 region->buffer = NULL;
458
459 region->buffer = drm_intel_bo_alloc(intel->bufmgr, "region",
460 region->pitch * region->cpp *
461 region->height,
462 64);
463 }
464
465 /* Break the COW tie to the pbo. Both the pbo and the region end up
466 * with a copy of the data.
467 */
468 void
469 intel_region_cow(struct intel_context *intel, struct intel_region *region)
470 {
471 struct intel_buffer_object *pbo = region->pbo;
472 GLboolean ok;
473
474 intel_region_release_pbo(intel, region);
475
476 assert(region->cpp * region->pitch * region->height == pbo->Base.Size);
477
478 _DBG("%s %p (%d bytes)\n", __FUNCTION__, region, pbo->Base.Size);
479
480 /* Now blit from the texture buffer to the new buffer:
481 */
482
483 intel_prepare_render(intel);
484 ok = intelEmitCopyBlit(intel,
485 region->cpp,
486 region->pitch, pbo->buffer, 0, region->tiling,
487 region->pitch, region->buffer, 0, region->tiling,
488 0, 0, 0, 0,
489 region->pitch, region->height,
490 GL_COPY);
491 assert(ok);
492 }
493
494 drm_intel_bo *
495 intel_region_buffer(struct intel_context *intel,
496 struct intel_region *region, GLuint flag)
497 {
498 if (region->pbo) {
499 if (flag == INTEL_WRITE_PART)
500 intel_region_cow(intel, region);
501 else if (flag == INTEL_WRITE_FULL)
502 intel_region_release_pbo(intel, region);
503 }
504
505 return region->buffer;
506 }