intel: Use drm_intel_bo_alloc_tiled for region allocs.
[mesa.git] / src / mesa / drivers / dri / intel / intel_regions.c
1 /**************************************************************************
2 *
3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
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13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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27
28 /* Provide additional functionality on top of bufmgr buffers:
29 * - 2d semantics and blit operations
30 * - refcounting of buffers for multiple images in a buffer.
31 * - refcounting of buffer mappings.
32 * - some logic for moving the buffers to the best memory pools for
33 * given operations.
34 *
35 * Most of this is to make it easier to implement the fixed-layout
36 * mipmap tree required by intel hardware in the face of GL's
37 * programming interface where each image can be specifed in random
38 * order and it isn't clear what layout the tree should have until the
39 * last moment.
40 */
41
42 #include <sys/ioctl.h>
43 #include <errno.h>
44
45 #include "main/hash.h"
46 #include "intel_context.h"
47 #include "intel_regions.h"
48 #include "intel_blit.h"
49 #include "intel_buffer_objects.h"
50 #include "intel_bufmgr.h"
51 #include "intel_batchbuffer.h"
52
53 #define FILE_DEBUG_FLAG DEBUG_REGION
54
55 /* This should be set to the maximum backtrace size desired.
56 * Set it to 0 to disable backtrace debugging.
57 */
58 #define DEBUG_BACKTRACE_SIZE 0
59
60 #if DEBUG_BACKTRACE_SIZE == 0
61 /* Use the standard debug output */
62 #define _DBG(...) DBG(__VA_ARGS__)
63 #else
64 /* Use backtracing debug output */
65 #define _DBG(...) {debug_backtrace(); DBG(__VA_ARGS__);}
66
67 /* Backtracing debug support */
68 #include <execinfo.h>
69
70 static void
71 debug_backtrace(void)
72 {
73 void *trace[DEBUG_BACKTRACE_SIZE];
74 char **strings = NULL;
75 int traceSize;
76 register int i;
77
78 traceSize = backtrace(trace, DEBUG_BACKTRACE_SIZE);
79 strings = backtrace_symbols(trace, traceSize);
80 if (strings == NULL) {
81 DBG("no backtrace:");
82 return;
83 }
84
85 /* Spit out all the strings with a colon separator. Ignore
86 * the first, since we don't really care about the call
87 * to debug_backtrace() itself. Skip until the final "/" in
88 * the trace to avoid really long lines.
89 */
90 for (i = 1; i < traceSize; i++) {
91 char *p = strings[i], *slash = strings[i];
92 while (*p) {
93 if (*p++ == '/') {
94 slash = p;
95 }
96 }
97
98 DBG("%s:", slash);
99 }
100
101 /* Free up the memory, and we're done */
102 free(strings);
103 }
104
105 #endif
106
107
108
109 /* XXX: Thread safety?
110 */
111 GLubyte *
112 intel_region_map(struct intel_context *intel, struct intel_region *region)
113 {
114 intelFlush(&intel->ctx);
115
116 _DBG("%s %p\n", __FUNCTION__, region);
117 if (!region->map_refcount++) {
118 if (region->pbo)
119 intel_region_cow(intel, region);
120
121 if (region->tiling != I915_TILING_NONE &&
122 intel->intelScreen->kernel_exec_fencing)
123 drm_intel_gem_bo_map_gtt(region->buffer);
124 else
125 dri_bo_map(region->buffer, GL_TRUE);
126 region->map = region->buffer->virtual;
127 }
128
129 return region->map;
130 }
131
132 void
133 intel_region_unmap(struct intel_context *intel, struct intel_region *region)
134 {
135 _DBG("%s %p\n", __FUNCTION__, region);
136 if (!--region->map_refcount) {
137 if (region->tiling != I915_TILING_NONE &&
138 intel->intelScreen->kernel_exec_fencing)
139 drm_intel_gem_bo_unmap_gtt(region->buffer);
140 else
141 dri_bo_unmap(region->buffer);
142 region->map = NULL;
143 }
144 }
145
146 static struct intel_region *
147 intel_region_alloc_internal(struct intel_context *intel,
148 GLuint cpp,
149 GLuint width, GLuint height, GLuint pitch,
150 dri_bo *buffer)
151 {
152 struct intel_region *region;
153
154 if (buffer == NULL) {
155 _DBG("%s <-- NULL\n", __FUNCTION__);
156 return NULL;
157 }
158
159 region = calloc(sizeof(*region), 1);
160 region->cpp = cpp;
161 region->width = width;
162 region->height = height;
163 region->pitch = pitch;
164 region->refcount = 1;
165 region->buffer = buffer;
166
167 /* Default to no tiling */
168 region->tiling = I915_TILING_NONE;
169 region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE;
170
171 _DBG("%s <-- %p\n", __FUNCTION__, region);
172 return region;
173 }
174
175 struct intel_region *
176 intel_region_alloc(struct intel_context *intel,
177 uint32_t tiling,
178 GLuint cpp, GLuint width, GLuint height, GLuint pitch,
179 GLboolean expect_accelerated_upload)
180 {
181 dri_bo *buffer;
182 struct intel_region *region;
183 unsigned long flags = 0;
184 unsigned long aligned_pitch;
185
186 if (expect_accelerated_upload)
187 flags |= BO_ALLOC_FOR_RENDER;
188
189 buffer = drm_intel_bo_alloc_tiled(intel->bufmgr, "region",
190 width, height, cpp,
191 &tiling, &aligned_pitch, flags);
192 /* We've already chosen a pitch as part of miptree layout. It had
193 * better be the same.
194 */
195 assert(aligned_pitch == pitch * cpp);
196
197 region = intel_region_alloc_internal(intel, cpp, width, height,
198 pitch, buffer);
199
200 if (tiling != I915_TILING_NONE) {
201 assert(((pitch * cpp) & 127) == 0);
202 drm_intel_bo_set_tiling(buffer, &tiling, pitch * cpp);
203 drm_intel_bo_get_tiling(buffer, &region->tiling, &region->bit_6_swizzle);
204 }
205
206 return region;
207 }
208
209 struct intel_region *
210 intel_region_alloc_for_handle(struct intel_context *intel,
211 GLuint cpp,
212 GLuint width, GLuint height, GLuint pitch,
213 GLuint handle, const char *name)
214 {
215 struct intel_region *region, *dummy;
216 dri_bo *buffer;
217 int ret;
218
219 region = _mesa_HashLookup(intel->intelScreen->named_regions, handle);
220 if (region != NULL) {
221 dummy = NULL;
222 if (region->width != width || region->height != height ||
223 region->cpp != cpp || region->pitch != pitch) {
224 fprintf(stderr,
225 "Region for name %d already exists but is not compatible\n",
226 handle);
227 return NULL;
228 }
229 intel_region_reference(&dummy, region);
230 return dummy;
231 }
232
233 buffer = intel_bo_gem_create_from_name(intel->bufmgr, name, handle);
234
235 region = intel_region_alloc_internal(intel, cpp,
236 width, height, pitch, buffer);
237 if (region == NULL)
238 return region;
239
240 ret = dri_bo_get_tiling(region->buffer, &region->tiling,
241 &region->bit_6_swizzle);
242 if (ret != 0) {
243 fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
244 handle, name, strerror(-ret));
245 intel_region_release(&region);
246 return NULL;
247 }
248
249 region->name = handle;
250 region->screen = intel->intelScreen;
251 _mesa_HashInsert(intel->intelScreen->named_regions, handle, region);
252
253 return region;
254 }
255
256 void
257 intel_region_reference(struct intel_region **dst, struct intel_region *src)
258 {
259 if (src)
260 _DBG("%s %p %d\n", __FUNCTION__, src, src->refcount);
261
262 assert(*dst == NULL);
263 if (src) {
264 src->refcount++;
265 *dst = src;
266 }
267 }
268
269 void
270 intel_region_release(struct intel_region **region_handle)
271 {
272 struct intel_region *region = *region_handle;
273
274 if (region == NULL) {
275 _DBG("%s NULL\n", __FUNCTION__);
276 return;
277 }
278
279 _DBG("%s %p %d\n", __FUNCTION__, region, region->refcount - 1);
280
281 ASSERT(region->refcount > 0);
282 region->refcount--;
283
284 if (region->refcount == 0) {
285 assert(region->map_refcount == 0);
286
287 if (region->pbo)
288 region->pbo->region = NULL;
289 region->pbo = NULL;
290 dri_bo_unreference(region->buffer);
291
292 if (region->name > 0)
293 _mesa_HashRemove(region->screen->named_regions, region->name);
294
295 free(region);
296 }
297 *region_handle = NULL;
298 }
299
300 /*
301 * XXX Move this into core Mesa?
302 */
303 void
304 _mesa_copy_rect(GLubyte * dst,
305 GLuint cpp,
306 GLuint dst_pitch,
307 GLuint dst_x,
308 GLuint dst_y,
309 GLuint width,
310 GLuint height,
311 const GLubyte * src,
312 GLuint src_pitch, GLuint src_x, GLuint src_y)
313 {
314 GLuint i;
315
316 dst_pitch *= cpp;
317 src_pitch *= cpp;
318 dst += dst_x * cpp;
319 src += src_x * cpp;
320 dst += dst_y * dst_pitch;
321 src += src_y * dst_pitch;
322 width *= cpp;
323
324 if (width == dst_pitch && width == src_pitch)
325 memcpy(dst, src, height * width);
326 else {
327 for (i = 0; i < height; i++) {
328 memcpy(dst, src, width);
329 dst += dst_pitch;
330 src += src_pitch;
331 }
332 }
333 }
334
335
336 /* Upload data to a rectangular sub-region. Lots of choices how to do this:
337 *
338 * - memcpy by span to current destination
339 * - upload data as new buffer and blit
340 *
341 * Currently always memcpy.
342 */
343 void
344 intel_region_data(struct intel_context *intel,
345 struct intel_region *dst,
346 GLuint dst_offset,
347 GLuint dstx, GLuint dsty,
348 const void *src, GLuint src_pitch,
349 GLuint srcx, GLuint srcy, GLuint width, GLuint height)
350 {
351 _DBG("%s\n", __FUNCTION__);
352
353 if (intel == NULL)
354 return;
355
356 if (dst->pbo) {
357 if (dstx == 0 &&
358 dsty == 0 && width == dst->pitch && height == dst->height)
359 intel_region_release_pbo(intel, dst);
360 else
361 intel_region_cow(intel, dst);
362 }
363
364 intel_prepare_render(intel);
365
366 _mesa_copy_rect(intel_region_map(intel, dst) + dst_offset,
367 dst->cpp,
368 dst->pitch,
369 dstx, dsty, width, height, src, src_pitch, srcx, srcy);
370
371 intel_region_unmap(intel, dst);
372 }
373
374 /* Copy rectangular sub-regions. Need better logic about when to
375 * push buffers into AGP - will currently do so whenever possible.
376 */
377 GLboolean
378 intel_region_copy(struct intel_context *intel,
379 struct intel_region *dst,
380 GLuint dst_offset,
381 GLuint dstx, GLuint dsty,
382 struct intel_region *src,
383 GLuint src_offset,
384 GLuint srcx, GLuint srcy, GLuint width, GLuint height,
385 GLenum logicop)
386 {
387 _DBG("%s\n", __FUNCTION__);
388
389 if (intel == NULL)
390 return GL_FALSE;
391
392 if (dst->pbo) {
393 if (dstx == 0 &&
394 dsty == 0 && width == dst->pitch && height == dst->height)
395 intel_region_release_pbo(intel, dst);
396 else
397 intel_region_cow(intel, dst);
398 }
399
400 assert(src->cpp == dst->cpp);
401
402 return intelEmitCopyBlit(intel,
403 dst->cpp,
404 src->pitch, src->buffer, src_offset, src->tiling,
405 dst->pitch, dst->buffer, dst_offset, dst->tiling,
406 srcx, srcy, dstx, dsty, width, height,
407 logicop);
408 }
409
410 /* Attach to a pbo, discarding our data. Effectively zero-copy upload
411 * the pbo's data.
412 */
413 void
414 intel_region_attach_pbo(struct intel_context *intel,
415 struct intel_region *region,
416 struct intel_buffer_object *pbo)
417 {
418 dri_bo *buffer;
419
420 if (region->pbo == pbo)
421 return;
422
423 _DBG("%s %p %p\n", __FUNCTION__, region, pbo);
424
425 /* If there is already a pbo attached, break the cow tie now.
426 * Don't call intel_region_release_pbo() as that would
427 * unnecessarily allocate a new buffer we would have to immediately
428 * discard.
429 */
430 if (region->pbo) {
431 region->pbo->region = NULL;
432 region->pbo = NULL;
433 }
434
435 if (region->buffer) {
436 dri_bo_unreference(region->buffer);
437 region->buffer = NULL;
438 }
439
440 /* make sure pbo has a buffer of its own */
441 buffer = intel_bufferobj_buffer(intel, pbo, INTEL_WRITE_FULL);
442
443 region->pbo = pbo;
444 region->pbo->region = region;
445 dri_bo_reference(buffer);
446 region->buffer = buffer;
447 region->tiling = I915_TILING_NONE;
448 }
449
450
451 /* Break the COW tie to the pbo and allocate a new buffer.
452 * The pbo gets to keep the data.
453 */
454 void
455 intel_region_release_pbo(struct intel_context *intel,
456 struct intel_region *region)
457 {
458 _DBG("%s %p\n", __FUNCTION__, region);
459 assert(region->buffer == region->pbo->buffer);
460 region->pbo->region = NULL;
461 region->pbo = NULL;
462 dri_bo_unreference(region->buffer);
463 region->buffer = NULL;
464
465 region->buffer = dri_bo_alloc(intel->bufmgr, "region",
466 region->pitch * region->cpp * region->height,
467 64);
468 }
469
470 /* Break the COW tie to the pbo. Both the pbo and the region end up
471 * with a copy of the data.
472 */
473 void
474 intel_region_cow(struct intel_context *intel, struct intel_region *region)
475 {
476 struct intel_buffer_object *pbo = region->pbo;
477 GLboolean ok;
478
479 intel_region_release_pbo(intel, region);
480
481 assert(region->cpp * region->pitch * region->height == pbo->Base.Size);
482
483 _DBG("%s %p (%d bytes)\n", __FUNCTION__, region, pbo->Base.Size);
484
485 /* Now blit from the texture buffer to the new buffer:
486 */
487
488 intel_prepare_render(intel);
489 ok = intelEmitCopyBlit(intel,
490 region->cpp,
491 region->pitch, pbo->buffer, 0, region->tiling,
492 region->pitch, region->buffer, 0, region->tiling,
493 0, 0, 0, 0,
494 region->pitch, region->height,
495 GL_COPY);
496 assert(ok);
497 }
498
499 dri_bo *
500 intel_region_buffer(struct intel_context *intel,
501 struct intel_region *region, GLuint flag)
502 {
503 if (region->pbo) {
504 if (flag == INTEL_WRITE_PART)
505 intel_region_cow(intel, region);
506 else if (flag == INTEL_WRITE_FULL)
507 intel_region_release_pbo(intel, region);
508 }
509
510 return region->buffer;
511 }