1 /**************************************************************************
3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 /* Provide additional functionality on top of bufmgr buffers:
29 * - 2d semantics and blit operations
30 * - refcounting of buffers for multiple images in a buffer.
31 * - refcounting of buffer mappings.
32 * - some logic for moving the buffers to the best memory pools for
35 * Most of this is to make it easier to implement the fixed-layout
36 * mipmap tree required by intel hardware in the face of GL's
37 * programming interface where each image can be specifed in random
38 * order and it isn't clear what layout the tree should have until the
42 #include <sys/ioctl.h>
45 #include "main/hash.h"
46 #include "intel_context.h"
47 #include "intel_regions.h"
48 #include "intel_blit.h"
49 #include "intel_buffer_objects.h"
50 #include "intel_bufmgr.h"
51 #include "intel_batchbuffer.h"
53 #define FILE_DEBUG_FLAG DEBUG_REGION
55 /* This should be set to the maximum backtrace size desired.
56 * Set it to 0 to disable backtrace debugging.
58 #define DEBUG_BACKTRACE_SIZE 0
60 #if DEBUG_BACKTRACE_SIZE == 0
61 /* Use the standard debug output */
62 #define _DBG(...) DBG(__VA_ARGS__)
64 /* Use backtracing debug output */
65 #define _DBG(...) {debug_backtrace(); DBG(__VA_ARGS__);}
67 /* Backtracing debug support */
73 void *trace
[DEBUG_BACKTRACE_SIZE
];
74 char **strings
= NULL
;
78 traceSize
= backtrace(trace
, DEBUG_BACKTRACE_SIZE
);
79 strings
= backtrace_symbols(trace
, traceSize
);
80 if (strings
== NULL
) {
85 /* Spit out all the strings with a colon separator. Ignore
86 * the first, since we don't really care about the call
87 * to debug_backtrace() itself. Skip until the final "/" in
88 * the trace to avoid really long lines.
90 for (i
= 1; i
< traceSize
; i
++) {
91 char *p
= strings
[i
], *slash
= strings
[i
];
101 /* Free up the memory, and we're done */
109 /* XXX: Thread safety?
112 intel_region_map(struct intel_context
*intel
, struct intel_region
*region
)
114 intelFlush(&intel
->ctx
);
116 _DBG("%s %p\n", __FUNCTION__
, region
);
117 if (!region
->map_refcount
++) {
119 intel_region_cow(intel
, region
);
121 if (region
->tiling
!= I915_TILING_NONE
&&
122 intel
->intelScreen
->kernel_exec_fencing
)
123 drm_intel_gem_bo_map_gtt(region
->buffer
);
125 dri_bo_map(region
->buffer
, GL_TRUE
);
126 region
->map
= region
->buffer
->virtual;
133 intel_region_unmap(struct intel_context
*intel
, struct intel_region
*region
)
135 _DBG("%s %p\n", __FUNCTION__
, region
);
136 if (!--region
->map_refcount
) {
137 if (region
->tiling
!= I915_TILING_NONE
&&
138 intel
->intelScreen
->kernel_exec_fencing
)
139 drm_intel_gem_bo_unmap_gtt(region
->buffer
);
141 dri_bo_unmap(region
->buffer
);
146 static struct intel_region
*
147 intel_region_alloc_internal(struct intel_context
*intel
,
149 GLuint width
, GLuint height
, GLuint pitch
,
152 struct intel_region
*region
;
154 if (buffer
== NULL
) {
155 _DBG("%s <-- NULL\n", __FUNCTION__
);
159 region
= calloc(sizeof(*region
), 1);
161 region
->width
= width
;
162 region
->height
= height
;
163 region
->pitch
= pitch
;
164 region
->refcount
= 1;
165 region
->buffer
= buffer
;
167 /* Default to no tiling */
168 region
->tiling
= I915_TILING_NONE
;
169 region
->bit_6_swizzle
= I915_BIT_6_SWIZZLE_NONE
;
171 _DBG("%s <-- %p\n", __FUNCTION__
, region
);
175 struct intel_region
*
176 intel_region_alloc(struct intel_context
*intel
,
178 GLuint cpp
, GLuint width
, GLuint height
, GLuint pitch
,
179 GLboolean expect_accelerated_upload
)
182 struct intel_region
*region
;
183 unsigned long flags
= 0;
184 unsigned long aligned_pitch
;
186 if (expect_accelerated_upload
)
187 flags
|= BO_ALLOC_FOR_RENDER
;
189 buffer
= drm_intel_bo_alloc_tiled(intel
->bufmgr
, "region",
191 &tiling
, &aligned_pitch
, flags
);
192 /* We've already chosen a pitch as part of miptree layout. It had
193 * better be the same.
195 assert(aligned_pitch
== pitch
* cpp
);
197 region
= intel_region_alloc_internal(intel
, cpp
, width
, height
,
200 if (tiling
!= I915_TILING_NONE
) {
201 assert(((pitch
* cpp
) & 127) == 0);
202 drm_intel_bo_set_tiling(buffer
, &tiling
, pitch
* cpp
);
203 drm_intel_bo_get_tiling(buffer
, ®ion
->tiling
, ®ion
->bit_6_swizzle
);
209 struct intel_region
*
210 intel_region_alloc_for_handle(struct intel_context
*intel
,
212 GLuint width
, GLuint height
, GLuint pitch
,
213 GLuint handle
, const char *name
)
215 struct intel_region
*region
, *dummy
;
219 region
= _mesa_HashLookup(intel
->intelScreen
->named_regions
, handle
);
220 if (region
!= NULL
) {
222 if (region
->width
!= width
|| region
->height
!= height
||
223 region
->cpp
!= cpp
|| region
->pitch
!= pitch
) {
225 "Region for name %d already exists but is not compatible\n",
229 intel_region_reference(&dummy
, region
);
233 buffer
= intel_bo_gem_create_from_name(intel
->bufmgr
, name
, handle
);
235 region
= intel_region_alloc_internal(intel
, cpp
,
236 width
, height
, pitch
, buffer
);
240 ret
= dri_bo_get_tiling(region
->buffer
, ®ion
->tiling
,
241 ®ion
->bit_6_swizzle
);
243 fprintf(stderr
, "Couldn't get tiling of buffer %d (%s): %s\n",
244 handle
, name
, strerror(-ret
));
245 intel_region_release(®ion
);
249 region
->name
= handle
;
250 region
->screen
= intel
->intelScreen
;
251 _mesa_HashInsert(intel
->intelScreen
->named_regions
, handle
, region
);
257 intel_region_reference(struct intel_region
**dst
, struct intel_region
*src
)
260 _DBG("%s %p %d\n", __FUNCTION__
, src
, src
->refcount
);
262 assert(*dst
== NULL
);
270 intel_region_release(struct intel_region
**region_handle
)
272 struct intel_region
*region
= *region_handle
;
274 if (region
== NULL
) {
275 _DBG("%s NULL\n", __FUNCTION__
);
279 _DBG("%s %p %d\n", __FUNCTION__
, region
, region
->refcount
- 1);
281 ASSERT(region
->refcount
> 0);
284 if (region
->refcount
== 0) {
285 assert(region
->map_refcount
== 0);
288 region
->pbo
->region
= NULL
;
290 dri_bo_unreference(region
->buffer
);
292 if (region
->name
> 0)
293 _mesa_HashRemove(region
->screen
->named_regions
, region
->name
);
297 *region_handle
= NULL
;
301 * XXX Move this into core Mesa?
304 _mesa_copy_rect(GLubyte
* dst
,
312 GLuint src_pitch
, GLuint src_x
, GLuint src_y
)
320 dst
+= dst_y
* dst_pitch
;
321 src
+= src_y
* dst_pitch
;
324 if (width
== dst_pitch
&& width
== src_pitch
)
325 memcpy(dst
, src
, height
* width
);
327 for (i
= 0; i
< height
; i
++) {
328 memcpy(dst
, src
, width
);
336 /* Upload data to a rectangular sub-region. Lots of choices how to do this:
338 * - memcpy by span to current destination
339 * - upload data as new buffer and blit
341 * Currently always memcpy.
344 intel_region_data(struct intel_context
*intel
,
345 struct intel_region
*dst
,
347 GLuint dstx
, GLuint dsty
,
348 const void *src
, GLuint src_pitch
,
349 GLuint srcx
, GLuint srcy
, GLuint width
, GLuint height
)
351 _DBG("%s\n", __FUNCTION__
);
358 dsty
== 0 && width
== dst
->pitch
&& height
== dst
->height
)
359 intel_region_release_pbo(intel
, dst
);
361 intel_region_cow(intel
, dst
);
364 intel_prepare_render(intel
);
366 _mesa_copy_rect(intel_region_map(intel
, dst
) + dst_offset
,
369 dstx
, dsty
, width
, height
, src
, src_pitch
, srcx
, srcy
);
371 intel_region_unmap(intel
, dst
);
374 /* Copy rectangular sub-regions. Need better logic about when to
375 * push buffers into AGP - will currently do so whenever possible.
378 intel_region_copy(struct intel_context
*intel
,
379 struct intel_region
*dst
,
381 GLuint dstx
, GLuint dsty
,
382 struct intel_region
*src
,
384 GLuint srcx
, GLuint srcy
, GLuint width
, GLuint height
,
387 _DBG("%s\n", __FUNCTION__
);
394 dsty
== 0 && width
== dst
->pitch
&& height
== dst
->height
)
395 intel_region_release_pbo(intel
, dst
);
397 intel_region_cow(intel
, dst
);
400 assert(src
->cpp
== dst
->cpp
);
402 return intelEmitCopyBlit(intel
,
404 src
->pitch
, src
->buffer
, src_offset
, src
->tiling
,
405 dst
->pitch
, dst
->buffer
, dst_offset
, dst
->tiling
,
406 srcx
, srcy
, dstx
, dsty
, width
, height
,
410 /* Attach to a pbo, discarding our data. Effectively zero-copy upload
414 intel_region_attach_pbo(struct intel_context
*intel
,
415 struct intel_region
*region
,
416 struct intel_buffer_object
*pbo
)
420 if (region
->pbo
== pbo
)
423 _DBG("%s %p %p\n", __FUNCTION__
, region
, pbo
);
425 /* If there is already a pbo attached, break the cow tie now.
426 * Don't call intel_region_release_pbo() as that would
427 * unnecessarily allocate a new buffer we would have to immediately
431 region
->pbo
->region
= NULL
;
435 if (region
->buffer
) {
436 dri_bo_unreference(region
->buffer
);
437 region
->buffer
= NULL
;
440 /* make sure pbo has a buffer of its own */
441 buffer
= intel_bufferobj_buffer(intel
, pbo
, INTEL_WRITE_FULL
);
444 region
->pbo
->region
= region
;
445 dri_bo_reference(buffer
);
446 region
->buffer
= buffer
;
447 region
->tiling
= I915_TILING_NONE
;
451 /* Break the COW tie to the pbo and allocate a new buffer.
452 * The pbo gets to keep the data.
455 intel_region_release_pbo(struct intel_context
*intel
,
456 struct intel_region
*region
)
458 _DBG("%s %p\n", __FUNCTION__
, region
);
459 assert(region
->buffer
== region
->pbo
->buffer
);
460 region
->pbo
->region
= NULL
;
462 dri_bo_unreference(region
->buffer
);
463 region
->buffer
= NULL
;
465 region
->buffer
= dri_bo_alloc(intel
->bufmgr
, "region",
466 region
->pitch
* region
->cpp
* region
->height
,
470 /* Break the COW tie to the pbo. Both the pbo and the region end up
471 * with a copy of the data.
474 intel_region_cow(struct intel_context
*intel
, struct intel_region
*region
)
476 struct intel_buffer_object
*pbo
= region
->pbo
;
479 intel_region_release_pbo(intel
, region
);
481 assert(region
->cpp
* region
->pitch
* region
->height
== pbo
->Base
.Size
);
483 _DBG("%s %p (%d bytes)\n", __FUNCTION__
, region
, pbo
->Base
.Size
);
485 /* Now blit from the texture buffer to the new buffer:
488 intel_prepare_render(intel
);
489 ok
= intelEmitCopyBlit(intel
,
491 region
->pitch
, pbo
->buffer
, 0, region
->tiling
,
492 region
->pitch
, region
->buffer
, 0, region
->tiling
,
494 region
->pitch
, region
->height
,
500 intel_region_buffer(struct intel_context
*intel
,
501 struct intel_region
*region
, GLuint flag
)
504 if (flag
== INTEL_WRITE_PART
)
505 intel_region_cow(intel
, region
);
506 else if (flag
== INTEL_WRITE_FULL
)
507 intel_region_release_pbo(intel
, region
);
510 return region
->buffer
;