1 /**************************************************************************
3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 /* Provide additional functionality on top of bufmgr buffers:
29 * - 2d semantics and blit operations
30 * - refcounting of buffers for multiple images in a buffer.
31 * - refcounting of buffer mappings.
32 * - some logic for moving the buffers to the best memory pools for
35 * Most of this is to make it easier to implement the fixed-layout
36 * mipmap tree required by intel hardware in the face of GL's
37 * programming interface where each image can be specifed in random
38 * order and it isn't clear what layout the tree should have until the
42 #include <sys/ioctl.h>
45 #include "intel_context.h"
46 #include "intel_regions.h"
47 #include "intel_blit.h"
48 #include "intel_buffer_objects.h"
49 #include "intel_bufmgr.h"
50 #include "intel_batchbuffer.h"
51 #include "intel_chipset.h"
53 #define FILE_DEBUG_FLAG DEBUG_REGION
55 /* XXX: Thread safety?
58 intel_region_map(struct intel_context
*intel
, struct intel_region
*region
)
60 DBG("%s\n", __FUNCTION__
);
61 if (!region
->map_refcount
++) {
63 intel_region_cow(intel
, region
);
65 dri_bo_map(region
->buffer
, GL_TRUE
);
66 region
->map
= region
->buffer
->virtual;
73 intel_region_unmap(struct intel_context
*intel
, struct intel_region
*region
)
75 DBG("%s\n", __FUNCTION__
);
76 if (!--region
->map_refcount
) {
77 dri_bo_unmap(region
->buffer
);
82 static struct intel_region
*
83 intel_region_alloc_internal(struct intel_context
*intel
,
85 GLuint width
, GLuint height
, GLuint pitch
,
88 struct intel_region
*region
;
90 DBG("%s\n", __FUNCTION__
);
95 region
= calloc(sizeof(*region
), 1);
97 region
->width
= width
;
98 region
->height
= height
;
99 region
->pitch
= pitch
;
100 region
->refcount
= 1;
101 region
->buffer
= buffer
;
103 /* Default to no tiling */
104 region
->tiling
= I915_TILING_NONE
;
105 region
->bit_6_swizzle
= I915_BIT_6_SWIZZLE_NONE
;
110 struct intel_region
*
111 intel_region_alloc(struct intel_context
*intel
,
112 GLuint cpp
, GLuint width
, GLuint height
, GLuint pitch
)
116 buffer
= dri_bo_alloc(intel
->bufmgr
, "region",
117 pitch
* cpp
* height
, 64);
119 return intel_region_alloc_internal(intel
, cpp
, width
, height
, pitch
, buffer
);
122 struct intel_region
*
123 intel_region_alloc_for_handle(struct intel_context
*intel
,
125 GLuint width
, GLuint height
, GLuint pitch
,
126 GLuint handle
, const char *name
)
128 struct intel_region
*region
;
132 buffer
= intel_bo_gem_create_from_name(intel
->bufmgr
, name
, handle
);
134 region
= intel_region_alloc_internal(intel
, cpp
,
135 width
, height
, pitch
, buffer
);
139 ret
= dri_bo_get_tiling(region
->buffer
, ®ion
->tiling
,
140 ®ion
->bit_6_swizzle
);
142 fprintf(stderr
, "Couldn't get tiling of buffer %d (%s): %s\n",
143 handle
, name
, strerror(-ret
));
144 intel_region_release(®ion
);
152 intel_region_reference(struct intel_region
**dst
, struct intel_region
*src
)
155 DBG("%s %d\n", __FUNCTION__
, src
->refcount
);
157 assert(*dst
== NULL
);
165 intel_region_release(struct intel_region
**region_handle
)
167 struct intel_region
*region
= *region_handle
;
172 DBG("%s %d\n", __FUNCTION__
, region
->refcount
- 1);
174 ASSERT(region
->refcount
> 0);
177 if (region
->refcount
== 0) {
178 assert(region
->map_refcount
== 0);
181 region
->pbo
->region
= NULL
;
183 dri_bo_unreference(region
->buffer
);
185 if (region
->classic_map
!= NULL
) {
186 drmUnmap(region
->classic_map
,
187 region
->pitch
* region
->cpp
* region
->height
);
192 *region_handle
= NULL
;
196 * XXX Move this into core Mesa?
199 _mesa_copy_rect(GLubyte
* dst
,
207 GLuint src_pitch
, GLuint src_x
, GLuint src_y
)
215 dst
+= dst_y
* dst_pitch
;
216 src
+= src_y
* dst_pitch
;
219 if (width
== dst_pitch
&& width
== src_pitch
)
220 memcpy(dst
, src
, height
* width
);
222 for (i
= 0; i
< height
; i
++) {
223 memcpy(dst
, src
, width
);
231 /* Upload data to a rectangular sub-region. Lots of choices how to do this:
233 * - memcpy by span to current destination
234 * - upload data as new buffer and blit
236 * Currently always memcpy.
239 intel_region_data(struct intel_context
*intel
,
240 struct intel_region
*dst
,
242 GLuint dstx
, GLuint dsty
,
243 const void *src
, GLuint src_pitch
,
244 GLuint srcx
, GLuint srcy
, GLuint width
, GLuint height
)
246 GLboolean locked
= GL_FALSE
;
248 DBG("%s\n", __FUNCTION__
);
255 dsty
== 0 && width
== dst
->pitch
&& height
== dst
->height
)
256 intel_region_release_pbo(intel
, dst
);
258 intel_region_cow(intel
, dst
);
261 if (!intel
->locked
) {
262 LOCK_HARDWARE(intel
);
266 _mesa_copy_rect(intel_region_map(intel
, dst
) + dst_offset
,
269 dstx
, dsty
, width
, height
, src
, src_pitch
, srcx
, srcy
);
271 intel_region_unmap(intel
, dst
);
274 UNLOCK_HARDWARE(intel
);
278 /* Copy rectangular sub-regions. Need better logic about when to
279 * push buffers into AGP - will currently do so whenever possible.
282 intel_region_copy(struct intel_context
*intel
,
283 struct intel_region
*dst
,
285 GLuint dstx
, GLuint dsty
,
286 struct intel_region
*src
,
288 GLuint srcx
, GLuint srcy
, GLuint width
, GLuint height
)
290 DBG("%s\n", __FUNCTION__
);
297 dsty
== 0 && width
== dst
->pitch
&& height
== dst
->height
)
298 intel_region_release_pbo(intel
, dst
);
300 intel_region_cow(intel
, dst
);
303 assert(src
->cpp
== dst
->cpp
);
305 intelEmitCopyBlit(intel
,
307 src
->pitch
, src
->buffer
, src_offset
, src
->tiling
,
308 dst
->pitch
, dst
->buffer
, dst_offset
, dst
->tiling
,
309 srcx
, srcy
, dstx
, dsty
, width
, height
,
313 /* Fill a rectangular sub-region. Need better logic about when to
314 * push buffers into AGP - will currently do so whenever possible.
317 intel_region_fill(struct intel_context
*intel
,
318 struct intel_region
*dst
,
320 GLuint dstx
, GLuint dsty
,
321 GLuint width
, GLuint height
, GLuint color
)
323 DBG("%s\n", __FUNCTION__
);
330 dsty
== 0 && width
== dst
->pitch
&& height
== dst
->height
)
331 intel_region_release_pbo(intel
, dst
);
333 intel_region_cow(intel
, dst
);
336 intelEmitFillBlit(intel
,
338 dst
->pitch
, dst
->buffer
, dst_offset
, dst
->tiling
,
339 dstx
, dsty
, width
, height
, color
);
342 /* Attach to a pbo, discarding our data. Effectively zero-copy upload
346 intel_region_attach_pbo(struct intel_context
*intel
,
347 struct intel_region
*region
,
348 struct intel_buffer_object
*pbo
)
350 if (region
->pbo
== pbo
)
353 /* If there is already a pbo attached, break the cow tie now.
354 * Don't call intel_region_release_pbo() as that would
355 * unnecessarily allocate a new buffer we would have to immediately
359 region
->pbo
->region
= NULL
;
363 if (region
->buffer
) {
364 dri_bo_unreference(region
->buffer
);
365 region
->buffer
= NULL
;
369 region
->pbo
->region
= region
;
370 dri_bo_reference(pbo
->buffer
);
371 region
->buffer
= pbo
->buffer
;
375 /* Break the COW tie to the pbo and allocate a new buffer.
376 * The pbo gets to keep the data.
379 intel_region_release_pbo(struct intel_context
*intel
,
380 struct intel_region
*region
)
382 assert(region
->buffer
== region
->pbo
->buffer
);
383 region
->pbo
->region
= NULL
;
385 dri_bo_unreference(region
->buffer
);
386 region
->buffer
= NULL
;
388 region
->buffer
= dri_bo_alloc(intel
->bufmgr
, "region",
389 region
->pitch
* region
->cpp
* region
->height
,
393 /* Break the COW tie to the pbo. Both the pbo and the region end up
394 * with a copy of the data.
397 intel_region_cow(struct intel_context
*intel
, struct intel_region
*region
)
399 struct intel_buffer_object
*pbo
= region
->pbo
;
400 GLboolean was_locked
= intel
->locked
;
405 intel_region_release_pbo(intel
, region
);
407 assert(region
->cpp
* region
->pitch
* region
->height
== pbo
->Base
.Size
);
409 DBG("%s (%d bytes)\n", __FUNCTION__
, pbo
->Base
.Size
);
411 /* Now blit from the texture buffer to the new buffer:
414 was_locked
= intel
->locked
;
416 LOCK_HARDWARE(intel
);
418 intelEmitCopyBlit(intel
,
420 region
->pitch
, region
->buffer
, 0, region
->tiling
,
421 region
->pitch
, pbo
->buffer
, 0, region
->tiling
,
423 region
->pitch
, region
->height
,
427 UNLOCK_HARDWARE(intel
);
431 intel_region_buffer(struct intel_context
*intel
,
432 struct intel_region
*region
, GLuint flag
)
435 if (flag
== INTEL_WRITE_PART
)
436 intel_region_cow(intel
, region
);
437 else if (flag
== INTEL_WRITE_FULL
)
438 intel_region_release_pbo(intel
, region
);
441 return region
->buffer
;
444 static struct intel_region
*
445 intel_recreate_static(struct intel_context
*intel
,
447 struct intel_region
*region
,
448 intelRegion
*region_desc
)
450 intelScreenPrivate
*intelScreen
= intel
->intelScreen
;
453 if (region
== NULL
) {
454 region
= calloc(sizeof(*region
), 1);
455 region
->refcount
= 1;
458 if (intel
->ctx
.Visual
.rgbBits
== 24)
461 region
->cpp
= intel
->ctx
.Visual
.rgbBits
/ 8;
462 region
->pitch
= intelScreen
->pitch
;
463 region
->height
= intelScreen
->height
; /* needed? */
465 if (region
->buffer
!= NULL
) {
466 dri_bo_unreference(region
->buffer
);
467 region
->buffer
= NULL
;
471 assert(region_desc
->bo_handle
!= -1);
472 region
->buffer
= intel_bo_gem_create_from_name(intel
->bufmgr
,
474 region_desc
->bo_handle
);
476 ret
= dri_bo_get_tiling(region
->buffer
, ®ion
->tiling
,
477 ®ion
->bit_6_swizzle
);
479 fprintf(stderr
, "Couldn't get tiling of buffer %d (%s): %s\n",
480 region_desc
->bo_handle
, name
, strerror(-ret
));
481 intel_region_release(®ion
);
485 if (region
->classic_map
!= NULL
) {
486 drmUnmap(region
->classic_map
,
487 region
->pitch
* region
->cpp
* region
->height
);
488 region
->classic_map
= NULL
;
490 ret
= drmMap(intel
->driFd
, region_desc
->handle
,
491 region
->pitch
* region
->cpp
* region
->height
,
492 ®ion
->classic_map
);
494 fprintf(stderr
, "Failed to drmMap %s buffer\n", name
);
499 region
->buffer
= intel_bo_fake_alloc_static(intel
->bufmgr
,
502 region
->pitch
* region
->cpp
*
504 region
->classic_map
);
506 /* The sarea just gives us a boolean for whether it's tiled or not,
507 * instead of which tiling mode it is. Guess.
509 if (region_desc
->tiled
) {
510 if (IS_965(intel
->intelScreen
->deviceID
) &&
511 region_desc
== &intelScreen
->depth
)
512 region
->tiling
= I915_TILING_Y
;
514 region
->tiling
= I915_TILING_X
;
516 region
->tiling
= I915_TILING_NONE
;
519 region
->bit_6_swizzle
= I915_BIT_6_SWIZZLE_NONE
;
522 assert(region
->buffer
!= NULL
);
528 * Create intel_region structs to describe the static front, back, and depth
529 * buffers created by the xserver.
531 * Although FBO's mean we now no longer use these as render targets in
532 * all circumstances, they won't go away until the back and depth
533 * buffers become private, and the front buffer will remain even then.
535 * Note that these don't allocate video memory, just describe
536 * allocations alread made by the X server.
539 intel_recreate_static_regions(struct intel_context
*intel
)
541 intelScreenPrivate
*intelScreen
= intel
->intelScreen
;
543 intel
->front_region
=
544 intel_recreate_static(intel
, "front",
546 &intelScreen
->front
);
549 intel_recreate_static(intel
, "back",
554 if (intelScreen
->third
.handle
) {
555 intel
->third_region
=
556 intel_recreate_static(intel
, "third",
558 &intelScreen
->third
);
562 /* Still assumes front.cpp == depth.cpp. We can kill this when we move to
565 intel
->depth_region
=
566 intel_recreate_static(intel
, "depth",
568 &intelScreen
->depth
);