Merge remote branch 'origin/master' into nv50-compiler
[mesa.git] / src / mesa / drivers / dri / intel / intel_regions.c
1 /**************************************************************************
2 *
3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /* Provide additional functionality on top of bufmgr buffers:
29 * - 2d semantics and blit operations
30 * - refcounting of buffers for multiple images in a buffer.
31 * - refcounting of buffer mappings.
32 * - some logic for moving the buffers to the best memory pools for
33 * given operations.
34 *
35 * Most of this is to make it easier to implement the fixed-layout
36 * mipmap tree required by intel hardware in the face of GL's
37 * programming interface where each image can be specifed in random
38 * order and it isn't clear what layout the tree should have until the
39 * last moment.
40 */
41
42 #include <sys/ioctl.h>
43 #include <errno.h>
44
45 #include "main/hash.h"
46 #include "intel_context.h"
47 #include "intel_regions.h"
48 #include "intel_blit.h"
49 #include "intel_buffer_objects.h"
50 #include "intel_bufmgr.h"
51 #include "intel_batchbuffer.h"
52
53 #define FILE_DEBUG_FLAG DEBUG_REGION
54
55 /* This should be set to the maximum backtrace size desired.
56 * Set it to 0 to disable backtrace debugging.
57 */
58 #define DEBUG_BACKTRACE_SIZE 0
59
60 #if DEBUG_BACKTRACE_SIZE == 0
61 /* Use the standard debug output */
62 #define _DBG(...) DBG(__VA_ARGS__)
63 #else
64 /* Use backtracing debug output */
65 #define _DBG(...) {debug_backtrace(); DBG(__VA_ARGS__);}
66
67 /* Backtracing debug support */
68 #include <execinfo.h>
69
70 static void
71 debug_backtrace(void)
72 {
73 void *trace[DEBUG_BACKTRACE_SIZE];
74 char **strings = NULL;
75 int traceSize;
76 register int i;
77
78 traceSize = backtrace(trace, DEBUG_BACKTRACE_SIZE);
79 strings = backtrace_symbols(trace, traceSize);
80 if (strings == NULL) {
81 DBG("no backtrace:");
82 return;
83 }
84
85 /* Spit out all the strings with a colon separator. Ignore
86 * the first, since we don't really care about the call
87 * to debug_backtrace() itself. Skip until the final "/" in
88 * the trace to avoid really long lines.
89 */
90 for (i = 1; i < traceSize; i++) {
91 char *p = strings[i], *slash = strings[i];
92 while (*p) {
93 if (*p++ == '/') {
94 slash = p;
95 }
96 }
97
98 DBG("%s:", slash);
99 }
100
101 /* Free up the memory, and we're done */
102 free(strings);
103 }
104
105 #endif
106
107
108
109 /* XXX: Thread safety?
110 */
111 GLubyte *
112 intel_region_map(struct intel_context *intel, struct intel_region *region)
113 {
114 intel_flush(&intel->ctx);
115
116 _DBG("%s %p\n", __FUNCTION__, region);
117 if (!region->map_refcount++) {
118 if (region->pbo)
119 intel_region_cow(intel, region);
120
121 if (region->tiling != I915_TILING_NONE)
122 drm_intel_gem_bo_map_gtt(region->buffer);
123 else
124 drm_intel_bo_map(region->buffer, GL_TRUE);
125 region->map = region->buffer->virtual;
126 }
127
128 return region->map;
129 }
130
131 void
132 intel_region_unmap(struct intel_context *intel, struct intel_region *region)
133 {
134 _DBG("%s %p\n", __FUNCTION__, region);
135 if (!--region->map_refcount) {
136 if (region->tiling != I915_TILING_NONE)
137 drm_intel_gem_bo_unmap_gtt(region->buffer);
138 else
139 drm_intel_bo_unmap(region->buffer);
140 region->map = NULL;
141 }
142 }
143
144 static struct intel_region *
145 intel_region_alloc_internal(struct intel_context *intel,
146 GLuint cpp,
147 GLuint width, GLuint height, GLuint pitch,
148 drm_intel_bo *buffer)
149 {
150 struct intel_region *region;
151
152 if (buffer == NULL) {
153 _DBG("%s <-- NULL\n", __FUNCTION__);
154 return NULL;
155 }
156
157 region = calloc(sizeof(*region), 1);
158 if (region == NULL)
159 return region;
160
161 region->cpp = cpp;
162 region->width = width;
163 region->height = height;
164 region->pitch = pitch;
165 region->refcount = 1;
166 region->buffer = buffer;
167
168 /* Default to no tiling */
169 region->tiling = I915_TILING_NONE;
170
171 _DBG("%s <-- %p\n", __FUNCTION__, region);
172 return region;
173 }
174
175 struct intel_region *
176 intel_region_alloc(struct intel_context *intel,
177 uint32_t tiling,
178 GLuint cpp, GLuint width, GLuint height,
179 GLboolean expect_accelerated_upload)
180 {
181 drm_intel_bo *buffer;
182 struct intel_region *region;
183 unsigned long flags = 0;
184 unsigned long aligned_pitch;
185
186 if (expect_accelerated_upload)
187 flags |= BO_ALLOC_FOR_RENDER;
188
189 buffer = drm_intel_bo_alloc_tiled(intel->bufmgr, "region",
190 width, height, cpp,
191 &tiling, &aligned_pitch, flags);
192
193 region = intel_region_alloc_internal(intel, cpp, width, height,
194 aligned_pitch / cpp, buffer);
195 if (region == NULL)
196 return region;
197
198 region->tiling = tiling;
199
200 return region;
201 }
202
203 struct intel_region *
204 intel_region_alloc_for_handle(struct intel_context *intel,
205 GLuint cpp,
206 GLuint width, GLuint height, GLuint pitch,
207 GLuint handle, const char *name)
208 {
209 struct intel_region *region, *dummy;
210 drm_intel_bo *buffer;
211 int ret;
212 uint32_t bit_6_swizzle;
213
214 region = _mesa_HashLookup(intel->intelScreen->named_regions, handle);
215 if (region != NULL) {
216 dummy = NULL;
217 if (region->width != width || region->height != height ||
218 region->cpp != cpp || region->pitch != pitch) {
219 fprintf(stderr,
220 "Region for name %d already exists but is not compatible\n",
221 handle);
222 return NULL;
223 }
224 intel_region_reference(&dummy, region);
225 return dummy;
226 }
227
228 buffer = intel_bo_gem_create_from_name(intel->bufmgr, name, handle);
229
230 region = intel_region_alloc_internal(intel, cpp,
231 width, height, pitch, buffer);
232 if (region == NULL)
233 return region;
234
235 ret = drm_intel_bo_get_tiling(region->buffer, &region->tiling,
236 &bit_6_swizzle);
237 if (ret != 0) {
238 fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
239 handle, name, strerror(-ret));
240 intel_region_release(&region);
241 return NULL;
242 }
243
244 region->name = handle;
245 region->screen = intel->intelScreen;
246 _mesa_HashInsert(intel->intelScreen->named_regions, handle, region);
247
248 return region;
249 }
250
251 void
252 intel_region_reference(struct intel_region **dst, struct intel_region *src)
253 {
254 if (src)
255 _DBG("%s %p %d\n", __FUNCTION__, src, src->refcount);
256
257 assert(*dst == NULL);
258 if (src) {
259 src->refcount++;
260 *dst = src;
261 }
262 }
263
264 void
265 intel_region_release(struct intel_region **region_handle)
266 {
267 struct intel_region *region = *region_handle;
268
269 if (region == NULL) {
270 _DBG("%s NULL\n", __FUNCTION__);
271 return;
272 }
273
274 _DBG("%s %p %d\n", __FUNCTION__, region, region->refcount - 1);
275
276 ASSERT(region->refcount > 0);
277 region->refcount--;
278
279 if (region->refcount == 0) {
280 assert(region->map_refcount == 0);
281
282 if (region->pbo)
283 region->pbo->region = NULL;
284 region->pbo = NULL;
285 drm_intel_bo_unreference(region->buffer);
286
287 if (region->name > 0)
288 _mesa_HashRemove(region->screen->named_regions, region->name);
289
290 free(region);
291 }
292 *region_handle = NULL;
293 }
294
295 /*
296 * XXX Move this into core Mesa?
297 */
298 void
299 _mesa_copy_rect(GLubyte * dst,
300 GLuint cpp,
301 GLuint dst_pitch,
302 GLuint dst_x,
303 GLuint dst_y,
304 GLuint width,
305 GLuint height,
306 const GLubyte * src,
307 GLuint src_pitch, GLuint src_x, GLuint src_y)
308 {
309 GLuint i;
310
311 dst_pitch *= cpp;
312 src_pitch *= cpp;
313 dst += dst_x * cpp;
314 src += src_x * cpp;
315 dst += dst_y * dst_pitch;
316 src += src_y * src_pitch;
317 width *= cpp;
318
319 if (width == dst_pitch && width == src_pitch)
320 memcpy(dst, src, height * width);
321 else {
322 for (i = 0; i < height; i++) {
323 memcpy(dst, src, width);
324 dst += dst_pitch;
325 src += src_pitch;
326 }
327 }
328 }
329
330
331 /* Upload data to a rectangular sub-region. Lots of choices how to do this:
332 *
333 * - memcpy by span to current destination
334 * - upload data as new buffer and blit
335 *
336 * Currently always memcpy.
337 */
338 void
339 intel_region_data(struct intel_context *intel,
340 struct intel_region *dst,
341 GLuint dst_offset,
342 GLuint dstx, GLuint dsty,
343 const void *src, GLuint src_pitch,
344 GLuint srcx, GLuint srcy, GLuint width, GLuint height)
345 {
346 _DBG("%s\n", __FUNCTION__);
347
348 if (intel == NULL)
349 return;
350
351 if (dst->pbo) {
352 if (dstx == 0 &&
353 dsty == 0 && width == dst->pitch && height == dst->height)
354 intel_region_release_pbo(intel, dst);
355 else
356 intel_region_cow(intel, dst);
357 }
358
359 intel_prepare_render(intel);
360
361 _mesa_copy_rect(intel_region_map(intel, dst) + dst_offset,
362 dst->cpp,
363 dst->pitch,
364 dstx, dsty, width, height, src, src_pitch, srcx, srcy);
365
366 intel_region_unmap(intel, dst);
367 }
368
369 /* Copy rectangular sub-regions. Need better logic about when to
370 * push buffers into AGP - will currently do so whenever possible.
371 */
372 GLboolean
373 intel_region_copy(struct intel_context *intel,
374 struct intel_region *dst,
375 GLuint dst_offset,
376 GLuint dstx, GLuint dsty,
377 struct intel_region *src,
378 GLuint src_offset,
379 GLuint srcx, GLuint srcy, GLuint width, GLuint height,
380 GLboolean flip,
381 GLenum logicop)
382 {
383 uint32_t src_pitch = src->pitch;
384
385 _DBG("%s\n", __FUNCTION__);
386
387 if (intel == NULL)
388 return GL_FALSE;
389
390 if (dst->pbo) {
391 if (dstx == 0 &&
392 dsty == 0 && width == dst->pitch && height == dst->height)
393 intel_region_release_pbo(intel, dst);
394 else
395 intel_region_cow(intel, dst);
396 }
397
398 assert(src->cpp == dst->cpp);
399
400 if (flip)
401 src_pitch = -src_pitch;
402
403 return intelEmitCopyBlit(intel,
404 dst->cpp,
405 src_pitch, src->buffer, src_offset, src->tiling,
406 dst->pitch, dst->buffer, dst_offset, dst->tiling,
407 srcx, srcy, dstx, dsty, width, height,
408 logicop);
409 }
410
411 /* Attach to a pbo, discarding our data. Effectively zero-copy upload
412 * the pbo's data.
413 */
414 void
415 intel_region_attach_pbo(struct intel_context *intel,
416 struct intel_region *region,
417 struct intel_buffer_object *pbo)
418 {
419 drm_intel_bo *buffer;
420
421 if (region->pbo == pbo)
422 return;
423
424 _DBG("%s %p %p\n", __FUNCTION__, region, pbo);
425
426 /* If there is already a pbo attached, break the cow tie now.
427 * Don't call intel_region_release_pbo() as that would
428 * unnecessarily allocate a new buffer we would have to immediately
429 * discard.
430 */
431 if (region->pbo) {
432 region->pbo->region = NULL;
433 region->pbo = NULL;
434 }
435
436 if (region->buffer) {
437 drm_intel_bo_unreference(region->buffer);
438 region->buffer = NULL;
439 }
440
441 /* make sure pbo has a buffer of its own */
442 buffer = intel_bufferobj_buffer(intel, pbo, INTEL_WRITE_FULL);
443
444 region->pbo = pbo;
445 region->pbo->region = region;
446 drm_intel_bo_reference(buffer);
447 region->buffer = buffer;
448 region->tiling = I915_TILING_NONE;
449 }
450
451
452 /* Break the COW tie to the pbo and allocate a new buffer.
453 * The pbo gets to keep the data.
454 */
455 void
456 intel_region_release_pbo(struct intel_context *intel,
457 struct intel_region *region)
458 {
459 _DBG("%s %p\n", __FUNCTION__, region);
460 assert(region->buffer == region->pbo->buffer);
461 region->pbo->region = NULL;
462 region->pbo = NULL;
463 drm_intel_bo_unreference(region->buffer);
464 region->buffer = NULL;
465
466 region->buffer = drm_intel_bo_alloc(intel->bufmgr, "region",
467 region->pitch * region->cpp *
468 region->height,
469 64);
470 }
471
472 /* Break the COW tie to the pbo. Both the pbo and the region end up
473 * with a copy of the data.
474 */
475 void
476 intel_region_cow(struct intel_context *intel, struct intel_region *region)
477 {
478 struct intel_buffer_object *pbo = region->pbo;
479 GLboolean ok;
480
481 intel_region_release_pbo(intel, region);
482
483 assert(region->cpp * region->pitch * region->height == pbo->Base.Size);
484
485 _DBG("%s %p (%d bytes)\n", __FUNCTION__, region, pbo->Base.Size);
486
487 /* Now blit from the texture buffer to the new buffer:
488 */
489
490 intel_prepare_render(intel);
491 ok = intelEmitCopyBlit(intel,
492 region->cpp,
493 region->pitch, pbo->buffer, 0, region->tiling,
494 region->pitch, region->buffer, 0, region->tiling,
495 0, 0, 0, 0,
496 region->pitch, region->height,
497 GL_COPY);
498 assert(ok);
499 }
500
501 drm_intel_bo *
502 intel_region_buffer(struct intel_context *intel,
503 struct intel_region *region, GLuint flag)
504 {
505 if (region->pbo) {
506 if (flag == INTEL_WRITE_PART)
507 intel_region_cow(intel, region);
508 else if (flag == INTEL_WRITE_FULL)
509 intel_region_release_pbo(intel, region);
510 }
511
512 return region->buffer;
513 }