src/mesa/drivers/dri/intel/intel_regions.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /* Provide additional functionality on top of bufmgr buffers:
  29  *   - 2d semantics and blit operations
  30  *   - refcounting of buffers for multiple images in a buffer.
  31  *   - refcounting of buffer mappings.
  32  *   - some logic for moving the buffers to the best memory pools for
  33  *     given operations.
  34  *
  35  * Most of this is to make it easier to implement the fixed-layout
  36  * mipmap tree required by intel hardware in the face of GL's
  37  * programming interface where each image can be specifed in random
  38  * order and it isn't clear what layout the tree should have until the
  39  * last moment.
  40  */
  41
  42 #include <sys/ioctl.h>
  43 #include <errno.h>
  44
  45 #include "intel_context.h"
  46 #include "intel_regions.h"
  47 #include "intel_blit.h"
  48 #include "intel_buffer_objects.h"
  49 #include "intel_bufmgr.h"
  50 #include "intel_batchbuffer.h"
  51
  52 #define FILE_DEBUG_FLAG DEBUG_REGION
  53
  54 /* This should be set to the maximum backtrace size desired.
  55  * Set it to 0 to disable backtrace debugging.
  56  */
  57 #define DEBUG_BACKTRACE_SIZE 0
  58
  59 #if DEBUG_BACKTRACE_SIZE == 0
  60 /* Use the standard debug output */
  61 #define _DBG(...) DBG(__VA_ARGS__)
  62 #else
  63 /* Use backtracing debug output */
  64 #define _DBG(...) {debug_backtrace(); DBG(__VA_ARGS__);}
  65
  66 /* Backtracing debug support */
  67 #include <execinfo.h>
  68
  69 static void
  70 debug_backtrace(void)
  71 {
  72    void *trace[DEBUG_BACKTRACE_SIZE];
  73    char **strings = NULL;
  74    int traceSize;
  75    register int i;
  76
  77    traceSize = backtrace(trace, DEBUG_BACKTRACE_SIZE);
  78    strings = backtrace_symbols(trace, traceSize);
  79    if (strings == NULL) {
  80       DBG("no backtrace:");
  81       return;
  82    }
  83
  84    /* Spit out all the strings with a colon separator.  Ignore
  85     * the first, since we don't really care about the call
  86     * to debug_backtrace() itself.  Skip until the final "/" in
  87     * the trace to avoid really long lines.
  88     */
  89    for (i = 1; i < traceSize; i++) {
  90       char *p = strings[i], *slash = strings[i];
  91       while (*p) {
  92          if (*p++ == '/') {
  93             slash = p;
  94          }
  95       }
  96
  97       DBG("%s:", slash);
  98    }
  99
 100    /* Free up the memory, and we're done */
 101    free(strings);
 102 }
 103
 104 #endif
 105
 106
 107
 108 /* XXX: Thread safety?
 109  */
 110 GLubyte *
 111 intel_region_map(struct intel_context *intel, struct intel_region *region)
 112 {
 113    intelFlush(&intel->ctx);
 114
 115    _DBG("%s %p\n", __FUNCTION__, region);
 116    if (!region->map_refcount++) {
 117       if (region->pbo)
 118          intel_region_cow(intel, region);
 119
 120       if (region->tiling != I915_TILING_NONE &&
 121           intel->intelScreen->kernel_exec_fencing)
 122          drm_intel_gem_bo_map_gtt(region->buffer);
 123       else
 124          dri_bo_map(region->buffer, GL_TRUE);
 125       region->map = region->buffer->virtual;
 126    }
 127
 128    return region->map;
 129 }
 130
 131 void
 132 intel_region_unmap(struct intel_context *intel, struct intel_region *region)
 133 {
 134    _DBG("%s %p\n", __FUNCTION__, region);
 135    if (!--region->map_refcount) {
 136       if (region->tiling != I915_TILING_NONE &&
 137           intel->intelScreen->kernel_exec_fencing)
 138          drm_intel_gem_bo_unmap_gtt(region->buffer);
 139       else
 140          dri_bo_unmap(region->buffer);
 141       region->map = NULL;
 142    }
 143 }
 144
 145 static struct intel_region *
 146 intel_region_alloc_internal(struct intel_context *intel,
 147                             GLuint cpp,
 148                             GLuint width, GLuint height, GLuint pitch,
 149                             dri_bo *buffer)
 150 {
 151    struct intel_region *region;
 152
 153    if (buffer == NULL) {
 154       _DBG("%s <-- NULL\n", __FUNCTION__);
 155       return NULL;
 156    }
 157
 158    region = calloc(sizeof(*region), 1);
 159    region->cpp = cpp;
 160    region->width = width;
 161    region->height = height;
 162    region->pitch = pitch;
 163    region->refcount = 1;
 164    region->buffer = buffer;
 165
 166    /* Default to no tiling */
 167    region->tiling = I915_TILING_NONE;
 168    region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE;
 169
 170    _DBG("%s <-- %p\n", __FUNCTION__, region);
 171    return region;
 172 }
 173
 174 struct intel_region *
 175 intel_region_alloc(struct intel_context *intel,
 176                    uint32_t tiling,
 177                    GLuint cpp, GLuint width, GLuint height, GLuint pitch,
 178                    GLboolean expect_accelerated_upload)
 179 {
 180    dri_bo *buffer;
 181    struct intel_region *region;
 182
 183    /* If we're tiled, our allocations are in 8 or 32-row blocks, so
 184     * failure to align our height means that we won't allocate enough pages.
 185     *
 186     * If we're untiled, we still have to align to 2 rows high because the
 187     * data port accesses 2x2 blocks even if the bottom row isn't to be
 188     * rendered, so failure to align means we could walk off the end of the
 189     * GTT and fault.
 190     */
 191    if (tiling == I915_TILING_X)
 192       height = ALIGN(height, 8);
 193    else if (tiling == I915_TILING_Y)
 194       height = ALIGN(height, 32);
 195    else
 196       height = ALIGN(height, 2);
 197
 198    /* If we're untiled, we have to align to 2 rows high because the
 199     * data port accesses 2x2 blocks even if the bottom row isn't to be
 200     * rendered, so failure to align means we could walk off the end of the
 201     * GTT and fault.
 202     */
 203    height = ALIGN(height, 2);
 204
 205    if (expect_accelerated_upload) {
 206       buffer = drm_intel_bo_alloc_for_render(intel->bufmgr, "region",
 207                                              pitch * cpp * height, 64);
 208    } else {
 209       buffer = drm_intel_bo_alloc(intel->bufmgr, "region",
 210                                   pitch * cpp * height, 64);
 211    }
 212
 213    region = intel_region_alloc_internal(intel, cpp, width, height,
 214                                         pitch, buffer);
 215
 216    if (tiling != I915_TILING_NONE) {
 217       assert(((pitch * cpp) & 127) == 0);
 218       drm_intel_bo_set_tiling(buffer, &tiling, pitch * cpp);
 219       drm_intel_bo_get_tiling(buffer, &region->tiling, &region->bit_6_swizzle);
 220    }
 221
 222    return region;
 223 }
 224
 225 struct intel_region *
 226 intel_region_alloc_for_handle(struct intel_context *intel,
 227                               GLuint cpp,
 228                               GLuint width, GLuint height, GLuint pitch,
 229                               GLuint handle, const char *name)
 230 {
 231    struct intel_region *region;
 232    dri_bo *buffer;
 233    int ret;
 234
 235    buffer = intel_bo_gem_create_from_name(intel->bufmgr, name, handle);
 236
 237    region = intel_region_alloc_internal(intel, cpp,
 238                                         width, height, pitch, buffer);
 239    if (region == NULL)
 240       return region;
 241
 242    ret = dri_bo_get_tiling(region->buffer, &region->tiling,
 243                            &region->bit_6_swizzle);
 244    if (ret != 0) {
 245       fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
 246               handle, name, strerror(-ret));
 247       intel_region_release(&region);
 248       return NULL;
 249    }
 250
 251    return region;
 252 }
 253
 254 void
 255 intel_region_reference(struct intel_region **dst, struct intel_region *src)
 256 {
 257    if (src)
 258       _DBG("%s %p %d\n", __FUNCTION__, src, src->refcount);
 259
 260    assert(*dst == NULL);
 261    if (src) {
 262       src->refcount++;
 263       *dst = src;
 264    }
 265 }
 266
 267 void
 268 intel_region_release(struct intel_region **region_handle)
 269 {
 270    struct intel_region *region = *region_handle;
 271
 272    if (region == NULL) {
 273       _DBG("%s NULL\n", __FUNCTION__);
 274       return;
 275    }
 276
 277    _DBG("%s %p %d\n", __FUNCTION__, region, region->refcount - 1);
 278
 279    ASSERT(region->refcount > 0);
 280    region->refcount--;
 281
 282    if (region->refcount == 0) {
 283       assert(region->map_refcount == 0);
 284
 285       if (region->pbo)
 286          region->pbo->region = NULL;
 287       region->pbo = NULL;
 288       dri_bo_unreference(region->buffer);
 289
 290       free(region);
 291    }
 292    *region_handle = NULL;
 293 }
 294
 295 /*
 296  * XXX Move this into core Mesa?
 297  */
 298 void
 299 _mesa_copy_rect(GLubyte * dst,
 300                 GLuint cpp,
 301                 GLuint dst_pitch,
 302                 GLuint dst_x,
 303                 GLuint dst_y,
 304                 GLuint width,
 305                 GLuint height,
 306                 const GLubyte * src,
 307                 GLuint src_pitch, GLuint src_x, GLuint src_y)
 308 {
 309    GLuint i;
 310
 311    dst_pitch *= cpp;
 312    src_pitch *= cpp;
 313    dst += dst_x * cpp;
 314    src += src_x * cpp;
 315    dst += dst_y * dst_pitch;
 316    src += src_y * dst_pitch;
 317    width *= cpp;
 318
 319    if (width == dst_pitch && width == src_pitch)
 320       memcpy(dst, src, height * width);
 321    else {
 322       for (i = 0; i < height; i++) {
 323          memcpy(dst, src, width);
 324          dst += dst_pitch;
 325          src += src_pitch;
 326       }
 327    }
 328 }
 329
 330
 331 /* Upload data to a rectangular sub-region.  Lots of choices how to do this:
 332  *
 333  * - memcpy by span to current destination
 334  * - upload data as new buffer and blit
 335  *
 336  * Currently always memcpy.
 337  */
 338 void
 339 intel_region_data(struct intel_context *intel,
 340                   struct intel_region *dst,
 341                   GLuint dst_offset,
 342                   GLuint dstx, GLuint dsty,
 343                   const void *src, GLuint src_pitch,
 344                   GLuint srcx, GLuint srcy, GLuint width, GLuint height)
 345 {
 346    _DBG("%s\n", __FUNCTION__);
 347
 348    if (intel == NULL)
 349       return;
 350
 351    if (dst->pbo) {
 352       if (dstx == 0 &&
 353           dsty == 0 && width == dst->pitch && height == dst->height)
 354          intel_region_release_pbo(intel, dst);
 355       else
 356          intel_region_cow(intel, dst);
 357    }
 358
 359    _mesa_copy_rect(intel_region_map(intel, dst) + dst_offset,
 360                    dst->cpp,
 361                    dst->pitch,
 362                    dstx, dsty, width, height, src, src_pitch, srcx, srcy);
 363
 364    intel_region_unmap(intel, dst);
 365 }
 366
 367 /* Copy rectangular sub-regions. Need better logic about when to
 368  * push buffers into AGP - will currently do so whenever possible.
 369  */
 370 GLboolean
 371 intel_region_copy(struct intel_context *intel,
 372                   struct intel_region *dst,
 373                   GLuint dst_offset,
 374                   GLuint dstx, GLuint dsty,
 375                   struct intel_region *src,
 376                   GLuint src_offset,
 377                   GLuint srcx, GLuint srcy, GLuint width, GLuint height,
 378                   GLenum logicop)
 379 {
 380    _DBG("%s\n", __FUNCTION__);
 381
 382    if (intel == NULL)
 383       return GL_FALSE;
 384
 385    if (dst->pbo) {
 386       if (dstx == 0 &&
 387           dsty == 0 && width == dst->pitch && height == dst->height)
 388          intel_region_release_pbo(intel, dst);
 389       else
 390          intel_region_cow(intel, dst);
 391    }
 392
 393    assert(src->cpp == dst->cpp);
 394
 395    return intelEmitCopyBlit(intel,
 396                             dst->cpp,
 397                             src->pitch, src->buffer, src_offset, src->tiling,
 398                             dst->pitch, dst->buffer, dst_offset, dst->tiling,
 399                             srcx, srcy, dstx, dsty, width, height,
 400                             logicop);
 401 }
 402
 403 /* Attach to a pbo, discarding our data.  Effectively zero-copy upload
 404  * the pbo's data.
 405  */
 406 void
 407 intel_region_attach_pbo(struct intel_context *intel,
 408                         struct intel_region *region,
 409                         struct intel_buffer_object *pbo)
 410 {
 411    dri_bo *buffer;
 412
 413    if (region->pbo == pbo)
 414       return;
 415
 416    _DBG("%s %p %p\n", __FUNCTION__, region, pbo);
 417
 418    /* If there is already a pbo attached, break the cow tie now.
 419     * Don't call intel_region_release_pbo() as that would
 420     * unnecessarily allocate a new buffer we would have to immediately
 421     * discard.
 422     */
 423    if (region->pbo) {
 424       region->pbo->region = NULL;
 425       region->pbo = NULL;
 426    }
 427
 428    if (region->buffer) {
 429       dri_bo_unreference(region->buffer);
 430       region->buffer = NULL;
 431    }
 432
 433    /* make sure pbo has a buffer of its own */
 434    buffer = intel_bufferobj_buffer(intel, pbo, INTEL_WRITE_FULL);
 435
 436    region->pbo = pbo;
 437    region->pbo->region = region;
 438    dri_bo_reference(buffer);
 439    region->buffer = buffer;
 440    region->tiling = I915_TILING_NONE;
 441 }
 442
 443
 444 /* Break the COW tie to the pbo and allocate a new buffer.
 445  * The pbo gets to keep the data.
 446  */
 447 void
 448 intel_region_release_pbo(struct intel_context *intel,
 449                          struct intel_region *region)
 450 {
 451    _DBG("%s %p\n", __FUNCTION__, region);
 452    assert(region->buffer == region->pbo->buffer);
 453    region->pbo->region = NULL;
 454    region->pbo = NULL;
 455    dri_bo_unreference(region->buffer);
 456    region->buffer = NULL;
 457
 458    region->buffer = dri_bo_alloc(intel->bufmgr, "region",
 459                                  region->pitch * region->cpp * region->height,
 460                                  64);
 461 }
 462
 463 /* Break the COW tie to the pbo.  Both the pbo and the region end up
 464  * with a copy of the data.
 465  */
 466 void
 467 intel_region_cow(struct intel_context *intel, struct intel_region *region)
 468 {
 469    struct intel_buffer_object *pbo = region->pbo;
 470    GLboolean ok;
 471
 472    intel_region_release_pbo(intel, region);
 473
 474    assert(region->cpp * region->pitch * region->height == pbo->Base.Size);
 475
 476    _DBG("%s %p (%d bytes)\n", __FUNCTION__, region, pbo->Base.Size);
 477
 478    /* Now blit from the texture buffer to the new buffer:
 479     */
 480
 481    ok = intelEmitCopyBlit(intel,
 482                           region->cpp,
 483                           region->pitch, pbo->buffer, 0, region->tiling,
 484                           region->pitch, region->buffer, 0, region->tiling,
 485                           0, 0, 0, 0,
 486                           region->pitch, region->height,
 487                           GL_COPY);
 488    assert(ok);
 489 }
 490
 491 dri_bo *
 492 intel_region_buffer(struct intel_context *intel,
 493                     struct intel_region *region, GLuint flag)
 494 {
 495    if (region->pbo) {
 496       if (flag == INTEL_WRITE_PART)
 497          intel_region_cow(intel, region);
 498       else if (flag == INTEL_WRITE_FULL)
 499          intel_region_release_pbo(intel, region);
 500    }
 501
 502    return region->buffer;
 503 }